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EDAC: Correct Kconfig dependencies 

Both AMD and Intel i7 EDAC drivers use MCE features and are thus
dependent of this functionality present in the kernel. Express this in
Kconfig so that randconfig builds don't break.

Reported-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Acked-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Borislav Petkov 2011-08-10 09:43:30 -03:00 committed by Mauro Carvalho Chehab
parent 4055759145
commit 168eb34ded
1 changed files with 2 additions and 3 deletions
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5
drivers/edac/Kconfig
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@ -41,7 +41,7 @@ config EDAC_DEBUG
config EDAC_DECODE_MCE config EDAC_DECODE_MCE
tristate "Decode MCEs in human-readable form (only on AMD for now)" tristate "Decode MCEs in human-readable form (only on AMD for now)"
depends on CPU_SUP_AMD && X86_MCE depends on CPU_SUP_AMD && X86_MCE_AMD
default y default y
---help--- ---help---
Enable this option if you want to decode Machine Check Exceptions Enable this option if you want to decode Machine Check Exceptions
@ -170,8 +170,7 @@ config EDAC_I5400
config EDAC_I7CORE config EDAC_I7CORE
tristate "Intel i7 Core (Nehalem) processors" tristate "Intel i7 Core (Nehalem) processors"
depends on EDAC_MM_EDAC && PCI && X86 depends on EDAC_MM_EDAC && PCI && X86 && X86_MCE_INTEL
select EDAC_MCE
help help
Support for error detection and correction the Intel Support for error detection and correction the Intel
i7 Core (Nehalem) Integrated Memory Controller that exists on i7 Core (Nehalem) Integrated Memory Controller that exists on