mirror of https://gitee.com/openkylin/linux.git
firmware: qcom: scm: Convert to streaming DMA APIS
This patch converts the Qualcomm SCM driver to use the streaming DMA APIs for communication buffers. This is being done so that the secure_flush_area call can be removed. Using the DMA APIs will also make the SCM32 symmetric to the coming SCM64 code. Signed-off-by: Andy Gross <andy.gross@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
This commit is contained in:
Andy Gross
parent
11bdcee4a6
commit
16e59467a4
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@ -23,8 +23,7 @@
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/qcom_scm.h>
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#include <asm/cacheflush.h>
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#include <linux/dma-mapping.h>
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#include "qcom_scm.h"
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@ -96,44 +95,6 @@ struct qcom_scm_response {
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__le32 is_complete;
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};
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/**
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* alloc_qcom_scm_command() - Allocate an SCM command
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* @cmd_size: size of the command buffer
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* @resp_size: size of the response buffer
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*
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* Allocate an SCM command, including enough room for the command
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* and response headers as well as the command and response buffers.
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*
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* Returns a valid &qcom_scm_command on success or %NULL if the allocation fails.
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*/
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static struct qcom_scm_command *alloc_qcom_scm_command(size_t cmd_size, size_t resp_size)
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{
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struct qcom_scm_command *cmd;
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size_t len = sizeof(*cmd) + sizeof(struct qcom_scm_response) + cmd_size +
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resp_size;
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u32 offset;
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cmd = kzalloc(PAGE_ALIGN(len), GFP_KERNEL);
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if (cmd) {
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cmd->len = cpu_to_le32(len);
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offset = offsetof(struct qcom_scm_command, buf);
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cmd->buf_offset = cpu_to_le32(offset);
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cmd->resp_hdr_offset = cpu_to_le32(offset + cmd_size);
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}
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return cmd;
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}
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/**
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* free_qcom_scm_command() - Free an SCM command
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* @cmd: command to free
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*
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* Free an SCM command.
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*/
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static inline void free_qcom_scm_command(struct qcom_scm_command *cmd)
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{
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kfree(cmd);
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}
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/**
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* qcom_scm_command_to_response() - Get a pointer to a qcom_scm_response
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* @cmd: command
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@ -192,45 +153,9 @@ static u32 smc(u32 cmd_addr)
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return r0;
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}
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static int __qcom_scm_call(const struct qcom_scm_command *cmd)
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{
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int ret;
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u32 cmd_addr = virt_to_phys(cmd);
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/*
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* Flush the command buffer so that the secure world sees
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* the correct data.
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*/
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secure_flush_area(cmd, cmd->len);
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ret = smc(cmd_addr);
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if (ret < 0)
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ret = qcom_scm_remap_error(ret);
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return ret;
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}
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static void qcom_scm_inv_range(unsigned long start, unsigned long end)
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{
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u32 cacheline_size, ctr;
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asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr));
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cacheline_size = 4 << ((ctr >> 16) & 0xf);
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start = round_down(start, cacheline_size);
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end = round_up(end, cacheline_size);
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outer_inv_range(start, end);
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while (start < end) {
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asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start)
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: "memory");
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start += cacheline_size;
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}
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dsb();
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isb();
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}
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/**
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* qcom_scm_call() - Send an SCM command
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* @dev: struct device
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* @svc_id: service identifier
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* @cmd_id: command identifier
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* @cmd_buf: command buffer
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@ -247,42 +172,59 @@ static void qcom_scm_inv_range(unsigned long start, unsigned long end)
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* and response buffers is taken care of by qcom_scm_call; however, callers are
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* responsible for any other cached buffers passed over to the secure world.
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*/
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static int qcom_scm_call(u32 svc_id, u32 cmd_id, const void *cmd_buf,
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size_t cmd_len, void *resp_buf, size_t resp_len)
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static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id,
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const void *cmd_buf, size_t cmd_len, void *resp_buf,
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size_t resp_len)
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{
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int ret;
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struct qcom_scm_command *cmd;
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struct qcom_scm_response *rsp;
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unsigned long start, end;
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size_t alloc_len = sizeof(*cmd) + cmd_len + sizeof(*rsp) + resp_len;
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dma_addr_t cmd_phys;
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cmd = alloc_qcom_scm_command(cmd_len, resp_len);
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cmd = kzalloc(PAGE_ALIGN(alloc_len), GFP_KERNEL);
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if (!cmd)
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return -ENOMEM;
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cmd->len = cpu_to_le32(alloc_len);
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cmd->buf_offset = cpu_to_le32(sizeof(*cmd));
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cmd->resp_hdr_offset = cpu_to_le32(sizeof(*cmd) + cmd_len);
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cmd->id = cpu_to_le32((svc_id << 10) | cmd_id);
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if (cmd_buf)
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memcpy(qcom_scm_get_command_buffer(cmd), cmd_buf, cmd_len);
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rsp = qcom_scm_command_to_response(cmd);
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cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE);
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if (dma_mapping_error(dev, cmd_phys)) {
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kfree(cmd);
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return -ENOMEM;
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}
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mutex_lock(&qcom_scm_lock);
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ret = __qcom_scm_call(cmd);
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ret = smc(cmd_phys);
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if (ret < 0)
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ret = qcom_scm_remap_error(ret);
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mutex_unlock(&qcom_scm_lock);
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if (ret)
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goto out;
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rsp = qcom_scm_command_to_response(cmd);
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start = (unsigned long)rsp;
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do {
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qcom_scm_inv_range(start, start + sizeof(*rsp));
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dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len,
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sizeof(*rsp), DMA_FROM_DEVICE);
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} while (!rsp->is_complete);
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end = (unsigned long)qcom_scm_get_response_buffer(rsp) + resp_len;
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qcom_scm_inv_range(start, end);
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if (resp_buf)
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memcpy(resp_buf, qcom_scm_get_response_buffer(rsp), resp_len);
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if (resp_buf) {
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dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len +
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le32_to_cpu(rsp->buf_offset),
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resp_len, DMA_FROM_DEVICE);
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memcpy(resp_buf, qcom_scm_get_response_buffer(rsp),
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resp_len);
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}
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out:
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free_qcom_scm_command(cmd);
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dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE);
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kfree(cmd);
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return ret;
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}
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@ -437,7 +379,8 @@ int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
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* Set the Linux entry point for the SCM to transfer control to when coming
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* out of a power down. CPU power down may be executed on cpuidle or hotplug.
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*/
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int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
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int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry,
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const cpumask_t *cpus)
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{
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int ret;
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int flags = 0;
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@ -463,7 +406,7 @@ int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
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cmd.addr = cpu_to_le32(virt_to_phys(entry));
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cmd.flags = cpu_to_le32(flags);
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ret = qcom_scm_call(QCOM_SCM_SVC_BOOT, QCOM_SCM_BOOT_ADDR,
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ret = qcom_scm_call(dev, QCOM_SCM_SVC_BOOT, QCOM_SCM_BOOT_ADDR,
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&cmd, sizeof(cmd), NULL, 0);
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if (!ret) {
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for_each_cpu(cpu, cpus)
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@ -487,25 +430,27 @@ void __qcom_scm_cpu_power_down(u32 flags)
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flags & QCOM_SCM_FLUSH_FLAG_MASK);
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}
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int __qcom_scm_is_call_available(u32 svc_id, u32 cmd_id)
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int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, u32 cmd_id)
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{
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int ret;
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__le32 svc_cmd = cpu_to_le32((svc_id << 10) | cmd_id);
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__le32 ret_val = 0;
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ret = qcom_scm_call(QCOM_SCM_SVC_INFO, QCOM_IS_CALL_AVAIL_CMD, &svc_cmd,
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sizeof(svc_cmd), &ret_val, sizeof(ret_val));
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ret = qcom_scm_call(dev, QCOM_SCM_SVC_INFO, QCOM_IS_CALL_AVAIL_CMD,
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&svc_cmd, sizeof(svc_cmd), &ret_val,
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sizeof(ret_val));
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if (ret)
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return ret;
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return le32_to_cpu(ret_val);
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}
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int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp)
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int __qcom_scm_hdcp_req(struct device *dev, struct qcom_scm_hdcp_req *req,
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u32 req_cnt, u32 *resp)
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{
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if (req_cnt > QCOM_SCM_HDCP_MAX_REQ_CNT)
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return -ERANGE;
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return qcom_scm_call(QCOM_SCM_SVC_HDCP, QCOM_SCM_CMD_HDCP,
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return qcom_scm_call(dev, QCOM_SCM_SVC_HDCP, QCOM_SCM_CMD_HDCP,
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req, req_cnt * sizeof(*req), resp, sizeof(*resp));
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}
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@ -89,7 +89,7 @@ EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
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*/
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int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
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{
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return __qcom_scm_set_warm_boot_addr(entry, cpus);
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return __qcom_scm_set_warm_boot_addr(__scm->dev, entry, cpus);
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}
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EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
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@ -119,7 +119,7 @@ bool qcom_scm_hdcp_available(void)
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if (ret)
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return ret;
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ret = __qcom_scm_is_call_available(QCOM_SCM_SVC_HDCP,
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ret = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_HDCP,
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QCOM_SCM_CMD_HDCP);
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qcom_scm_clk_disable();
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@ -143,7 +143,7 @@ int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp)
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if (ret)
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return ret;
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ret = __qcom_scm_hdcp_req(req, req_cnt, resp);
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ret = __qcom_scm_hdcp_req(__scm->dev, req, req_cnt, resp);
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qcom_scm_clk_disable();
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return ret;
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}
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@ -19,7 +19,8 @@
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#define QCOM_SCM_FLAG_HLOS 0x01
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#define QCOM_SCM_FLAG_COLDBOOT_MC 0x02
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#define QCOM_SCM_FLAG_WARMBOOT_MC 0x04
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extern int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus);
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extern int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry,
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const cpumask_t *cpus);
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extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
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#define QCOM_SCM_CMD_TERMINATE_PC 0x2
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@ -29,12 +30,13 @@ extern void __qcom_scm_cpu_power_down(u32 flags);
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#define QCOM_SCM_SVC_INFO 0x6
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#define QCOM_IS_CALL_AVAIL_CMD 0x1
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extern int __qcom_scm_is_call_available(u32 svc_id, u32 cmd_id);
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extern int __qcom_scm_is_call_available(struct device *dev, u32 svc_id,
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u32 cmd_id);
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#define QCOM_SCM_SVC_HDCP 0x11
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#define QCOM_SCM_CMD_HDCP 0x01
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extern int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
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u32 *resp);
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extern int __qcom_scm_hdcp_req(struct device *dev,
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struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp);
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/* common error codes */
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#define QCOM_SCM_ENOMEM -5
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