mirror of https://gitee.com/openkylin/linux.git
ARM: OMAP AM35x: clockdomain data: Fix clockdomain dependencies
The am35x family of SoCs do not have an IVA so a parallel set of clockdomain dependencies are required that are simililar to OMAP3 but without any IVA dependencies. Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Mark A. Greer
Paul Walmsley
parent
6b16351acb
commit
16e5e2c471
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@ -59,6 +59,12 @@ static struct clkdm_dep gfx_sgx_3xxx_wkdeps[] = {
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{ NULL },
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};
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static struct clkdm_dep gfx_sgx_am35x_wkdeps[] = {
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{ .clkdm_name = "mpu_clkdm" },
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{ .clkdm_name = "wkup_clkdm" },
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{ NULL },
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};
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/* 3430: PM_WKDEP_PER: CORE, IVA2, MPU, WKUP */
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static struct clkdm_dep per_wkdeps[] = {
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{ .clkdm_name = "core_l3_clkdm" },
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@ -69,6 +75,14 @@ static struct clkdm_dep per_wkdeps[] = {
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{ NULL },
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};
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static struct clkdm_dep per_am35x_wkdeps[] = {
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{ .clkdm_name = "core_l3_clkdm" },
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{ .clkdm_name = "core_l4_clkdm" },
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{ .clkdm_name = "mpu_clkdm" },
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{ .clkdm_name = "wkup_clkdm" },
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{ NULL },
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};
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/* 3430ES2: PM_WKDEP_USBHOST: CORE, IVA2, MPU, WKUP */
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static struct clkdm_dep usbhost_wkdeps[] = {
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{ .clkdm_name = "core_l3_clkdm" },
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@ -79,6 +93,14 @@ static struct clkdm_dep usbhost_wkdeps[] = {
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{ NULL },
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};
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static struct clkdm_dep usbhost_am35x_wkdeps[] = {
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{ .clkdm_name = "core_l3_clkdm" },
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{ .clkdm_name = "core_l4_clkdm" },
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{ .clkdm_name = "mpu_clkdm" },
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{ .clkdm_name = "wkup_clkdm" },
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{ NULL },
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};
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/* 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER */
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static struct clkdm_dep mpu_3xxx_wkdeps[] = {
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{ .clkdm_name = "core_l3_clkdm" },
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@ -89,6 +111,14 @@ static struct clkdm_dep mpu_3xxx_wkdeps[] = {
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{ NULL },
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};
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static struct clkdm_dep mpu_am35x_wkdeps[] = {
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{ .clkdm_name = "core_l3_clkdm" },
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{ .clkdm_name = "core_l4_clkdm" },
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{ .clkdm_name = "dss_clkdm" },
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{ .clkdm_name = "per_clkdm" },
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{ NULL },
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};
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/* 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER */
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static struct clkdm_dep iva2_wkdeps[] = {
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{ .clkdm_name = "core_l3_clkdm" },
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@ -116,6 +146,12 @@ static struct clkdm_dep dss_wkdeps[] = {
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{ NULL },
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};
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static struct clkdm_dep dss_am35x_wkdeps[] = {
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{ .clkdm_name = "mpu_clkdm" },
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{ .clkdm_name = "wkup_clkdm" },
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{ NULL },
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};
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/* 3430: PM_WKDEP_NEON: MPU */
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static struct clkdm_dep neon_wkdeps[] = {
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{ .clkdm_name = "mpu_clkdm" },
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@ -131,6 +167,11 @@ static struct clkdm_dep dss_sleepdeps[] = {
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{ NULL },
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};
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static struct clkdm_dep dss_am35x_sleepdeps[] = {
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{ .clkdm_name = "mpu_clkdm" },
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{ NULL },
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};
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/* 3430: CM_SLEEPDEP_PER: MPU, IVA */
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static struct clkdm_dep per_sleepdeps[] = {
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{ .clkdm_name = "mpu_clkdm" },
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@ -138,6 +179,11 @@ static struct clkdm_dep per_sleepdeps[] = {
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{ NULL },
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};
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static struct clkdm_dep per_am35x_sleepdeps[] = {
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{ .clkdm_name = "mpu_clkdm" },
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{ NULL },
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};
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/* 3430ES2: CM_SLEEPDEP_USBHOST: MPU, IVA */
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static struct clkdm_dep usbhost_sleepdeps[] = {
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{ .clkdm_name = "mpu_clkdm" },
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@ -145,6 +191,11 @@ static struct clkdm_dep usbhost_sleepdeps[] = {
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{ NULL },
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};
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static struct clkdm_dep usbhost_am35x_sleepdeps[] = {
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{ .clkdm_name = "mpu_clkdm" },
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{ NULL },
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};
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/* 3430: CM_SLEEPDEP_CAM: MPU */
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static struct clkdm_dep cam_sleepdeps[] = {
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{ .clkdm_name = "mpu_clkdm" },
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@ -175,6 +226,15 @@ static struct clockdomain mpu_3xxx_clkdm = {
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.clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK,
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};
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static struct clockdomain mpu_am35x_clkdm = {
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.name = "mpu_clkdm",
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.pwrdm = { .name = "mpu_pwrdm" },
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.flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP,
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.dep_bit = OMAP3430_EN_MPU_SHIFT,
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.wkdep_srcs = mpu_am35x_wkdeps,
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.clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK,
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};
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static struct clockdomain neon_clkdm = {
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.name = "neon_clkdm",
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.pwrdm = { .name = "neon_pwrdm" },
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@ -210,6 +270,15 @@ static struct clockdomain sgx_clkdm = {
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.clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK,
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};
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static struct clockdomain sgx_am35x_clkdm = {
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.name = "sgx_clkdm",
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.pwrdm = { .name = "sgx_pwrdm" },
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.flags = CLKDM_CAN_HWSUP_SWSUP,
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.wkdep_srcs = gfx_sgx_am35x_wkdeps,
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.sleepdep_srcs = gfx_sgx_sleepdeps,
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.clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK,
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};
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/*
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* The die-to-die clockdomain was documented in the 34xx ES1 TRM, but
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* then that information was removed from the 34xx ES2+ TRM. It is
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@ -261,6 +330,16 @@ static struct clockdomain dss_3xxx_clkdm = {
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.clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK,
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};
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static struct clockdomain dss_am35x_clkdm = {
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.name = "dss_clkdm",
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.pwrdm = { .name = "dss_pwrdm" },
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.flags = CLKDM_CAN_HWSUP_SWSUP,
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.dep_bit = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT,
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.wkdep_srcs = dss_am35x_wkdeps,
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.sleepdep_srcs = dss_am35x_sleepdeps,
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.clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK,
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};
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static struct clockdomain cam_clkdm = {
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.name = "cam_clkdm",
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.pwrdm = { .name = "cam_pwrdm" },
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@ -279,6 +358,15 @@ static struct clockdomain usbhost_clkdm = {
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.clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK,
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};
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static struct clockdomain usbhost_am35x_clkdm = {
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.name = "usbhost_clkdm",
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.pwrdm = { .name = "core_pwrdm" },
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.flags = CLKDM_CAN_HWSUP_SWSUP,
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.wkdep_srcs = usbhost_am35x_wkdeps,
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.sleepdep_srcs = usbhost_am35x_sleepdeps,
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.clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK,
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};
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static struct clockdomain per_clkdm = {
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.name = "per_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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@ -289,6 +377,16 @@ static struct clockdomain per_clkdm = {
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.clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK,
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};
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static struct clockdomain per_am35x_clkdm = {
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.name = "per_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.flags = CLKDM_CAN_HWSUP_SWSUP,
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.dep_bit = OMAP3430_EN_PER_SHIFT,
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.wkdep_srcs = per_am35x_wkdeps,
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.sleepdep_srcs = per_am35x_sleepdeps,
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.clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK,
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};
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/*
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* Disable hw supervised mode for emu_clkdm, because emu_pwrdm is
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* switched of even if sdti is in use
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@ -341,28 +439,41 @@ static struct clkdm_autodep clkdm_autodeps[] = {
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}
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};
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static struct clkdm_autodep clkdm_am35x_autodeps[] = {
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{
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.clkdm = { .name = "mpu_clkdm" },
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},
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{
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.clkdm = { .name = NULL },
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}
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};
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/*
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*
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*/
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static struct clockdomain *clockdomains_omap3430_common[] __initdata = {
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static struct clockdomain *clockdomains_common[] __initdata = {
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&wkup_common_clkdm,
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&cm_common_clkdm,
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&prm_common_clkdm,
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&mpu_3xxx_clkdm,
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&neon_clkdm,
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&iva2_clkdm,
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&d2d_clkdm,
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&core_l3_3xxx_clkdm,
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&core_l4_3xxx_clkdm,
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&emu_clkdm,
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&dpll1_clkdm,
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&dpll3_clkdm,
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&dpll4_clkdm,
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NULL
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};
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static struct clockdomain *clockdomains_omap3430[] __initdata = {
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&mpu_3xxx_clkdm,
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&iva2_clkdm,
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&d2d_clkdm,
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&dss_3xxx_clkdm,
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&cam_clkdm,
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&per_clkdm,
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&emu_clkdm,
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&dpll1_clkdm,
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&dpll2_clkdm,
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&dpll3_clkdm,
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&dpll4_clkdm,
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NULL
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};
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@ -378,21 +489,41 @@ static struct clockdomain *clockdomains_omap3430es2plus[] __initdata = {
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NULL,
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};
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static struct clockdomain *clockdomains_am35x[] __initdata = {
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&mpu_am35x_clkdm,
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&sgx_am35x_clkdm,
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&dss_am35x_clkdm,
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&per_am35x_clkdm,
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&usbhost_am35x_clkdm,
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&dpll5_clkdm,
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NULL
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};
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void __init omap3xxx_clockdomains_init(void)
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{
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struct clockdomain **sc;
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unsigned int rev;
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if (!cpu_is_omap34xx())
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return;
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clkdm_register_platform_funcs(&omap3_clkdm_operations);
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clkdm_register_clkdms(clockdomains_omap3430_common);
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clkdm_register_clkdms(clockdomains_common);
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sc = (omap_rev() == OMAP3430_REV_ES1_0) ? clockdomains_omap3430es1 :
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clockdomains_omap3430es2plus;
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rev = omap_rev();
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clkdm_register_clkdms(sc);
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if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) {
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clkdm_register_clkdms(clockdomains_am35x);
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clkdm_register_autodeps(clkdm_am35x_autodeps);
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} else {
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clkdm_register_clkdms(clockdomains_omap3430);
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sc = (rev == OMAP3430_REV_ES1_0) ?
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clockdomains_omap3430es1 : clockdomains_omap3430es2plus;
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clkdm_register_clkdms(sc);
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clkdm_register_autodeps(clkdm_autodeps);
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}
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clkdm_register_autodeps(clkdm_autodeps);
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clkdm_complete_init();
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}
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