Jody McIntyre 2005-12-16 17:10:35 -05:00
commit 16e842a62a
117 changed files with 1233 additions and 1482 deletions

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@ -1284,8 +1284,8 @@ T: git kernel.org:/pub/scm/linux/kernel/git/roland/infiniband.git
S: Supported
INPUT (KEYBOARD, MOUSE, JOYSTICK) DRIVERS
P: Vojtech Pavlik
M: vojtech@suse.cz
P: Dmitry Torokhov
M: dtor_core@ameritech.net
L: linux-input@atrey.karlin.mff.cuni.cz
L: linux-joystick@atrey.karlin.mff.cuni.cz
T: git kernel.org:/pub/scm/linux/kernel/git/dtor/input.git

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@ -41,7 +41,7 @@
#define CAT1(x,y) x##y
#define CAT(x,y) CAT1(x,y)
#define DO_DEFAULT_RTC rtc_port: 0x70
#define DO_DEFAULT_RTC .rtc_port = 0x70
#define DO_EV4_MMU \
.max_asn = EV4_MAX_ASN, \

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@ -101,6 +101,8 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
break;
case R_ARM_PC24:
case R_ARM_CALL:
case R_ARM_JUMP24:
offset = (*(u32 *)loc & 0x00ffffff) << 2;
if (offset & 0x02000000)
offset -= 0x04000000;

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@ -155,19 +155,20 @@ int pxa_pm_enter(suspend_state_t state)
PSPR = 0;
/* restore registers */
RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
RESTORE(GAFR0_L); RESTORE(GAFR0_U);
RESTORE(GAFR1_L); RESTORE(GAFR1_U);
RESTORE(GAFR2_L); RESTORE(GAFR2_U);
RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
#ifdef CONFIG_PXA27x
RESTORE(MDREFR);
RESTORE(GAFR3_L); RESTORE(GAFR3_U); RESTORE_GPLEVEL(3);
RESTORE(GPDR3); RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
RESTORE_GPLEVEL(3); RESTORE(GPDR3);
RESTORE(GAFR3_L); RESTORE(GAFR3_U);
RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
RESTORE(PFER); RESTORE(PKWR);
#endif

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@ -1338,8 +1338,7 @@ int __cpu_disable(void)
if (cpu == 0)
return -EBUSY;
/* We enable the timer again on the exit path of the death loop */
disable_APIC_timer();
clear_local_APIC();
/* Allow any queued timer interrupts to get serviced */
local_irq_enable();
mdelay(1);

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@ -223,9 +223,15 @@ void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
}
EXPORT_SYMBOL(ioremap_nocache);
/**
* iounmap - Free a IO remapping
* @addr: virtual address from ioremap_*
*
* Caller must ensure there is only one unmapping for the same pointer.
*/
void iounmap(volatile void __iomem *addr)
{
struct vm_struct *p;
struct vm_struct *p, *o;
if ((void __force *)addr <= high_memory)
return;
@ -239,22 +245,37 @@ void iounmap(volatile void __iomem *addr)
addr < phys_to_virt(ISA_END_ADDRESS))
return;
write_lock(&vmlist_lock);
p = __remove_vm_area((void *)(PAGE_MASK & (unsigned long __force)addr));
if (!p) {
printk(KERN_WARNING "iounmap: bad address %p\n", addr);
addr = (volatile void __iomem *)(PAGE_MASK & (unsigned long __force)addr);
/* Use the vm area unlocked, assuming the caller
ensures there isn't another iounmap for the same address
in parallel. Reuse of the virtual address is prevented by
leaving it in the global lists until we're done with it.
cpa takes care of the direct mappings. */
read_lock(&vmlist_lock);
for (p = vmlist; p; p = p->next) {
if (p->addr == addr)
break;
}
read_unlock(&vmlist_lock);
if (!p) {
printk("iounmap: bad address %p\n", addr);
dump_stack();
goto out_unlock;
return;
}
/* Reset the direct mapping. Can block */
if ((p->flags >> 20) && p->phys_addr < virt_to_phys(high_memory) - 1) {
change_page_attr(virt_to_page(__va(p->phys_addr)),
p->size >> PAGE_SHIFT,
PAGE_KERNEL);
global_flush_tlb();
}
out_unlock:
write_unlock(&vmlist_lock);
/* Finally remove it */
o = remove_vm_area((void *)addr);
BUG_ON(p != o || o == NULL);
kfree(p);
}
EXPORT_SYMBOL(iounmap);

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@ -13,7 +13,7 @@
#define PCI_CONF1_ADDRESS(bus, devfn, reg) \
(0x80000000 | (bus << 16) | (devfn << 8) | (reg & ~3))
static int pci_conf1_read(unsigned int seg, unsigned int bus,
int pci_conf1_read(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 *value)
{
unsigned long flags;
@ -42,7 +42,7 @@ static int pci_conf1_read(unsigned int seg, unsigned int bus,
return 0;
}
static int pci_conf1_write(unsigned int seg, unsigned int bus,
int pci_conf1_write(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 value)
{
unsigned long flags;

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@ -19,21 +19,25 @@
/* The base address of the last MMCONFIG device accessed */
static u32 mmcfg_last_accessed_device;
static DECLARE_BITMAP(fallback_slots, 32);
/*
* Functions for accessing PCI configuration space with MMCONFIG accesses
*/
static u32 get_base_addr(unsigned int seg, int bus)
static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
{
int cfg_num = -1;
struct acpi_table_mcfg_config *cfg;
if (seg == 0 && bus == 0 &&
test_bit(PCI_SLOT(devfn), fallback_slots))
return 0;
while (1) {
++cfg_num;
if (cfg_num >= pci_mmcfg_config_num) {
/* something bad is going on, no cfg table is found. */
/* so we fall back to the old way we used to do this */
/* and just rely on the first entry to be correct. */
return pci_mmcfg_config[0].base_address;
/* Not found - fallback to type 1 */
return 0;
}
cfg = &pci_mmcfg_config[cfg_num];
if (cfg->pci_segment_group_number != seg)
@ -44,9 +48,9 @@ static u32 get_base_addr(unsigned int seg, int bus)
}
}
static inline void pci_exp_set_dev_base(unsigned int seg, int bus, int devfn)
static inline void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)
{
u32 dev_base = get_base_addr(seg, bus) | (bus << 20) | (devfn << 12);
u32 dev_base = base | (bus << 20) | (devfn << 12);
if (dev_base != mmcfg_last_accessed_device) {
mmcfg_last_accessed_device = dev_base;
set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
@ -57,13 +61,18 @@ static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 *value)
{
unsigned long flags;
u32 base;
if (!value || (bus > 255) || (devfn > 255) || (reg > 4095))
return -EINVAL;
base = get_base_addr(seg, bus, devfn);
if (!base)
return pci_conf1_read(seg,bus,devfn,reg,len,value);
spin_lock_irqsave(&pci_config_lock, flags);
pci_exp_set_dev_base(seg, bus, devfn);
pci_exp_set_dev_base(base, bus, devfn);
switch (len) {
case 1:
@ -86,13 +95,18 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 value)
{
unsigned long flags;
u32 base;
if ((bus > 255) || (devfn > 255) || (reg > 4095))
return -EINVAL;
base = get_base_addr(seg, bus, devfn);
if (!base)
return pci_conf1_write(seg,bus,devfn,reg,len,value);
spin_lock_irqsave(&pci_config_lock, flags);
pci_exp_set_dev_base(seg, bus, devfn);
pci_exp_set_dev_base(base, bus, devfn);
switch (len) {
case 1:
@ -116,6 +130,37 @@ static struct pci_raw_ops pci_mmcfg = {
.write = pci_mmcfg_write,
};
/* K8 systems have some devices (typically in the builtin northbridge)
that are only accessible using type1
Normally this can be expressed in the MCFG by not listing them
and assigning suitable _SEGs, but this isn't implemented in some BIOS.
Instead try to discover all devices on bus 0 that are unreachable using MM
and fallback for them.
We only do this for bus 0/seg 0 */
static __init void unreachable_devices(void)
{
int i;
unsigned long flags;
for (i = 0; i < 32; i++) {
u32 val1;
u32 addr;
pci_conf1_read(0, 0, PCI_DEVFN(i, 0), 0, 4, &val1);
if (val1 == 0xffffffff)
continue;
/* Locking probably not needed, but safer */
spin_lock_irqsave(&pci_config_lock, flags);
addr = get_base_addr(0, 0, PCI_DEVFN(i, 0));
if (addr != 0)
pci_exp_set_dev_base(addr, 0, PCI_DEVFN(i, 0));
if (addr == 0 || readl((u32 __iomem *)mmcfg_virt_addr) != val1)
set_bit(i, fallback_slots);
spin_unlock_irqrestore(&pci_config_lock, flags);
}
}
static int __init pci_mmcfg_init(void)
{
if ((pci_probe & PCI_PROBE_MMCONF) == 0)
@ -131,6 +176,8 @@ static int __init pci_mmcfg_init(void)
raw_pci_ops = &pci_mmcfg;
pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
unreachable_devices();
out:
return 0;
}

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@ -74,3 +74,10 @@ extern spinlock_t pci_config_lock;
extern int (*pcibios_enable_irq)(struct pci_dev *dev);
extern void (*pcibios_disable_irq)(struct pci_dev *dev);
extern int pci_conf1_write(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 value);
extern int pci_conf1_read(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 *value);

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@ -721,11 +721,13 @@ flush_thread (void)
/* drop floating-point and debug-register state if it exists: */
current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
ia64_drop_fpu(current);
#ifdef CONFIG_IA32_SUPPORT
if (IS_IA32_PROCESS(ia64_task_regs(current))) {
ia32_drop_partial_page_list(current);
current->thread.task_size = IA32_PAGE_OFFSET;
set_fs(USER_DS);
}
#endif
}
/*

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@ -25,7 +25,7 @@ union br_ptr {
*/
void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
{
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
if (pcibus_info) {
switch (pcibus_info->pbi_bridge_type) {
@ -38,14 +38,14 @@ void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
default:
panic
("pcireg_control_bit_clr: unknown bridgetype bridge 0x%p",
(void *)ptr);
ptr);
}
}
}
void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
{
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
if (pcibus_info) {
switch (pcibus_info->pbi_bridge_type) {
@ -58,7 +58,7 @@ void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
default:
panic
("pcireg_control_bit_set: unknown bridgetype bridge 0x%p",
(void *)ptr);
ptr);
}
}
}
@ -68,7 +68,7 @@ void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
*/
uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
{
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
uint64_t ret = 0;
if (pcibus_info) {
@ -82,7 +82,7 @@ uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
default:
panic
("pcireg_tflush_get: unknown bridgetype bridge 0x%p",
(void *)ptr);
ptr);
}
}
@ -98,7 +98,7 @@ uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
*/
uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
{
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
uint64_t ret = 0;
if (pcibus_info) {
@ -112,7 +112,7 @@ uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
default:
panic
("pcireg_intr_status_get: unknown bridgetype bridge 0x%p",
(void *)ptr);
ptr);
}
}
return ret;
@ -123,7 +123,7 @@ uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
*/
void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
{
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
if (pcibus_info) {
switch (pcibus_info->pbi_bridge_type) {
@ -136,14 +136,14 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
default:
panic
("pcireg_intr_enable_bit_clr: unknown bridgetype bridge 0x%p",
(void *)ptr);
ptr);
}
}
}
void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
{
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
if (pcibus_info) {
switch (pcibus_info->pbi_bridge_type) {
@ -156,7 +156,7 @@ void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
default:
panic
("pcireg_intr_enable_bit_set: unknown bridgetype bridge 0x%p",
(void *)ptr);
ptr);
}
}
}
@ -167,7 +167,7 @@ void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
uint64_t addr)
{
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
if (pcibus_info) {
switch (pcibus_info->pbi_bridge_type) {
@ -186,7 +186,7 @@ void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
default:
panic
("pcireg_intr_addr_addr_get: unknown bridgetype bridge 0x%p",
(void *)ptr);
ptr);
}
}
}
@ -196,7 +196,7 @@ void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
*/
void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
{
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
if (pcibus_info) {
switch (pcibus_info->pbi_bridge_type) {
@ -209,7 +209,7 @@ void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
default:
panic
("pcireg_force_intr_set: unknown bridgetype bridge 0x%p",
(void *)ptr);
ptr);
}
}
}
@ -219,7 +219,7 @@ void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
*/
uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
{
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
uint64_t ret = 0;
if (pcibus_info) {
@ -233,7 +233,7 @@ uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
__sn_readq_relaxed(&ptr->pic.p_wr_req_buf[device]);
break;
default:
panic("pcireg_wrb_flush_get: unknown bridgetype bridge 0x%p", (void *)ptr);
panic("pcireg_wrb_flush_get: unknown bridgetype bridge 0x%p", ptr);
}
}
@ -244,7 +244,7 @@ uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
uint64_t val)
{
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
if (pcibus_info) {
switch (pcibus_info->pbi_bridge_type) {
@ -257,15 +257,15 @@ void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
default:
panic
("pcireg_int_ate_set: unknown bridgetype bridge 0x%p",
(void *)ptr);
ptr);
}
}
}
uint64_t *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
uint64_t __iomem *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
{
union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
uint64_t *ret = (uint64_t *) 0;
union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
uint64_t __iomem *ret = NULL;
if (pcibus_info) {
switch (pcibus_info->pbi_bridge_type) {
@ -278,7 +278,7 @@ uint64_t *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
default:
panic
("pcireg_int_ate_addr: unknown bridgetype bridge 0x%p",
(void *)ptr);
ptr);
}
}
return ret;

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@ -38,10 +38,10 @@ tioca_gart_init(struct tioca_kernel *tioca_kern)
uint64_t offset;
struct page *tmp;
struct tioca_common *tioca_common;
struct tioca *ca_base;
struct tioca __iomem *ca_base;
tioca_common = tioca_kern->ca_common;
ca_base = (struct tioca *)tioca_common->ca_common.bs_base;
ca_base = (struct tioca __iomem *)tioca_common->ca_common.bs_base;
if (list_empty(tioca_kern->ca_devices))
return 0;
@ -215,7 +215,7 @@ tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
{
int cap_ptr;
uint32_t reg;
struct tioca *tioca_base;
struct tioca __iomem *tioca_base;
struct pci_dev *pdev;
struct tioca_common *common;
@ -257,7 +257,7 @@ tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
* Set ca's fw to match
*/
tioca_base = (struct tioca *)common->ca_common.bs_base;
tioca_base = (struct tioca __iomem*)common->ca_common.bs_base;
__sn_setq_relaxed(&tioca_base->ca_control1, CA_AGP_FW_ENABLE);
}
@ -322,7 +322,7 @@ static uint64_t
tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
{
struct tioca_common *tioca_common;
struct tioca *ca_base;
struct tioca __iomem *ca_base;
uint64_t ct_addr;
dma_addr_t bus_addr;
uint32_t node_upper;
@ -330,7 +330,7 @@ tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
struct pcidev_info *pcidev_info = SN_PCIDEV_INFO(pdev);
tioca_common = (struct tioca_common *)pcidev_info->pdi_pcibus_info;
ca_base = (struct tioca *)tioca_common->ca_common.bs_base;
ca_base = (struct tioca __iomem *)tioca_common->ca_common.bs_base;
ct_addr = PHYS_TO_TIODMA(paddr);
if (!ct_addr)

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@ -247,7 +247,7 @@ long ppc64_personality(unsigned long personality)
#define OVERRIDE_MACHINE 0
#endif
static inline int override_machine(char *mach)
static inline int override_machine(char __user *mach)
{
if (OVERRIDE_MACHINE) {
/* change ppc64 to ppc */

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@ -22,7 +22,7 @@
#include <asm/oplib.h>
#include <asm/bpp.h>
struct linux_ebus *ebus_chain = 0;
struct linux_ebus *ebus_chain = NULL;
/* We are together with pcic.c under CONFIG_PCI. */
extern unsigned int pcic_pin_to_irq(unsigned int, char *name);
@ -46,7 +46,7 @@ static struct ebus_device_irq je1_1[] = {
{ "SUNW,CS4231", 0 },
{ "parallel", 0 },
{ "se", 2 },
{ 0, 0 }
{ NULL, 0 }
};
/*
@ -55,7 +55,7 @@ static struct ebus_device_irq je1_1[] = {
*/
static struct ebus_system_entry ebus_blacklist[] = {
{ "SUNW,JavaEngine1", je1_1 },
{ 0, 0 }
{ NULL, NULL }
};
static struct ebus_device_irq *ebus_blackp = NULL;
@ -233,7 +233,7 @@ void __init fill_ebus_device(int node, struct linux_ebus_device *dev)
ebus_alloc(sizeof(struct linux_ebus_child));
child = dev->children;
child->next = 0;
child->next = NULL;
child->parent = dev;
child->bus = dev->bus;
fill_ebus_child(node, &regs[0], child);
@ -243,7 +243,7 @@ void __init fill_ebus_device(int node, struct linux_ebus_device *dev)
ebus_alloc(sizeof(struct linux_ebus_child));
child = child->next;
child->next = 0;
child->next = NULL;
child->parent = dev;
child->bus = dev->bus;
fill_ebus_child(node, &regs[0], child);
@ -275,7 +275,7 @@ void __init ebus_init(void)
}
}
pdev = pci_get_device(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_EBUS, 0);
pdev = pci_get_device(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_EBUS, NULL);
if (!pdev) {
return;
}
@ -284,7 +284,7 @@ void __init ebus_init(void)
ebus_chain = ebus = (struct linux_ebus *)
ebus_alloc(sizeof(struct linux_ebus));
ebus->next = 0;
ebus->next = NULL;
while (ebusnd) {
@ -325,8 +325,8 @@ void __init ebus_init(void)
ebus_alloc(sizeof(struct linux_ebus_device));
dev = ebus->devices;
dev->next = 0;
dev->children = 0;
dev->next = NULL;
dev->children = NULL;
dev->bus = ebus;
fill_ebus_device(nd, dev);
@ -335,8 +335,8 @@ void __init ebus_init(void)
ebus_alloc(sizeof(struct linux_ebus_device));
dev = dev->next;
dev->next = 0;
dev->children = 0;
dev->next = NULL;
dev->children = NULL;
dev->bus = ebus;
fill_ebus_device(nd, dev);
}
@ -353,7 +353,7 @@ void __init ebus_init(void)
ebus->next = (struct linux_ebus *)
ebus_alloc(sizeof(struct linux_ebus));
ebus = ebus->next;
ebus->next = 0;
ebus->next = NULL;
++num_ebus;
}
if (pdev)

View File

@ -55,7 +55,7 @@ static int led_read_proc(char *buf, char **start, off_t offset, int count,
return len;
}
static int led_write_proc(struct file *file, const char *buffer,
static int led_write_proc(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
char *buf = NULL;

View File

@ -161,7 +161,7 @@ static struct pcic_sn2list pcic_known_sysnames[] = {
static int pcic0_up;
static struct linux_pcic pcic0;
void * __iomem pcic_regs;
void __iomem *pcic_regs;
volatile int pcic_speculative;
volatile int pcic_trapped;

View File

@ -49,7 +49,7 @@ DEFINE_SPINLOCK(rtc_lock);
enum sparc_clock_type sp_clock_typ;
DEFINE_SPINLOCK(mostek_lock);
void __iomem *mstk48t02_regs = NULL;
static struct mostek48t08 *mstk48t08_regs = NULL;
static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
static int set_rtc_mmss(unsigned long);
static int sbus_do_settimeofday(struct timespec *tv);
@ -342,7 +342,7 @@ static __inline__ void clock_probe(void)
/* XXX r/o attribute is somewhere in r.flags */
r.flags = clk_reg[0].which_io;
r.start = clk_reg[0].phys_addr;
mstk48t08_regs = (struct mostek48t08 *) sbus_ioremap(&r, 0,
mstk48t08_regs = sbus_ioremap(&r, 0,
sizeof(struct mostek48t08), "mk48t08");
mstk48t02_regs = &mstk48t08_regs->regs;

View File

@ -497,7 +497,7 @@ static void __init sun4c_probe_mmu(void)
patch_kernel_fault_handler();
}
volatile unsigned long *sun4c_memerr_reg = NULL;
volatile unsigned long __iomem *sun4c_memerr_reg = NULL;
void __init sun4c_probe_memerr_reg(void)
{

View File

@ -217,8 +217,7 @@ elf_core_copy_task_fpregs(struct task_struct *tsk, struct pt_regs *regs, elf_fpr
if (!tsk_used_math(tsk))
return 0;
if (!regs)
regs = (struct pt_regs *)tsk->thread.rsp0;
--regs;
regs = ((struct pt_regs *)tsk->thread.rsp0) - 1;
if (tsk == current)
unlazy_fpu(tsk);
set_fs(KERNEL_DS);

View File

@ -1181,7 +1181,7 @@ int __cpu_disable(void)
if (cpu == 0)
return -EBUSY;
disable_APIC_timer();
clear_local_APIC();
/*
* HACK:

View File

@ -59,7 +59,7 @@ static int notsc __initdata = 0;
unsigned int cpu_khz; /* TSC clocks / usec, not used here */
static unsigned long hpet_period; /* fsecs / HPET clock */
unsigned long hpet_tick; /* HPET clocks / interrupt */
static int hpet_use_timer;
static int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
unsigned long vxtime_hz = PIT_TICK_RATE;
int report_lost_ticks; /* command line option */
unsigned long long monotonic_base;
@ -908,12 +908,14 @@ void __init time_init(void)
if (!hpet_init())
vxtime_hz = (1000000000000000L + hpet_period / 2) /
hpet_period;
else
vxtime.hpet_address = 0;
if (hpet_use_timer) {
cpu_khz = hpet_calibrate_tsc();
timename = "HPET";
#ifdef CONFIG_X86_PM_TIMER
} else if (pmtmr_ioport) {
} else if (pmtmr_ioport && !vxtime.hpet_address) {
vxtime_hz = PM_TIMER_FREQUENCY;
timename = "PM";
pit_init();

View File

@ -247,9 +247,15 @@ void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
return __ioremap(phys_addr, size, _PAGE_PCD);
}
/**
* iounmap - Free a IO remapping
* @addr: virtual address from ioremap_*
*
* Caller must ensure there is only one unmapping for the same pointer.
*/
void iounmap(volatile void __iomem *addr)
{
struct vm_struct *p;
struct vm_struct *p, *o;
if (addr <= high_memory)
return;
@ -257,12 +263,31 @@ void iounmap(volatile void __iomem *addr)
addr < phys_to_virt(ISA_END_ADDRESS))
return;
write_lock(&vmlist_lock);
p = __remove_vm_area((void *)((unsigned long)addr & PAGE_MASK));
if (!p)
addr = (volatile void __iomem *)(PAGE_MASK & (unsigned long __force)addr);
/* Use the vm area unlocked, assuming the caller
ensures there isn't another iounmap for the same address
in parallel. Reuse of the virtual address is prevented by
leaving it in the global lists until we're done with it.
cpa takes care of the direct mappings. */
read_lock(&vmlist_lock);
for (p = vmlist; p; p = p->next) {
if (p->addr == addr)
break;
}
read_unlock(&vmlist_lock);
if (!p) {
printk("iounmap: bad address %p\n", addr);
else if (p->flags >> 20)
dump_stack();
return;
}
/* Reset the direct mapping. Can block */
if (p->flags >> 20)
ioremap_change_attr(p->phys_addr, p->size, 0);
write_unlock(&vmlist_lock);
/* Finally remove it */
o = remove_vm_area((void *)addr);
BUG_ON(p != o || o == NULL);
kfree(p);
}

View File

@ -53,6 +53,8 @@ static int __init populate_memnodemap(
int res = -1;
unsigned long addr, end;
if (shift >= 64)
return -1;
memset(memnodemap, 0xff, sizeof(memnodemap));
for (i = 0; i < numnodes; i++) {
addr = nodes[i].start;
@ -65,7 +67,7 @@ static int __init populate_memnodemap(
if (memnodemap[addr >> shift] != 0xff)
return -1;
memnodemap[addr >> shift] = i;
addr += (1 << shift);
addr += (1UL << shift);
} while (addr < end);
res = 1;
}

View File

@ -8,18 +8,21 @@
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/acpi.h>
#include <linux/bitmap.h>
#include "pci.h"
#define MMCONFIG_APER_SIZE (256*1024*1024)
static DECLARE_BITMAP(fallback_slots, 32);
/* Static virtual mapping of the MMCONFIG aperture */
struct mmcfg_virt {
struct acpi_table_mcfg_config *cfg;
char *virt;
char __iomem *virt;
};
static struct mmcfg_virt *pci_mmcfg_virt;
static char *get_virt(unsigned int seg, int bus)
static char __iomem *get_virt(unsigned int seg, unsigned bus)
{
int cfg_num = -1;
struct acpi_table_mcfg_config *cfg;
@ -27,10 +30,9 @@ static char *get_virt(unsigned int seg, int bus)
while (1) {
++cfg_num;
if (cfg_num >= pci_mmcfg_config_num) {
/* something bad is going on, no cfg table is found. */
/* so we fall back to the old way we used to do this */
/* and just rely on the first entry to be correct. */
return pci_mmcfg_virt[0].virt;
/* Not found - fall back to type 1. This happens
e.g. on the internal devices of a K8 northbridge. */
return NULL;
}
cfg = pci_mmcfg_virt[cfg_num].cfg;
if (cfg->pci_segment_group_number != seg)
@ -41,20 +43,30 @@ static char *get_virt(unsigned int seg, int bus)
}
}
static inline char *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
{
return get_virt(seg, bus) + ((bus << 20) | (devfn << 12));
char __iomem *addr;
if (seg == 0 && bus == 0 && test_bit(PCI_SLOT(devfn), &fallback_slots))
return NULL;
addr = get_virt(seg, bus);
if (!addr)
return NULL;
return addr + ((bus << 20) | (devfn << 12));
}
static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 *value)
{
char *addr = pci_dev_base(seg, bus, devfn);
char __iomem *addr;
/* Why do we have this when nobody checks it. How about a BUG()!? -AK */
if (unlikely(!value || (bus > 255) || (devfn > 255) || (reg > 4095)))
return -EINVAL;
addr = pci_dev_base(seg, bus, devfn);
if (!addr)
return pci_conf1_read(seg,bus,devfn,reg,len,value);
switch (len) {
case 1:
*value = readb(addr + reg);
@ -73,11 +85,16 @@ static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 value)
{
char *addr = pci_dev_base(seg, bus, devfn);
char __iomem *addr;
/* Why do we have this when nobody checks it. How about a BUG()!? -AK */
if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
return -EINVAL;
addr = pci_dev_base(seg, bus, devfn);
if (!addr)
return pci_conf1_write(seg,bus,devfn,reg,len,value);
switch (len) {
case 1:
writeb(value, addr + reg);
@ -98,6 +115,30 @@ static struct pci_raw_ops pci_mmcfg = {
.write = pci_mmcfg_write,
};
/* K8 systems have some devices (typically in the builtin northbridge)
that are only accessible using type1
Normally this can be expressed in the MCFG by not listing them
and assigning suitable _SEGs, but this isn't implemented in some BIOS.
Instead try to discover all devices on bus 0 that are unreachable using MM
and fallback for them.
We only do this for bus 0/seg 0 */
static __init void unreachable_devices(void)
{
int i;
for (i = 0; i < 32; i++) {
u32 val1;
char __iomem *addr;
pci_conf1_read(0, 0, PCI_DEVFN(i,0), 0, 4, &val1);
if (val1 == 0xffffffff)
continue;
addr = pci_dev_base(0, 0, PCI_DEVFN(i, 0));
if (addr == NULL|| readl(addr) != val1) {
set_bit(i, &fallback_slots);
}
}
}
static int __init pci_mmcfg_init(void)
{
int i;
@ -128,6 +169,8 @@ static int __init pci_mmcfg_init(void)
printk(KERN_INFO "PCI: Using MMCONFIG at %x\n", pci_mmcfg_config[i].base_address);
}
unreachable_devices();
raw_pci_ops = &pci_mmcfg;
pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;

View File

@ -123,7 +123,7 @@ static int __init adummy_init(void)
}
memset(adummy_dev, 0, sizeof(struct adummy_dev));
atm_dev = atm_dev_register(DEV_LABEL, &adummy_ops, -1, 0);
atm_dev = atm_dev_register(DEV_LABEL, &adummy_ops, -1, NULL);
if (!atm_dev) {
printk(KERN_ERR DEV_LABEL ": atm_dev_register() failed\n");
err = -ENODEV;

View File

@ -28,7 +28,6 @@
static struct sysdev_class memory_sysdev_class = {
set_kset_name(MEMORY_CLASS_NAME),
};
EXPORT_SYMBOL(memory_sysdev_class);
static char *memory_hotplug_name(struct kset *kset, struct kobject *kobj)
{

View File

@ -1464,8 +1464,10 @@ static int deregister_disk(struct gendisk *disk, drive_info_struct *drv,
request_queue_t *q = disk->queue;
if (disk->flags & GENHD_FL_UP)
del_gendisk(disk);
if (q)
if (q) {
blk_cleanup_queue(q);
drv->queue = NULL;
}
}
}

View File

@ -1312,6 +1312,8 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
{
drm_radeon_private_t *dev_priv = dev->dev_private;;
unsigned int mem_size;
DRM_DEBUG("\n");
dev_priv->is_pci = init->is_pci;
@ -1521,8 +1523,11 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
+ dev_priv->fb_location) >> 10));
dev_priv->gart_size = init->gart_size;
dev_priv->gart_vm_start = dev_priv->fb_location
+ RADEON_READ(RADEON_CONFIG_APER_SIZE);
mem_size = RADEON_READ(RADEON_CONFIG_MEMSIZE);
if (mem_size == 0)
mem_size = 0x800000;
dev_priv->gart_vm_start = dev_priv->fb_location + mem_size;
#if __OS_HAS_AGP
if (!dev_priv->is_pci)

View File

@ -379,6 +379,7 @@ extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp,
# define RADEON_PLL_WR_EN (1 << 7)
#define RADEON_CLOCK_CNTL_INDEX 0x0008
#define RADEON_CONFIG_APER_SIZE 0x0108
#define RADEON_CONFIG_MEMSIZE 0x00f8
#define RADEON_CRTC_OFFSET 0x0224
#define RADEON_CRTC_OFFSET_CNTL 0x0228
# define RADEON_CRTC_TILE_EN (1 << 15)

View File

@ -2399,7 +2399,8 @@ static int init_one_smi(int intf_num, struct smi_info **smi)
new_smi->handlers->cleanup(new_smi->si_sm);
kfree(new_smi->si_sm);
}
new_smi->io_cleanup(new_smi);
if (new_smi->io_cleanup)
new_smi->io_cleanup(new_smi);
return rv;
}
@ -2518,7 +2519,8 @@ static void __exit cleanup_one_si(struct smi_info *to_clean)
kfree(to_clean->si_sm);
to_clean->io_cleanup(to_clean);
if (to_clean->io_cleanup)
to_clean->io_cleanup(to_clean);
}
static __exit void cleanup_ipmi_si(void)

View File

@ -69,7 +69,7 @@ typedef struct _MW_ABILITIES {
typedef struct _MW_READWRITE {
unsigned short usDspAddress; /* The dsp address */
unsigned long ulDataLength; /* The size in bytes of the data or user buffer */
void *pBuf; /* Input:variable sized buffer */
void __user *pBuf; /* Input:variable sized buffer */
} MW_READWRITE, *pMW_READWRITE;
#define IOCTL_MW_RESET _IO(MWAVE_MINOR,1)

View File

@ -1444,6 +1444,7 @@ static int cmm_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
dev_link_t *link;
int size;
int rc;
void __user *argp = (void __user *)arg;
#ifdef PCMCIA_DEBUG
char *ioctl_names[CM_IOC_MAXNR + 1] = {
[_IOC_NR(CM_IOCGSTATUS)] "CM_IOCGSTATUS",
@ -1481,11 +1482,11 @@ static int cmm_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
_IOC_DIR(cmd), _IOC_READ, _IOC_WRITE, size, cmd);
if (_IOC_DIR(cmd) & _IOC_READ) {
if (!access_ok(VERIFY_WRITE, (void *)arg, size))
if (!access_ok(VERIFY_WRITE, argp, size))
return -EFAULT;
}
if (_IOC_DIR(cmd) & _IOC_WRITE) {
if (!access_ok(VERIFY_READ, (void *)arg, size))
if (!access_ok(VERIFY_READ, argp, size))
return -EFAULT;
}
@ -1506,14 +1507,14 @@ static int cmm_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
status |= CM_NO_READER;
if (test_bit(IS_BAD_CARD, &dev->flags))
status |= CM_BAD_CARD;
if (copy_to_user((int *)arg, &status, sizeof(int)))
if (copy_to_user(argp, &status, sizeof(int)))
return -EFAULT;
}
return 0;
case CM_IOCGATR:
DEBUGP(4, dev, "... in CM_IOCGATR\n");
{
struct atreq *atreq = (struct atreq *) arg;
struct atreq __user *atreq = argp;
int tmp;
/* allow nonblocking io and being interrupted */
if (wait_event_interruptible
@ -1597,7 +1598,7 @@ static int cmm_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
{
struct ptsreq krnptsreq;
if (copy_from_user(&krnptsreq, (struct ptsreq *) arg,
if (copy_from_user(&krnptsreq, argp,
sizeof(struct ptsreq)))
return -EFAULT;
@ -1641,7 +1642,7 @@ static int cmm_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
int old_pc_debug = 0;
old_pc_debug = pc_debug;
if (copy_from_user(&pc_debug, (int *)arg, sizeof(int)))
if (copy_from_user(&pc_debug, argp, sizeof(int)))
return -EFAULT;
if (old_pc_debug != pc_debug)

View File

@ -72,7 +72,7 @@ static __inline__ void booke_wdt_ping(void)
/*
* booke_wdt_write:
*/
static ssize_t booke_wdt_write (struct file *file, const char *buf,
static ssize_t booke_wdt_write (struct file *file, const char __user *buf,
size_t count, loff_t *ppos)
{
booke_wdt_ping();
@ -92,14 +92,15 @@ static int booke_wdt_ioctl (struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg)
{
u32 tmp = 0;
u32 __user *p = (u32 __user *)arg;
switch (cmd) {
case WDIOC_GETSUPPORT:
if (copy_to_user ((struct watchdog_info *) arg, &ident,
if (copy_to_user ((struct watchdog_info __user *) arg, &ident,
sizeof(struct watchdog_info)))
return -EFAULT;
case WDIOC_GETSTATUS:
return put_user(ident.options, (u32 *) arg);
return put_user(ident.options, p);
case WDIOC_GETBOOTSTATUS:
/* XXX: something is clearing TSR */
tmp = mfspr(SPRN_TSR) & TSR_WRS(3);
@ -109,14 +110,14 @@ static int booke_wdt_ioctl (struct inode *inode, struct file *file,
booke_wdt_ping();
return 0;
case WDIOC_SETTIMEOUT:
if (get_user(booke_wdt_period, (u32 *) arg))
if (get_user(booke_wdt_period, p))
return -EFAULT;
mtspr(SPRN_TCR, (mfspr(SPRN_TCR)&~WDTP(0))|WDTP(booke_wdt_period));
return 0;
case WDIOC_GETTIMEOUT:
return put_user(booke_wdt_period, (u32 *) arg);
return put_user(booke_wdt_period, p);
case WDIOC_SETOPTIONS:
if (get_user(tmp, (u32 *) arg))
if (get_user(tmp, p))
return -EINVAL;
if (tmp == WDIOS_ENABLECARD) {
booke_wdt_ping();

View File

@ -320,7 +320,7 @@ static int
wdrtas_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg)
{
int __user *argp = (void *)arg;
int __user *argp = (void __user *)arg;
int i;
static struct watchdog_info wdinfo = {
.options = WDRTAS_SUPPORTED_MASK,

View File

@ -105,8 +105,8 @@ static int create_packet(void *data, size_t length)
int ordernum = 0;
int retval = 0;
unsigned int packet_array_size = 0;
void **invalid_addr_packet_array = 0;
void *packet_data_temp_buf = 0;
void **invalid_addr_packet_array = NULL;
void *packet_data_temp_buf = NULL;
unsigned int idx = 0;
pr_debug("create_packet: entry \n");
@ -178,7 +178,7 @@ static int create_packet(void *data, size_t length)
packet_data_temp_buf),
allocation_floor);
invalid_addr_packet_array[idx++] = packet_data_temp_buf;
packet_data_temp_buf = 0;
packet_data_temp_buf = NULL;
}
}
spin_lock(&rbu_data.lock);

View File

@ -529,14 +529,15 @@ mv64xxx_i2c_probe(struct platform_device *pd)
i2c_set_adapdata(&drv_data->adapter, drv_data);
if (request_irq(drv_data->irq, mv64xxx_i2c_intr, 0,
MV64XXX_I2C_CTLR_NAME, drv_data)) {
dev_err(dev, "mv64xxx: Can't register intr handler "
"irq: %d\n", drv_data->irq);
MV64XXX_I2C_CTLR_NAME, drv_data)) {
dev_err(&drv_data->adapter.dev,
"mv64xxx: Can't register intr handler irq: %d\n",
drv_data->irq);
rc = -EINVAL;
goto exit_unmap_regs;
} else if ((rc = i2c_add_adapter(&drv_data->adapter)) != 0) {
dev_err(dev, "mv64xxx: Can't add i2c adapter, rc: %d\n", -rc);
dev_err(&drv_data->adapter.dev,
"mv64xxx: Can't add i2c adapter, rc: %d\n", -rc);
goto exit_free_irq;
}

View File

@ -807,14 +807,6 @@ config BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX
endchoice
config BLK_DEV_IDE_AU1XXX_BURSTABLE_ON
bool "Enable burstable Mode on DbDMA"
default false
depends BLK_DEV_IDE_AU1XXX
help
This option enable the burstable Flag on DbDMA controller
(cf. "AMD Alchemy 'Au1200' Processor Data Book - PRELIMINARY").
config BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ
int "Maximum transfer size (KB) per request (up to 128)"
default "128"
@ -940,7 +932,7 @@ config BLK_DEV_Q40IDE
config BLK_DEV_MPC8xx_IDE
bool "MPC8xx IDE support"
depends on 8xx
depends on 8xx && IDE=y && BLK_DEV_IDE=y
help
This option provides support for IDE on Motorola MPC8xx Systems.
Please see 'Type of MPC8xx IDE interface' for details.

View File

@ -1292,7 +1292,6 @@ static ide_startstop_t cdrom_start_seek (ide_drive_t *drive, unsigned int block)
struct cdrom_info *info = drive->driver_data;
info->dma = 0;
info->cmd = 0;
info->start_seek = jiffies;
return cdrom_start_packet_command(drive, 0, cdrom_start_seek_continuation);
}
@ -1344,8 +1343,6 @@ static ide_startstop_t cdrom_start_read (ide_drive_t *drive, unsigned int block)
(rq->nr_sectors & (sectors_per_frame - 1)))
info->dma = 0;
info->cmd = READ;
/* Start sending the read request to the drive. */
return cdrom_start_packet_command(drive, 32768, cdrom_start_read_continuation);
}
@ -1484,7 +1481,6 @@ static ide_startstop_t cdrom_do_packet_command (ide_drive_t *drive)
struct cdrom_info *info = drive->driver_data;
info->dma = 0;
info->cmd = 0;
rq->flags &= ~REQ_FAILED;
len = rq->data_len;
@ -1891,7 +1887,6 @@ static ide_startstop_t cdrom_start_write(ide_drive_t *drive, struct request *rq)
/* use dma, if possible. we don't need to check more, since we
* know that the transfer is always (at least!) frame aligned */
info->dma = drive->using_dma ? 1 : 0;
info->cmd = WRITE;
info->devinfo.media_written = 1;
@ -1916,7 +1911,6 @@ static ide_startstop_t cdrom_do_block_pc(ide_drive_t *drive, struct request *rq)
rq->flags |= REQ_QUIET;
info->dma = 0;
info->cmd = 0;
/*
* sg request
@ -1925,7 +1919,6 @@ static ide_startstop_t cdrom_do_block_pc(ide_drive_t *drive, struct request *rq)
int mask = drive->queue->dma_alignment;
unsigned long addr = (unsigned long) page_address(bio_page(rq->bio));
info->cmd = rq_data_dir(rq);
info->dma = drive->using_dma;
/*

View File

@ -480,7 +480,6 @@ struct cdrom_info {
struct request request_sense_request;
int dma;
int cmd;
unsigned long last_block;
unsigned long start_seek;
/* Buffer to hold mechanism status and changer slot table. */

View File

@ -1034,12 +1034,12 @@ static int ide_disk_remove(struct device *dev)
struct ide_disk_obj *idkp = drive->driver_data;
struct gendisk *g = idkp->disk;
ide_cacheflush_p(drive);
ide_unregister_subdriver(drive, idkp->driver);
del_gendisk(g);
ide_cacheflush_p(drive);
ide_disk_put(idkp);
return 0;

View File

@ -90,11 +90,6 @@
#include <asm/io.h>
#include <asm/irq.h>
struct drive_list_entry {
const char *id_model;
const char *id_firmware;
};
static const struct drive_list_entry drive_whitelist [] = {
{ "Micropolis 2112A" , "ALL" },
@ -139,7 +134,7 @@ static const struct drive_list_entry drive_blacklist [] = {
};
/**
* in_drive_list - look for drive in black/white list
* ide_in_drive_list - look for drive in black/white list
* @id: drive identifier
* @drive_table: list to inspect
*
@ -147,7 +142,7 @@ static const struct drive_list_entry drive_blacklist [] = {
* Returns 1 if the drive is found in the table.
*/
static int in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
{
for ( ; drive_table->id_model ; drive_table++)
if ((!strcmp(drive_table->id_model, id->model)) &&
@ -157,6 +152,8 @@ static int in_drive_list(struct hd_driveid *id, const struct drive_list_entry *d
return 0;
}
EXPORT_SYMBOL_GPL(ide_in_drive_list);
/**
* ide_dma_intr - IDE DMA interrupt handler
* @drive: the drive the interrupt is for
@ -663,7 +660,7 @@ int __ide_dma_bad_drive (ide_drive_t *drive)
{
struct hd_driveid *id = drive->id;
int blacklist = in_drive_list(id, drive_blacklist);
int blacklist = ide_in_drive_list(id, drive_blacklist);
if (blacklist) {
printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
drive->name, id->model);
@ -677,7 +674,7 @@ EXPORT_SYMBOL(__ide_dma_bad_drive);
int __ide_dma_good_drive (ide_drive_t *drive)
{
struct hd_driveid *id = drive->id;
return in_drive_list(id, drive_whitelist);
return ide_in_drive_list(id, drive_whitelist);
}
EXPORT_SYMBOL(__ide_dma_good_drive);

View File

@ -1 +1,4 @@
obj-$(CONFIG_BLK_DEV_IDE_SWARM) += swarm.o
obj-$(CONFIG_BLK_DEV_IDE_AU1XXX) += au1xxx-ide.o
EXTRA_CFLAGS := -Idrivers/ide

File diff suppressed because it is too large Load Diff

View File

@ -622,12 +622,18 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
ide_hwif_t *hwif;
int h;
/*
* Find an empty HWIF; if none available, return -ENOMEM.
*/
for (h = 0; h < MAX_HWIFS; ++h) {
hwif = &ide_hwifs[h];
/* Find an empty HWIF */
if (hwif->chipset == ide_unknown)
break;
}
if (h == MAX_HWIFS) {
printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", d->name);
return -ENOMEM;
}
/* Get the CmdBlk and CtrlBlk Base Registers */
base = pci_resource_start(dev, 0) + IOC4_CMD_OFFSET;

View File

@ -80,6 +80,7 @@ static struct via_isa_bridge {
u16 flags;
} via_isa_bridges[] = {
{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
{ "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },

View File

@ -320,7 +320,7 @@ static struct dmi_system_id dmi_ids[] = {
},
.driver_data = keymap_acer_aspire_1500
},
{ 0, }
{ NULL, }
};
static int __init select_keymap(void)

View File

@ -42,7 +42,7 @@ static struct alps_model_info alps_model_data[] = {
{ { 0x53, 0x02, 0x14 }, 0xf8, 0xf8, 0 },
{ { 0x63, 0x02, 0x0a }, 0xf8, 0xf8, 0 },
{ { 0x63, 0x02, 0x14 }, 0xf8, 0xf8, 0 },
{ { 0x63, 0x02, 0x28 }, 0xf8, 0xf8, 0 },
{ { 0x63, 0x02, 0x28 }, 0xf8, 0xf8, ALPS_FW_BK_2 }, /* Fujitsu Siemens S6010 */
{ { 0x63, 0x02, 0x3c }, 0x8f, 0x8f, ALPS_WHEEL }, /* Toshiba Satellite S2400-103 */
{ { 0x63, 0x02, 0x50 }, 0xef, 0xef, ALPS_FW_BK_1 }, /* NEC Versa L320 */
{ { 0x63, 0x02, 0x64 }, 0xf8, 0xf8, 0 },

View File

@ -406,7 +406,7 @@ static int ca_send_message(struct dst_state *state, struct ca_msg *p_ca_message,
}
dprintk(verbose, DST_CA_DEBUG, 1, " ");
if (copy_from_user(p_ca_message, (void *)arg, sizeof (struct ca_msg))) {
if (copy_from_user(p_ca_message, arg, sizeof (struct ca_msg))) {
result = -EFAULT;
goto free_mem_and_exit;
}
@ -579,7 +579,7 @@ static int dst_ca_release(struct inode *inode, struct file *file)
return 0;
}
static int dst_ca_read(struct file *file, char __user *buffer, size_t length, loff_t *offset)
static ssize_t dst_ca_read(struct file *file, char __user *buffer, size_t length, loff_t *offset)
{
int bytes_read = 0;
@ -588,7 +588,7 @@ static int dst_ca_read(struct file *file, char __user *buffer, size_t length, lo
return bytes_read;
}
static int dst_ca_write(struct file *file, const char __user *buffer, size_t length, loff_t *offset)
static ssize_t dst_ca_write(struct file *file, const char __user *buffer, size_t length, loff_t *offset)
{
dprintk(verbose, DST_CA_DEBUG, 1, " Device write.");

View File

@ -126,7 +126,7 @@ u32 em28xx_request_buffers(struct em28xx *dev, u32 count)
const size_t imagesize = PAGE_ALIGN(dev->frame_size); /*needs to be page aligned cause the buffers can be mapped individually! */
void *buff = NULL;
u32 i;
em28xx_coredbg("requested %i buffers with size %i", count, imagesize);
em28xx_coredbg("requested %i buffers with size %zd", count, imagesize);
if (count > EM28XX_NUM_FRAMES)
count = EM28XX_NUM_FRAMES;

View File

@ -679,7 +679,15 @@ static void mmc_idle_cards(struct mmc_host *host)
}
/*
* Apply power to the MMC stack.
* Apply power to the MMC stack. This is a two-stage process.
* First, we enable power to the card without the clock running.
* We then wait a bit for the power to stabilise. Finally,
* enable the bus drivers and clock to the card.
*
* We must _NOT_ enable the clock prior to power stablising.
*
* If a host does all the power sequencing itself, ignore the
* initial MMC_POWER_UP stage.
*/
static void mmc_power_up(struct mmc_host *host)
{

View File

@ -3078,7 +3078,7 @@ int s2io_set_swapper(nic_t * sp)
static int wait_for_msix_trans(nic_t *nic, int i)
{
XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
XENA_dev_config_t __iomem *bar0 = nic->bar0;
u64 val64;
int ret = 0, cnt = 0;
@ -3099,7 +3099,7 @@ static int wait_for_msix_trans(nic_t *nic, int i)
void restore_xmsi_data(nic_t *nic)
{
XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
XENA_dev_config_t __iomem *bar0 = nic->bar0;
u64 val64;
int i;
@ -3117,7 +3117,7 @@ void restore_xmsi_data(nic_t *nic)
static void store_xmsi_data(nic_t *nic)
{
XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
XENA_dev_config_t __iomem *bar0 = nic->bar0;
u64 val64, addr, data;
int i;
@ -3140,7 +3140,7 @@ static void store_xmsi_data(nic_t *nic)
int s2io_enable_msi(nic_t *nic)
{
XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
XENA_dev_config_t __iomem *bar0 = nic->bar0;
u16 msi_ctrl, msg_val;
struct config_param *config = &nic->config;
struct net_device *dev = nic->dev;
@ -3190,7 +3190,7 @@ int s2io_enable_msi(nic_t *nic)
int s2io_enable_msi_x(nic_t *nic)
{
XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
XENA_dev_config_t __iomem *bar0 = nic->bar0;
u64 tx_mat, rx_mat;
u16 msi_control; /* Temp variable */
int ret, i, j, msix_indx = 1;

View File

@ -2280,11 +2280,13 @@ static int skge_xmit_frame(struct sk_buff *skb, struct net_device *dev)
}
if (unlikely(skge->tx_avail < skb_shinfo(skb)->nr_frags +1)) {
netif_stop_queue(dev);
spin_unlock_irqrestore(&skge->tx_lock, flags);
if (!netif_queue_stopped(dev)) {
netif_stop_queue(dev);
printk(KERN_WARNING PFX "%s: ring full when queue awake!\n",
dev->name);
printk(KERN_WARNING PFX "%s: ring full when queue awake!\n",
dev->name);
}
spin_unlock_irqrestore(&skge->tx_lock, flags);
return NETDEV_TX_BUSY;
}

View File

@ -68,8 +68,8 @@
#define DRV_MODULE_NAME "tg3"
#define PFX DRV_MODULE_NAME ": "
#define DRV_MODULE_VERSION "3.44"
#define DRV_MODULE_RELDATE "Dec 6, 2005"
#define DRV_MODULE_VERSION "3.45"
#define DRV_MODULE_RELDATE "Dec 13, 2005"
#define TG3_DEF_MAC_MODE 0
#define TG3_DEF_RX_MODE 0
@ -1025,7 +1025,9 @@ static void tg3_frob_aux_power(struct tg3 *tp)
if ((tp->tg3_flags & TG3_FLAG_WOL_ENABLE) != 0 ||
(tp_peer->tg3_flags & TG3_FLAG_WOL_ENABLE) != 0) {
(tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0 ||
(tp_peer->tg3_flags & TG3_FLAG_WOL_ENABLE) != 0 ||
(tp_peer->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0) {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701) {
tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl |
@ -1105,6 +1107,8 @@ static int tg3_setup_phy(struct tg3 *, int);
static void tg3_write_sig_post_reset(struct tg3 *, int);
static int tg3_halt_cpu(struct tg3 *, u32);
static int tg3_nvram_lock(struct tg3 *);
static void tg3_nvram_unlock(struct tg3 *);
static int tg3_set_power_state(struct tg3 *tp, int state)
{
@ -1179,6 +1183,21 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
tg3_setup_phy(tp, 0);
}
if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
int i;
u32 val;
for (i = 0; i < 200; i++) {
tg3_read_mem(tp, NIC_SRAM_FW_ASF_STATUS_MBOX, &val);
if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1)
break;
msleep(1);
}
}
tg3_write_mem(tp, NIC_SRAM_WOL_MBOX, WOL_SIGNATURE |
WOL_DRV_STATE_SHUTDOWN |
WOL_DRV_WOL | WOL_SET_MAGIC_PKT);
pci_read_config_word(tp->pdev, pm + PCI_PM_PMC, &power_caps);
if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE) {
@ -1268,6 +1287,17 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
}
}
if (!(tp->tg3_flags & TG3_FLAG_WOL_ENABLE) &&
!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
/* Turn off the PHY */
if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
tg3_writephy(tp, MII_TG3_EXT_CTRL,
MII_TG3_EXT_CTRL_FORCE_LED_OFF);
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x01b2);
tg3_writephy(tp, MII_BMCR, BMCR_PDOWN);
}
}
tg3_frob_aux_power(tp);
/* Workaround for unstable PLL clock */
@ -1277,8 +1307,12 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
val &= ~((1 << 16) | (1 << 4) | (1 << 2) | (1 << 1) | 1);
tw32(0x7d00, val);
if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF))
if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
tg3_nvram_lock(tp);
tg3_halt_cpu(tp, RX_CPU_BASE);
tw32_f(NVRAM_SWARB, SWARB_REQ_CLR0);
tg3_nvram_unlock(tp);
}
}
/* Finally, set the new power state. */
@ -1812,7 +1846,7 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
}
}
relink:
if (current_link_up == 0) {
if (current_link_up == 0 || tp->link_config.phy_is_low_power) {
u32 tmp;
tg3_phy_copper_begin(tp);
@ -8533,6 +8567,7 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) {
tp->tg3_flags |= TG3_FLAG_NVRAM;
tg3_nvram_lock(tp);
tg3_enable_nvram_access(tp);
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
@ -8543,6 +8578,7 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
tg3_get_nvram_size(tp);
tg3_disable_nvram_access(tp);
tg3_nvram_unlock(tp);
} else {
tp->tg3_flags &= ~(TG3_FLAG_NVRAM | TG3_FLAG_NVRAM_BUFFERED);
@ -8640,10 +8676,10 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
if (ret == 0)
*val = swab32(tr32(NVRAM_RDDATA));
tg3_nvram_unlock(tp);
tg3_disable_nvram_access(tp);
tg3_nvram_unlock(tp);
return ret;
}
@ -8728,6 +8764,10 @@ static int tg3_nvram_write_block_unbuffered(struct tg3 *tp, u32 offset, u32 len,
offset = offset + (pagesize - page_off);
/* Nvram lock released by tg3_nvram_read() above,
* so need to get it again.
*/
tg3_nvram_lock(tp);
tg3_enable_nvram_access(tp);
/*
@ -10437,8 +10477,13 @@ static struct pci_dev * __devinit tg3_find_5704_peer(struct tg3 *tp)
break;
pci_dev_put(peer);
}
if (!peer || peer == tp->pdev)
BUG();
/* 5704 can be configured in single-port mode, set peer to
* tp->pdev in that case.
*/
if (!peer) {
peer = tp->pdev;
return peer;
}
/*
* We don't need to keep the refcount elevated; there's no way
@ -10820,12 +10865,14 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state)
tg3_full_lock(tp, 0);
tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE;
tg3_full_unlock(tp);
err = tg3_set_power_state(tp, pci_choose_state(pdev, state));
if (err) {
tg3_full_lock(tp, 0);
tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE;
tg3_init_hw(tp);
tp->timer.expires = jiffies + tp->timer_offset;
@ -10859,6 +10906,7 @@ static int tg3_resume(struct pci_dev *pdev)
tg3_full_lock(tp, 0);
tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE;
tg3_init_hw(tp);
tp->timer.expires = jiffies + tp->timer_offset;

View File

@ -1529,6 +1529,12 @@
#define NIC_SRAM_MAC_ADDR_HIGH_MBOX 0x00000c14
#define NIC_SRAM_MAC_ADDR_LOW_MBOX 0x00000c18
#define NIC_SRAM_WOL_MBOX 0x00000d30
#define WOL_SIGNATURE 0x474c0000
#define WOL_DRV_STATE_SHUTDOWN 0x00000001
#define WOL_DRV_WOL 0x00000002
#define WOL_SET_MAGIC_PKT 0x00000004
#define NIC_SRAM_DATA_CFG_2 0x00000d38
#define SHASTA_EXT_LED_MODE_MASK 0x00018000
@ -1565,6 +1571,7 @@
#define MII_TG3_EXT_CTRL 0x10 /* Extended control register */
#define MII_TG3_EXT_CTRL_FIFO_ELASTIC 0x0001
#define MII_TG3_EXT_CTRL_LNK3_LED_MODE 0x0002
#define MII_TG3_EXT_CTRL_FORCE_LED_OFF 0x0008
#define MII_TG3_EXT_CTRL_TBI 0x8000
#define MII_TG3_EXT_STAT 0x11 /* Extended status register */

View File

@ -6,6 +6,9 @@ obj-y += access.o bus.o probe.o remove.o pci.o quirks.o \
pci-driver.o search.o pci-sysfs.o rom.o setup-res.o
obj-$(CONFIG_PROC_FS) += proc.o
# Build PCI Express stuff if needed
obj-$(CONFIG_PCIEPORTBUS) += pcie/
obj-$(CONFIG_HOTPLUG) += hotplug.o
# Build the PCI Hotplug drivers if we were asked to
@ -40,7 +43,3 @@ endif
ifeq ($(CONFIG_PCI_DEBUG),y)
EXTRA_CFLAGS += -DDEBUG
endif
# Build PCI Express stuff if needed
obj-$(CONFIG_PCIEPORTBUS) += pcie/

View File

@ -249,11 +249,11 @@ static loff_t jsf_lseek(struct file * file, loff_t offset, int orig)
/*
* OS SIMM Cannot be read in other size but a 32bits word.
*/
static ssize_t jsf_read(struct file * file, char * buf,
static ssize_t jsf_read(struct file * file, char __user * buf,
size_t togo, loff_t *ppos)
{
unsigned long p = *ppos;
char *tmp = buf;
char __user *tmp = buf;
union byte4 {
char s[4];
@ -305,7 +305,7 @@ static ssize_t jsf_read(struct file * file, char * buf,
return tmp-buf;
}
static ssize_t jsf_write(struct file * file, const char * buf,
static ssize_t jsf_write(struct file * file, const char __user * buf,
size_t count, loff_t *ppos)
{
return -ENOSPC;
@ -356,10 +356,10 @@ static int jsf_ioctl_erase(unsigned long arg)
* Program a block of flash.
* Very simple because we can do it byte by byte anyway.
*/
static int jsf_ioctl_program(unsigned long arg)
static int jsf_ioctl_program(void __user *arg)
{
struct jsflash_program_arg abuf;
char *uptr;
char __user *uptr;
unsigned long p;
unsigned int togo;
union {
@ -367,13 +367,13 @@ static int jsf_ioctl_program(unsigned long arg)
char s[4];
} b;
if (copy_from_user(&abuf, (char *)arg, JSFPRGSZ))
if (copy_from_user(&abuf, arg, JSFPRGSZ))
return -EFAULT;
p = abuf.off;
togo = abuf.size;
if ((togo & 3) || (p & 3)) return -EINVAL;
uptr = (char *) (unsigned long) abuf.data;
uptr = (char __user *) (unsigned long) abuf.data;
while (togo != 0) {
togo -= 4;
if (copy_from_user(&b.s[0], uptr, 4))
@ -390,19 +390,20 @@ static int jsf_ioctl(struct inode *inode, struct file *f, unsigned int cmd,
unsigned long arg)
{
int error = -ENOTTY;
void __user *argp = (void __user *)arg;
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
switch (cmd) {
case JSFLASH_IDENT:
if (copy_to_user((void *)arg, &jsf0.id, JSFIDSZ))
if (copy_to_user(argp, &jsf0.id, JSFIDSZ))
return -EFAULT;
break;
case JSFLASH_ERASE:
error = jsf_ioctl_erase(arg);
break;
case JSFLASH_PROGRAM:
error = jsf_ioctl_program(arg);
error = jsf_ioctl_program(argp);
break;
}

View File

@ -309,7 +309,7 @@ static void uctrl_do_txn(struct uctrl_txn *txn)
}
}
void uctrl_get_event_status()
void uctrl_get_event_status(void)
{
struct uctrl_driver *driver = &drv;
struct uctrl_txn txn;
@ -318,7 +318,7 @@ void uctrl_get_event_status()
txn.opcode = READ_EVENT_STATUS;
txn.inbits = 0;
txn.outbits = 2;
txn.inbuf = 0;
txn.inbuf = NULL;
txn.outbuf = outbits;
uctrl_do_txn(&txn);
@ -329,7 +329,7 @@ void uctrl_get_event_status()
dprintk(("ev is %x\n", driver->status.event_status));
}
void uctrl_get_external_status()
void uctrl_get_external_status(void)
{
struct uctrl_driver *driver = &drv;
struct uctrl_txn txn;
@ -339,7 +339,7 @@ void uctrl_get_external_status()
txn.opcode = READ_EXTERNAL_STATUS;
txn.inbits = 0;
txn.outbits = 2;
txn.inbuf = 0;
txn.inbuf = NULL;
txn.outbuf = outbits;
uctrl_do_txn(&txn);
@ -414,7 +414,7 @@ static void __exit ts102_uctrl_cleanup(void)
if (driver->irq)
free_irq(driver->irq, driver);
if (driver->regs)
driver->regs = 0;
driver->regs = NULL;
}
module_init(ts102_uctrl_init);

View File

@ -125,7 +125,7 @@ struct vfc_regs {
struct vfc_dev {
volatile struct vfc_regs *regs;
volatile struct vfc_regs __iomem *regs;
struct vfc_regs *phys_regs;
unsigned int control_reg;
struct semaphore device_lock_sem;

View File

@ -149,7 +149,7 @@ int init_vfc_device(struct sbus_dev *sdev,struct vfc_dev *dev, int instance)
}
printk("Initializing vfc%d\n",instance);
dev->regs = NULL;
dev->regs = (volatile struct vfc_regs *)
dev->regs = (volatile struct vfc_regs __iomem *)
sbus_ioremap(&sdev->resource[0], 0,
sizeof(struct vfc_regs), vfcstr);
dev->which_io = sdev->reg_addrs[0].which_io;
@ -319,7 +319,7 @@ int vfc_capture_poll(struct vfc_dev *dev)
int timeout = 1000;
while (!timeout--) {
if (dev->regs->control & VFC_STATUS_CAPTURE)
if (sbus_readl(&dev->regs->control) & VFC_STATUS_CAPTURE)
break;
vfc_i2c_delay_no_busy(dev, 100);
}
@ -718,7 +718,7 @@ static void deinit_vfc_device(struct vfc_dev *dev)
if(dev == NULL)
return;
devfs_remove("vfc/%d", dev->instance);
sbus_iounmap((unsigned long)dev->regs, sizeof(struct vfc_regs));
sbus_iounmap(dev->regs, sizeof(struct vfc_regs));
kfree(dev);
}

View File

@ -100,7 +100,7 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
void ibmvscsi_release_crq_queue(struct crq_queue *queue,
struct ibmvscsi_host_data *hostdata,
int max_requests);
void ibmvscsi_reset_crq_queue(struct crq_queue *queue,
int ibmvscsi_reset_crq_queue(struct crq_queue *queue,
struct ibmvscsi_host_data *hostdata);
void ibmvscsi_handle_crq(struct viosrp_crq *crq,

View File

@ -117,9 +117,10 @@ void ibmvscsi_release_crq_queue(struct crq_queue *queue,
*
* no-op for iSeries
*/
void ibmvscsi_reset_crq_queue(struct crq_queue *queue,
int ibmvscsi_reset_crq_queue(struct crq_queue *queue,
struct ibmvscsi_host_data *hostdata)
{
return 0;
}
/**

View File

@ -230,6 +230,11 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
rc = plpar_hcall_norets(H_REG_CRQ,
vdev->unit_address,
queue->msg_token, PAGE_SIZE);
if (rc == H_Resource)
/* maybe kexecing and resource is busy. try a reset */
rc = ibmvscsi_reset_crq_queue(queue,
hostdata);
if (rc == 2) {
/* Adapter is good, but other end is not ready */
printk(KERN_WARNING "ibmvscsi: Partner adapter not ready\n");
@ -281,7 +286,7 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
* @hostdata: ibmvscsi_host_data of host
*
*/
void ibmvscsi_reset_crq_queue(struct crq_queue *queue,
int ibmvscsi_reset_crq_queue(struct crq_queue *queue,
struct ibmvscsi_host_data *hostdata)
{
int rc;
@ -309,4 +314,5 @@ void ibmvscsi_reset_crq_queue(struct crq_queue *queue,
printk(KERN_WARNING
"ibmvscsi: couldn't register crq--rc 0x%x\n", rc);
}
return rc;
}

View File

@ -3368,7 +3368,7 @@ iscsi_conn_set_param(iscsi_connh_t connh, enum iscsi_param param,
switch(param) {
case ISCSI_PARAM_MAX_RECV_DLENGTH: {
char *saveptr = conn->data;
int flags = GFP_KERNEL;
gfp_t flags = GFP_KERNEL;
if (conn->data_size >= value) {
conn->max_recv_dlength = value;

View File

@ -2443,7 +2443,7 @@ static void ata_sg_clean(struct ata_queued_cmd *qc)
struct scatterlist *psg = &qc->pad_sgent;
void *addr = kmap_atomic(psg->page, KM_IRQ0);
memcpy(addr + psg->offset, pad_buf, qc->pad_len);
kunmap_atomic(psg->page, KM_IRQ0);
kunmap_atomic(addr, KM_IRQ0);
}
} else {
if (sg_dma_len(&sg[0]) > 0)
@ -2717,7 +2717,7 @@ static int ata_sg_setup(struct ata_queued_cmd *qc)
if (qc->tf.flags & ATA_TFLAG_WRITE) {
void *addr = kmap_atomic(psg->page, KM_IRQ0);
memcpy(pad_buf, addr + psg->offset, qc->pad_len);
kunmap_atomic(psg->page, KM_IRQ0);
kunmap_atomic(addr, KM_IRQ0);
}
sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);

View File

@ -2173,9 +2173,12 @@ ata_scsi_find_dev(struct ata_port *ap, const struct scsi_device *scsidev)
if (unlikely(!ata_dev_present(dev)))
return NULL;
if (!atapi_enabled) {
if (unlikely(dev->class == ATA_DEV_ATAPI))
if (!atapi_enabled || (ap->flags & ATA_FLAG_NO_ATAPI)) {
if (unlikely(dev->class == ATA_DEV_ATAPI)) {
printk(KERN_WARNING "ata%u(%u): WARNING: ATAPI is %s, device ignored.\n",
ap->id, dev->devno, atapi_enabled ? "not supported with this driver" : "disabled");
return NULL;
}
}
return dev;

View File

@ -664,7 +664,7 @@ mega_build_cmd(adapter_t *adapter, Scsi_Cmnd *cmd, int *busy)
sg->offset;
} else
buf = cmd->request_buffer;
memset(cmd->request_buffer, 0, cmd->cmnd[4]);
memset(buf, 0, cmd->cmnd[4]);
if (cmd->use_sg) {
struct scatterlist *sg;

View File

@ -2476,17 +2476,9 @@ typedef struct scsi_qla_host {
*/
#define LOOP_TRANSITION(ha) \
(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || \
test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
#define LOOP_NOT_READY(ha) \
((test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || \
test_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags) || \
test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || \
test_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) || \
test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || \
atomic_read(&ha->loop_state) == LOOP_DOWN)
#define LOOP_RDY(ha) (!LOOP_NOT_READY(ha))
#define TGT_Q(ha, t) (ha->otgt[t])
#define to_qla_host(x) ((scsi_qla_host_t *) (x)->hostdata)

View File

@ -1259,7 +1259,7 @@ qla2x00_configure_hba(scsi_qla_host_t *ha)
rval = qla2x00_get_adapter_id(ha,
&loop_id, &al_pa, &area, &domain, &topo);
if (rval != QLA_SUCCESS) {
if (LOOP_NOT_READY(ha) || atomic_read(&ha->loop_down_timer) ||
if (LOOP_TRANSITION(ha) || atomic_read(&ha->loop_down_timer) ||
(rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
__func__, ha->host_no));
@ -1796,7 +1796,7 @@ qla2x00_configure_loop(scsi_qla_host_t *ha)
}
if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
if (LOOP_NOT_READY(ha)) {
if (LOOP_TRANSITION(ha)) {
rval = QLA_FUNCTION_FAILED;
} else {
rval = qla2x00_configure_fabric(ha);
@ -2369,7 +2369,7 @@ qla2x00_find_all_fabric_devs(scsi_qla_host_t *ha, struct list_head *new_fcports)
if (qla2x00_is_reserved_id(ha, loop_id))
continue;
if (atomic_read(&ha->loop_down_timer) || LOOP_NOT_READY(ha))
if (atomic_read(&ha->loop_down_timer) || LOOP_TRANSITION(ha))
break;
if (swl != NULL) {

View File

@ -909,6 +909,21 @@ qla2x00_status_entry(scsi_qla_host_t *ha, void *pkt)
resid = resid_len;
cp->resid = resid;
CMD_RESID_LEN(cp) = resid;
if (!lscsi_status &&
((unsigned)(cp->request_bufflen - resid) <
cp->underflow)) {
qla_printk(KERN_INFO, ha,
"scsi(%ld:%d:%d:%d): Mid-layer underflow "
"detected (%x of %x bytes)...returning "
"error status.\n", ha->host_no,
cp->device->channel, cp->device->id,
cp->device->lun, resid,
cp->request_bufflen);
cp->result = DID_ERROR << 16;
break;
}
}
cp->result = DID_OK << 16 | lscsi_status;

View File

@ -86,7 +86,8 @@ enum {
MV_FLAG_DUAL_HC = (1 << 30), /* two SATA Host Controllers */
MV_FLAG_IRQ_COALESCE = (1 << 29), /* IRQ coalescing capability */
MV_COMMON_FLAGS = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO),
ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO |
ATA_FLAG_NO_ATAPI),
MV_6XXX_FLAGS = MV_FLAG_IRQ_COALESCE,
CRQB_FLAG_READ = (1 << 0),

View File

@ -70,6 +70,9 @@ enum {
PDC_HAS_PATA = (1 << 1), /* PDC20375 has PATA */
PDC_RESET = (1 << 11), /* HDMA reset */
PDC_COMMON_FLAGS = ATA_FLAG_NO_LEGACY | ATA_FLAG_SRST |
ATA_FLAG_MMIO | ATA_FLAG_NO_ATAPI,
};
@ -162,8 +165,7 @@ static struct ata_port_info pdc_port_info[] = {
/* board_2037x */
{
.sht = &pdc_ata_sht,
.host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_SRST | ATA_FLAG_MMIO,
.host_flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = 0x7f, /* udma0-6 ; FIXME */
@ -173,8 +175,7 @@ static struct ata_port_info pdc_port_info[] = {
/* board_20319 */
{
.sht = &pdc_ata_sht,
.host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_SRST | ATA_FLAG_MMIO,
.host_flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = 0x7f, /* udma0-6 ; FIXME */
@ -184,8 +185,7 @@ static struct ata_port_info pdc_port_info[] = {
/* board_20619 */
{
.sht = &pdc_ata_sht,
.host_flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SRST |
ATA_FLAG_MMIO | ATA_FLAG_SLAVE_POSS,
.host_flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = 0x7f, /* udma0-6 ; FIXME */

View File

@ -220,7 +220,8 @@ static struct ata_port_info pdc_port_info[] = {
{
.sht = &pdc_sata_sht,
.host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_SRST | ATA_FLAG_MMIO,
ATA_FLAG_SRST | ATA_FLAG_MMIO |
ATA_FLAG_NO_ATAPI,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = 0x7f, /* udma0-6 ; FIXME */

View File

@ -422,10 +422,15 @@ static int scsi_eh_completed_normally(struct scsi_cmnd *scmd)
**/
static void scsi_eh_done(struct scsi_cmnd *scmd)
{
struct completion *eh_action;
SCSI_LOG_ERROR_RECOVERY(3,
printk("%s scmd: %p result: %x\n",
__FUNCTION__, scmd, scmd->result));
complete(scmd->device->host->eh_action);
eh_action = scmd->device->host->eh_action;
if (eh_action)
complete(eh_action);
}
/**

View File

@ -1085,6 +1085,26 @@ static void scsi_generic_done(struct scsi_cmnd *cmd)
scsi_io_completion(cmd, cmd->result == 0 ? cmd->bufflen : 0, 0);
}
void scsi_setup_blk_pc_cmnd(struct scsi_cmnd *cmd, int retries)
{
struct request *req = cmd->request;
BUG_ON(sizeof(req->cmd) > sizeof(cmd->cmnd));
memcpy(cmd->cmnd, req->cmd, sizeof(cmd->cmnd));
cmd->cmd_len = req->cmd_len;
if (!req->data_len)
cmd->sc_data_direction = DMA_NONE;
else if (rq_data_dir(req) == WRITE)
cmd->sc_data_direction = DMA_TO_DEVICE;
else
cmd->sc_data_direction = DMA_FROM_DEVICE;
cmd->transfersize = req->data_len;
cmd->allowed = retries;
cmd->timeout_per_command = req->timeout;
}
EXPORT_SYMBOL_GPL(scsi_setup_blk_pc_cmnd);
static int scsi_prep_fn(struct request_queue *q, struct request *req)
{
struct scsi_device *sdev = q->queuedata;
@ -1220,18 +1240,7 @@ static int scsi_prep_fn(struct request_queue *q, struct request *req)
goto kill;
}
} else {
memcpy(cmd->cmnd, req->cmd, sizeof(cmd->cmnd));
cmd->cmd_len = req->cmd_len;
if (rq_data_dir(req) == WRITE)
cmd->sc_data_direction = DMA_TO_DEVICE;
else if (req->data_len)
cmd->sc_data_direction = DMA_FROM_DEVICE;
else
cmd->sc_data_direction = DMA_NONE;
cmd->transfersize = req->data_len;
cmd->allowed = 3;
cmd->timeout_per_command = req->timeout;
scsi_setup_blk_pc_cmnd(cmd, 3);
cmd->done = scsi_generic_done;
}
}

View File

@ -249,7 +249,7 @@ static inline struct list_head *skb_to_lh(struct sk_buff *skb)
}
static void*
mempool_zone_alloc_skb(unsigned int gfp_mask, void *pool_data)
mempool_zone_alloc_skb(gfp_t gfp_mask, void *pool_data)
{
struct mempool_zone *zone = pool_data;

View File

@ -245,24 +245,10 @@ static int sd_init_command(struct scsi_cmnd * SCpnt)
* SG_IO from block layer already setup, just copy cdb basically
*/
if (blk_pc_request(rq)) {
if (sizeof(rq->cmd) > sizeof(SCpnt->cmnd))
return 0;
memcpy(SCpnt->cmnd, rq->cmd, sizeof(SCpnt->cmnd));
SCpnt->cmd_len = rq->cmd_len;
if (rq_data_dir(rq) == WRITE)
SCpnt->sc_data_direction = DMA_TO_DEVICE;
else if (rq->data_len)
SCpnt->sc_data_direction = DMA_FROM_DEVICE;
else
SCpnt->sc_data_direction = DMA_NONE;
this_count = rq->data_len;
scsi_setup_blk_pc_cmnd(SCpnt, SD_PASSTHROUGH_RETRIES);
if (rq->timeout)
timeout = rq->timeout;
SCpnt->transfersize = rq->data_len;
SCpnt->allowed = SD_PASSTHROUGH_RETRIES;
goto queue;
}

View File

@ -320,25 +320,11 @@ static int sr_init_command(struct scsi_cmnd * SCpnt)
* these are already setup, just copy cdb basically
*/
if (SCpnt->request->flags & REQ_BLOCK_PC) {
struct request *rq = SCpnt->request;
scsi_setup_blk_pc_cmnd(SCpnt, MAX_RETRIES);
if (sizeof(rq->cmd) > sizeof(SCpnt->cmnd))
return 0;
if (SCpnt->timeout_per_command)
timeout = SCpnt->timeout_per_command;
memcpy(SCpnt->cmnd, rq->cmd, sizeof(SCpnt->cmnd));
SCpnt->cmd_len = rq->cmd_len;
if (!rq->data_len)
SCpnt->sc_data_direction = DMA_NONE;
else if (rq_data_dir(rq) == WRITE)
SCpnt->sc_data_direction = DMA_TO_DEVICE;
else
SCpnt->sc_data_direction = DMA_FROM_DEVICE;
this_count = rq->data_len;
if (rq->timeout)
timeout = rq->timeout;
SCpnt->transfersize = rq->data_len;
goto queue;
}

View File

@ -4194,27 +4194,10 @@ static void st_intr(struct scsi_cmnd *SCpnt)
*/
static int st_init_command(struct scsi_cmnd *SCpnt)
{
struct request *rq;
if (!(SCpnt->request->flags & REQ_BLOCK_PC))
return 0;
rq = SCpnt->request;
if (sizeof(rq->cmd) > sizeof(SCpnt->cmnd))
return 0;
memcpy(SCpnt->cmnd, rq->cmd, sizeof(SCpnt->cmnd));
SCpnt->cmd_len = rq->cmd_len;
if (rq_data_dir(rq) == WRITE)
SCpnt->sc_data_direction = DMA_TO_DEVICE;
else if (rq->data_len)
SCpnt->sc_data_direction = DMA_FROM_DEVICE;
else
SCpnt->sc_data_direction = DMA_NONE;
SCpnt->timeout_per_command = rq->timeout;
SCpnt->transfersize = rq->data_len;
scsi_setup_blk_pc_cmnd(SCpnt, 0);
SCpnt->done = st_intr;
return 1;
}

View File

@ -1405,7 +1405,6 @@ static void sym_check_goals(struct sym_hcb *np, struct scsi_target *starget,
goal->iu = 0;
goal->dt = 0;
goal->qas = 0;
goal->period = 0;
goal->offset = 0;
return;
}
@ -1465,7 +1464,8 @@ static int sym_prepare_nego(struct sym_hcb *np, struct sym_ccb *cp, u_char *msgp
* Many devices implement PPR in a buggy way, so only use it if we
* really want to.
*/
if (goal->iu || goal->dt || goal->qas || (goal->period < 0xa)) {
if (goal->offset &&
(goal->iu || goal->dt || goal->qas || (goal->period < 0xa))) {
nego = NS_PPR;
} else if (spi_width(starget) != goal->width) {
nego = NS_WIDE;

View File

@ -717,6 +717,7 @@ static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
* at the source, so we must turn off PIRQ.
*/
pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
mb();
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
uhci->hc_inaccessible = 1;
hcd->poll_rh = 0;
@ -738,6 +739,7 @@ static int uhci_resume(struct usb_hcd *hcd)
* really don't want to keep a stale HCD_FLAG_HW_ACCESSIBLE=0
*/
set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
mb();
if (uhci->rh_state == UHCI_RH_RESET) /* Dead */
return 0;

View File

@ -893,8 +893,10 @@ static int hid_input_report(int type, struct urb *urb, int interrupt, struct pt_
size = ((report->size - 1) >> 3) + 1;
if (len < size)
if (len < size) {
dbg("report %d is too short, (%d < %d)", report->id, len, size);
memset(data + len, 0, size - len);
}
if (hid->claimed & HID_CLAIMED_HIDDEV)
hiddev_report_event(hid, report);

View File

@ -1696,7 +1696,7 @@ static ssize_t auerchar_write (struct file *file, const char __user *buf, size_t
int ret;
wait_queue_t wait;
dbg ("auerchar_write %d bytes", len);
dbg ("auerchar_write %zd bytes", len);
/* Error checking */
if (!ccp)

View File

@ -441,7 +441,7 @@ static int arcfb_ioctl(struct inode *inode, struct file *file,
* the fb. it's inefficient for them to do anything less than 64*8
* writes since we update the lcd in each write() anyway.
*/
static ssize_t arcfb_write(struct file *file, const char *buf, size_t count,
static ssize_t arcfb_write(struct file *file, const char __user *buf, size_t count,
loff_t *ppos)
{
/* modded from epson 1355 */

View File

@ -64,8 +64,8 @@ bitcpy(unsigned long __iomem *dst, int dst_idx, const unsigned long __iomem *src
int const shift = dst_idx-src_idx;
int left, right;
first = ~0UL >> dst_idx;
last = ~(~0UL >> ((dst_idx+n) % bits));
first = FB_SHIFT_HIGH(~0UL, dst_idx);
last = ~(FB_SHIFT_HIGH(~0UL, (dst_idx+n) % bits));
if (!shift) {
// Same alignment for source and dest
@ -216,8 +216,8 @@ bitcpy_rev(unsigned long __iomem *dst, int dst_idx, const unsigned long __iomem
shift = dst_idx-src_idx;
first = ~0UL << (bits - 1 - dst_idx);
last = ~(~0UL << (bits - 1 - ((dst_idx-n) % bits)));
first = FB_SHIFT_LOW(~0UL, bits - 1 - dst_idx);
last = ~(FB_SHIFT_LOW(~0UL, bits - 1 - ((dst_idx-n) % bits)));
if (!shift) {
// Same alignment for source and dest

View File

@ -110,8 +110,8 @@ bitfill_aligned(unsigned long __iomem *dst, int dst_idx, unsigned long pat, unsi
if (!n)
return;
first = ~0UL >> dst_idx;
last = ~(~0UL >> ((dst_idx+n) % bits));
first = FB_SHIFT_HIGH(~0UL, dst_idx);
last = ~(FB_SHIFT_HIGH(~0UL, (dst_idx+n) % bits));
if (dst_idx+n <= bits) {
// Single word
@ -167,8 +167,8 @@ bitfill_unaligned(unsigned long __iomem *dst, int dst_idx, unsigned long pat,
if (!n)
return;
first = ~0UL >> dst_idx;
last = ~(~0UL >> ((dst_idx+n) % bits));
first = FB_SHIFT_HIGH(~0UL, dst_idx);
last = ~(FB_SHIFT_HIGH(~0UL, (dst_idx+n) % bits));
if (dst_idx+n <= bits) {
// Single word
@ -221,8 +221,8 @@ bitfill_aligned_rev(unsigned long __iomem *dst, int dst_idx, unsigned long pat,
if (!n)
return;
first = ~0UL >> dst_idx;
last = ~(~0UL >> ((dst_idx+n) % bits));
first = FB_SHIFT_HIGH(~0UL, dst_idx);
last = ~(FB_SHIFT_HIGH(~0UL, (dst_idx+n) % bits));
if (dst_idx+n <= bits) {
// Single word
@ -290,8 +290,8 @@ bitfill_unaligned_rev(unsigned long __iomem *dst, int dst_idx, unsigned long pat
if (!n)
return;
first = ~0UL >> dst_idx;
last = ~(~0UL >> ((dst_idx+n) % bits));
first = FB_SHIFT_HIGH(~0UL, dst_idx);
last = ~(FB_SHIFT_HIGH(~0UL, (dst_idx+n) % bits));
if (dst_idx+n <= bits) {
// Single word

View File

@ -76,18 +76,6 @@ static u32 cfb_tab32[] = {
#define FB_WRITEL fb_writel
#define FB_READL fb_readl
#if defined (__BIG_ENDIAN)
#define LEFT_POS(bpp) (32 - bpp)
#define SHIFT_HIGH(val, bits) ((val) >> (bits))
#define SHIFT_LOW(val, bits) ((val) << (bits))
#define BIT_NR(b) (7 - (b))
#else
#define LEFT_POS(bpp) (0)
#define SHIFT_HIGH(val, bits) ((val) << (bits))
#define SHIFT_LOW(val, bits) ((val) >> (bits))
#define BIT_NR(b) (b)
#endif
static inline void color_imageblit(const struct fb_image *image,
struct fb_info *p, u8 __iomem *dst1,
u32 start_index,
@ -109,7 +97,7 @@ static inline void color_imageblit(const struct fb_image *image,
val = 0;
if (start_index) {
u32 start_mask = ~(SHIFT_HIGH(~(u32)0, start_index));
u32 start_mask = ~(FB_SHIFT_HIGH(~(u32)0, start_index));
val = FB_READL(dst) & start_mask;
shift = start_index;
}
@ -119,20 +107,20 @@ static inline void color_imageblit(const struct fb_image *image,
color = palette[*src];
else
color = *src;
color <<= LEFT_POS(bpp);
val |= SHIFT_HIGH(color, shift);
color <<= FB_LEFT_POS(bpp);
val |= FB_SHIFT_HIGH(color, shift);
if (shift >= null_bits) {
FB_WRITEL(val, dst++);
val = (shift == null_bits) ? 0 :
SHIFT_LOW(color, 32 - shift);
FB_SHIFT_LOW(color, 32 - shift);
}
shift += bpp;
shift &= (32 - 1);
src++;
}
if (shift) {
u32 end_mask = SHIFT_HIGH(~(u32)0, shift);
u32 end_mask = FB_SHIFT_HIGH(~(u32)0, shift);
FB_WRITEL((FB_READL(dst) & end_mask) | val, dst);
}
@ -162,6 +150,8 @@ static inline void slow_imageblit(const struct fb_image *image, struct fb_info *
u32 i, j, l;
dst2 = (u32 __iomem *) dst1;
fgcolor <<= FB_LEFT_POS(bpp);
bgcolor <<= FB_LEFT_POS(bpp);
for (i = image->height; i--; ) {
shift = val = 0;
@ -172,22 +162,21 @@ static inline void slow_imageblit(const struct fb_image *image, struct fb_info *
/* write leading bits */
if (start_index) {
u32 start_mask = ~(SHIFT_HIGH(~(u32)0, start_index));
u32 start_mask = ~(FB_SHIFT_HIGH(~(u32)0,start_index));
val = FB_READL(dst) & start_mask;
shift = start_index;
}
while (j--) {
l--;
color = (*s & 1 << (BIT_NR(l))) ? fgcolor : bgcolor;
color <<= LEFT_POS(bpp);
val |= SHIFT_HIGH(color, shift);
color = (*s & 1 << (FB_BIT_NR(l))) ? fgcolor : bgcolor;
val |= FB_SHIFT_HIGH(color, shift);
/* Did the bitshift spill bits to the next long? */
if (shift >= null_bits) {
FB_WRITEL(val, dst++);
val = (shift == null_bits) ? 0 :
SHIFT_LOW(color,32 - shift);
FB_SHIFT_LOW(color,32 - shift);
}
shift += bpp;
shift &= (32 - 1);
@ -196,7 +185,7 @@ static inline void slow_imageblit(const struct fb_image *image, struct fb_info *
/* write trailing bits */
if (shift) {
u32 end_mask = SHIFT_HIGH(~(u32)0, shift);
u32 end_mask = FB_SHIFT_HIGH(~(u32)0, shift);
FB_WRITEL((FB_READL(dst) & end_mask) | val, dst);
}

View File

@ -2048,7 +2048,7 @@ static int fbcon_switch(struct vc_data *vc)
struct fbcon_ops *ops;
struct display *p = &fb_display[vc->vc_num];
struct fb_var_screeninfo var;
int i, prev_console;
int i, prev_console, charcnt = 256;
info = registered_fb[con2fb_map[vc->vc_num]];
ops = info->fbcon_par;
@ -2103,7 +2103,8 @@ static int fbcon_switch(struct vc_data *vc)
fb_set_var(info, &var);
ops->var = info->var;
if (old_info != NULL && old_info != info) {
if (old_info != NULL && (old_info != info ||
info->flags & FBINFO_MISC_ALWAYS_SETPAR)) {
if (info->fbops->fb_set_par)
info->fbops->fb_set_par(info);
fbcon_del_cursor_timer(old_info);
@ -2120,6 +2121,13 @@ static int fbcon_switch(struct vc_data *vc)
vc->vc_can_do_color = (fb_get_color_depth(&info->var, &info->fix)!=1);
vc->vc_complement_mask = vc->vc_can_do_color ? 0x7700 : 0x0800;
if (p->userfont)
charcnt = FNTCHARCNT(vc->vc_font.data);
if (charcnt > 256)
vc->vc_complement_mask <<= 1;
updatescrollmode(p, info, vc);
switch (p->scrollmode) {
@ -2139,8 +2147,12 @@ static int fbcon_switch(struct vc_data *vc)
scrollback_max = 0;
scrollback_current = 0;
ops->var.xoffset = ops->var.yoffset = p->yscroll = 0;
ops->update_start(info);
if (!fbcon_is_inactive(vc, info)) {
ops->var.xoffset = ops->var.yoffset = p->yscroll = 0;
ops->update_start(info);
}
fbcon_set_palette(vc, color_table);
fbcon_clear_margins(vc, 0);
@ -2184,11 +2196,14 @@ static int fbcon_blank(struct vc_data *vc, int blank, int mode_switch)
ops->graphics = 1;
if (!blank) {
if (info->fbops->fb_save_state)
info->fbops->fb_save_state(info);
var.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE;
fb_set_var(info, &var);
ops->graphics = 0;
ops->var = info->var;
}
} else if (info->fbops->fb_restore_state)
info->fbops->fb_restore_state(info);
}
if (!fbcon_is_inactive(vc, info)) {
@ -2736,8 +2751,12 @@ static void fbcon_modechanged(struct fb_info *info)
updatescrollmode(p, info, vc);
scrollback_max = 0;
scrollback_current = 0;
ops->var.xoffset = ops->var.yoffset = p->yscroll = 0;
ops->update_start(info);
if (!fbcon_is_inactive(vc, info)) {
ops->var.xoffset = ops->var.yoffset = p->yscroll = 0;
ops->update_start(info);
}
fbcon_set_palette(vc, color_table);
update_screen(vc);
if (softback_buf)
@ -2774,8 +2793,13 @@ static void fbcon_set_all_vcs(struct fb_info *info)
updatescrollmode(p, info, vc);
scrollback_max = 0;
scrollback_current = 0;
ops->var.xoffset = ops->var.yoffset = p->yscroll = 0;
ops->update_start(info);
if (!fbcon_is_inactive(vc, info)) {
ops->var.xoffset = ops->var.yoffset =
p->yscroll = 0;
ops->update_start(info);
}
fbcon_set_palette(vc, color_table);
update_screen(vc);
if (softback_buf)

View File

@ -1512,7 +1512,7 @@ static int cyberpro_pci_enable_mmio(struct cfb_info *cfb)
* I/O cycles storing into a reserved memory space at
* physical address 0x3000000
*/
unsigned char *iop;
unsigned char __iomem *iop;
iop = ioremap(0x3000000, 0x5000);
if (iop == NULL) {
@ -1526,7 +1526,7 @@ static int cyberpro_pci_enable_mmio(struct cfb_info *cfb)
writeb(EXT_BIU_MISC, iop + 0x3ce);
writeb(EXT_BIU_MISC_LIN_ENABLE, iop + 0x3cf);
iounmap((void *)iop);
iounmap(iop);
#else
/*
* Most other machine types are "normal", so

View File

@ -722,14 +722,30 @@ static void try_to_load(int fb)
int
fb_pan_display(struct fb_info *info, struct fb_var_screeninfo *var)
{
struct fb_fix_screeninfo *fix = &info->fix;
int xoffset = var->xoffset;
int yoffset = var->yoffset;
int err;
int err = 0, yres = info->var.yres;
if (var->yoffset > 0) {
if (var->vmode & FB_VMODE_YWRAP) {
if (!fix->ywrapstep || (var->yoffset % fix->ywrapstep))
err = -EINVAL;
else
yres = 0;
} else if (!fix->ypanstep || (var->yoffset % fix->ypanstep))
err = -EINVAL;
}
if (var->xoffset > 0 && (!fix->xpanstep ||
(var->xoffset % fix->xpanstep)))
err = -EINVAL;
if (err || !info->fbops->fb_pan_display || xoffset < 0 ||
yoffset < 0 || var->yoffset + yres > info->var.yres_virtual ||
var->xoffset + info->var.xres > info->var.xres_virtual)
return -EINVAL;
if (xoffset < 0 || yoffset < 0 || !info->fbops->fb_pan_display ||
xoffset + info->var.xres > info->var.xres_virtual ||
yoffset + info->var.yres > info->var.yres_virtual)
return -EINVAL;
if ((err = info->fbops->fb_pan_display(var, info)))
return err;
info->var.xoffset = var->xoffset;

View File

@ -1396,7 +1396,8 @@ static struct platform_driver pxafb_driver = {
int __devinit pxafb_setup(char *options)
{
# ifdef CONFIG_FB_PXA_PARAMETERS
strlcpy(g_options, options, sizeof(g_options));
if (options)
strlcpy(g_options, options, sizeof(g_options));
# endif
return 0;
}

View File

@ -32,6 +32,7 @@ void reiserfs_delete_inode(struct inode *inode)
JOURNAL_PER_BALANCE_CNT * 2 +
2 * REISERFS_QUOTA_INIT_BLOCKS(inode->i_sb);
struct reiserfs_transaction_handle th;
int err;
truncate_inode_pages(&inode->i_data, 0);
@ -49,15 +50,13 @@ void reiserfs_delete_inode(struct inode *inode)
}
reiserfs_update_inode_transaction(inode);
if (reiserfs_delete_object(&th, inode)) {
up(&inode->i_sem);
goto out;
}
err = reiserfs_delete_object(&th, inode);
/* Do quota update inside a transaction for journaled quotas. We must do that
* after delete_object so that quota updates go into the same transaction as
* stat data deletion */
DQUOT_FREE_INODE(inode);
if (!err)
DQUOT_FREE_INODE(inode);
if (journal_end(&th, inode->i_sb, jbegin_count)) {
up(&inode->i_sem);
@ -66,6 +65,12 @@ void reiserfs_delete_inode(struct inode *inode)
up(&inode->i_sem);
/* check return value from reiserfs_delete_object after
* ending the transaction
*/
if (err)
goto out;
/* all items of file are deleted, so we can remove "save" link */
remove_save_link(inode, 0 /* not truncate */ ); /* we can't do anything
* about an error here */
@ -2099,6 +2104,7 @@ int reiserfs_truncate_file(struct inode *p_s_inode, int update_timestamps)
struct page *page = NULL;
int error;
struct buffer_head *bh = NULL;
int err2;
reiserfs_write_lock(p_s_inode->i_sb);
@ -2136,14 +2142,18 @@ int reiserfs_truncate_file(struct inode *p_s_inode, int update_timestamps)
transaction of truncating gets committed - on reboot the file
either appears truncated properly or not truncated at all */
add_save_link(&th, p_s_inode, 1);
error = reiserfs_do_truncate(&th, p_s_inode, page, update_timestamps);
if (error)
goto out;
err2 = reiserfs_do_truncate(&th, p_s_inode, page, update_timestamps);
error =
journal_end(&th, p_s_inode->i_sb, JOURNAL_PER_BALANCE_CNT * 2 + 1);
if (error)
goto out;
/* check reiserfs_do_truncate after ending the transaction */
if (err2) {
error = err2;
goto out;
}
if (update_timestamps) {
error = remove_save_link(p_s_inode, 1 /* truncate */ );
if (error)

View File

@ -1039,6 +1039,10 @@ static int flush_commit_list(struct super_block *s,
}
atomic_dec(&journal->j_async_throttle);
/* We're skipping the commit if there's an error */
if (retval || reiserfs_is_journal_aborted(journal))
barrier = 0;
/* wait on everything written so far before writing the commit
* if we are in barrier mode, send the commit down now
*/
@ -1077,10 +1081,16 @@ static int flush_commit_list(struct super_block *s,
BUG_ON(atomic_read(&(jl->j_commit_left)) != 1);
if (!barrier) {
if (buffer_dirty(jl->j_commit_bh))
BUG();
mark_buffer_dirty(jl->j_commit_bh);
sync_dirty_buffer(jl->j_commit_bh);
/* If there was a write error in the journal - we can't commit
* this transaction - it will be invalid and, if successful,
* will just end up propogating the write error out to
* the file system. */
if (likely(!retval && !reiserfs_is_journal_aborted (journal))) {
if (buffer_dirty(jl->j_commit_bh))
BUG();
mark_buffer_dirty(jl->j_commit_bh) ;
sync_dirty_buffer(jl->j_commit_bh) ;
}
} else
wait_on_buffer(jl->j_commit_bh);

View File

@ -78,7 +78,7 @@ STATIC int xfs_qm_dqhashlock_nowait(xfs_dquot_t *);
STATIC int xfs_qm_init_quotainos(xfs_mount_t *);
STATIC int xfs_qm_init_quotainfo(xfs_mount_t *);
STATIC int xfs_qm_shake(int, unsigned int);
STATIC int xfs_qm_shake(int, gfp_t);
#ifdef DEBUG
extern mutex_t qcheck_lock;
@ -2197,7 +2197,7 @@ xfs_qm_shake_freelist(
*/
/* ARGSUSED */
STATIC int
xfs_qm_shake(int nr_to_scan, unsigned int gfp_mask)
xfs_qm_shake(int nr_to_scan, gfp_t gfp_mask)
{
int ndqused, nfree, n;

View File

@ -22,6 +22,8 @@ typedef unsigned long elf_freg_t[3];
#define R_ARM_NONE 0
#define R_ARM_PC24 1
#define R_ARM_ABS32 2
#define R_ARM_CALL 28
#define R_ARM_JUMP24 29
#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
typedef elf_greg_t elf_gregset_t[ELF_NGREG];

View File

@ -320,7 +320,8 @@ typedef struct sal_log_timestamp {
typedef struct sal_log_record_header {
u64 id; /* Unique monotonically increasing ID */
sal_log_revision_t revision; /* Major and Minor revision of header */
u16 severity; /* Error Severity */
u8 severity; /* Error Severity */
u8 validation_bits; /* 0: platform_guid, 1: !timestamp */
u32 len; /* Length of this error log in bytes */
sal_log_timestamp_t timestamp; /* Timestamp */
efi_guid_t platform_guid; /* Unique OEM Platform ID */

View File

@ -74,9 +74,6 @@ typedef struct
u8 white_list, black_list;
struct dbdma_cmd *dma_table_cpu;
dma_addr_t dma_table_dma;
struct scatterlist *sg_table;
int sg_nents;
int sg_dma_direction;
#endif
struct device *dev;
int irq;
@ -87,11 +84,6 @@ typedef struct
} _auide_hwif;
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
struct drive_list_entry {
const char * id_model;
const char * id_firmware;
};
/* HD white list */
static const struct drive_list_entry dma_white_list [] = {
/*
@ -167,13 +159,9 @@ int __init auide_probe(void);
* Multi-Word DMA + DbDMA functions
*/
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
static int in_drive_list(struct hd_driveid *id,
const struct drive_list_entry *drive_table);
static int auide_build_sglist(ide_drive_t *drive, struct request *rq);
static int auide_build_dmatable(ide_drive_t *drive);
static int auide_dma_end(ide_drive_t *drive);
static void auide_dma_start(ide_drive_t *drive );
ide_startstop_t auide_dma_intr (ide_drive_t *drive);
static void auide_dma_exec_cmd(ide_drive_t *drive, u8 command);
static int auide_dma_setup(ide_drive_t *drive);
@ -188,8 +176,6 @@ int __init auide_probe(void);
static void auide_ddma_rx_callback(int irq, void *param,
struct pt_regs *regs);
static int auide_dma_off_quietly(ide_drive_t *drive);
static int auide_dma_timeout(ide_drive_t *drive);
#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
/*******************************************************************************
@ -299,3 +285,11 @@ int __init auide_probe(void);
#define SBC_IDE_MDMA2_TPM (0x00<<6)
#define SBC_IDE_MDMA2_TA (0x12<<0)
#define SBC_IDE_TIMING(mode) \
SBC_IDE_##mode##_TWCS | \
SBC_IDE_##mode##_TCSH | \
SBC_IDE_##mode##_TCSOFF | \
SBC_IDE_##mode##_TWP | \
SBC_IDE_##mode##_TCSW | \
SBC_IDE_##mode##_TPM | \
SBC_IDE_##mode##_TA

View File

@ -36,7 +36,7 @@
/* Memory parity error register with associated bit constants. */
#ifndef __ASSEMBLY__
extern __volatile__ unsigned long *sun4c_memerr_reg;
extern __volatile__ unsigned long __iomem *sun4c_memerr_reg;
#endif
#define SUN4C_MPE_ERROR 0x80 /* Parity error detected. (ro) */

View File

@ -16,10 +16,10 @@
#include <asm/pbm.h>
struct linux_pcic {
void * __iomem pcic_regs;
void __iomem *pcic_regs;
unsigned long pcic_io;
void * __iomem pcic_config_space_addr;
void * __iomem pcic_config_space_data;
void __iomem *pcic_config_space_addr;
void __iomem *pcic_config_space_data;
struct resource pcic_res_regs;
struct resource pcic_res_io;
struct resource pcic_res_cfg_addr;

View File

@ -617,6 +617,12 @@ struct fb_ops {
/* perform fb specific mmap */
int (*fb_mmap)(struct fb_info *info, struct file *file, struct vm_area_struct *vma);
/* save current hardware state */
void (*fb_save_state)(struct fb_info *info);
/* restore saved state */
void (*fb_restore_state)(struct fb_info *info);
};
#ifdef CONFIG_FB_TILEBLITTING
@ -726,6 +732,18 @@ struct fb_tile_ops {
from userspace */
#define FBINFO_MISC_TILEBLITTING 0x20000 /* use tile blitting */
/* A driver may set this flag to indicate that it does want a set_par to be
* called every time when fbcon_switch is executed. The advantage is that with
* this flag set you can really be shure that set_par is always called before
* any of the functions dependant on the correct hardware state or altering
* that state, even if you are using some broken X releases. The disadvantage
* is that it introduces unwanted delays to every console switch if set_par
* is slow. It is a good idea to try this flag in the drivers initialization
* code whenever there is a bug report related to switching between X and the
* framebuffer console.
*/
#define FBINFO_MISC_ALWAYS_SETPAR 0x40000
struct fb_info {
int node;
int flags;
@ -815,6 +833,18 @@ struct fb_info {
#define fb_writeq(b,addr) (*(volatile u64 *) (addr) = (b))
#define fb_memset memset
#endif
#if defined (__BIG_ENDIAN)
#define FB_LEFT_POS(bpp) (32 - bpp)
#define FB_SHIFT_HIGH(val, bits) ((val) >> (bits))
#define FB_SHIFT_LOW(val, bits) ((val) << (bits))
#define FB_BIT_NR(b) (7 - (b))
#else
#define FB_LEFT_POS(bpp) (0)
#define FB_SHIFT_HIGH(val, bits) ((val) << (bits))
#define FB_SHIFT_LOW(val, bits) ((val) >> (bits))
#define FB_BIT_NR(b) (b)
#endif
/*

View File

@ -23,17 +23,6 @@
#include <asm/io.h>
#include <asm/semaphore.h>
/*
* This is the multiple IDE interface driver, as evolved from hd.c.
* It supports up to four IDE interfaces, on one or more IRQs (usually 14 & 15).
* There can be up to two drives per interface, as per the ATA-2 spec.
*
* Primary i/f: ide0: major=3; (hda) minor=0; (hdb) minor=64
* Secondary i/f: ide1: major=22; (hdc or hd1a) minor=0; (hdd or hd1b) minor=64
* Tertiary i/f: ide2: major=33; (hde) minor=0; (hdf) minor=64
* Quaternary i/f: ide3: major=34; (hdg) minor=0; (hdh) minor=64
*/
/******************************************************************************
* IDE driver configuration options (play with these as desired):
*
@ -193,11 +182,6 @@ typedef unsigned char byte; /* used everywhere */
#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
#define HOST(hwif,chipset) \
{ \
return ((hwif)->chipset == chipset) ? 1 : 0; \
}
/*
* Check for an interrupt and acknowledge the interrupt status
*/
@ -390,45 +374,6 @@ typedef union {
} b;
} ata_nsector_t, ata_data_t, atapi_bcount_t, ata_index_t;
/*
* ATA-IDE Error Register
*
* mark : Bad address mark
* tzero : Couldn't find track 0
* abrt : Aborted Command
* mcr : Media Change Request
* id : ID field not found
* mce : Media Change Event
* ecc : Uncorrectable ECC error
* bdd : dual meaing
*/
typedef union {
unsigned all :8;
struct {
#if defined(__LITTLE_ENDIAN_BITFIELD)
unsigned mark :1;
unsigned tzero :1;
unsigned abrt :1;
unsigned mcr :1;
unsigned id :1;
unsigned mce :1;
unsigned ecc :1;
unsigned bdd :1;
#elif defined(__BIG_ENDIAN_BITFIELD)
unsigned bdd :1;
unsigned ecc :1;
unsigned mce :1;
unsigned id :1;
unsigned mcr :1;
unsigned abrt :1;
unsigned tzero :1;
unsigned mark :1;
#else
#error "Please fix <asm/byteorder.h>"
#endif
} b;
} ata_error_t;
/*
* ATA-IDE Select Register, aka Device-Head
*
@ -503,39 +448,6 @@ typedef union {
} b;
} ata_status_t, atapi_status_t;
/*
* ATA-IDE Control Register
*
* bit0 : Should be set to zero
* nIEN : device INTRQ to host
* SRST : host soft reset bit
* bit3 : ATA-2 thingy, Should be set to 1
* reserved456 : Reserved
* HOB : 48-bit address ordering, High Ordered Bit
*/
typedef union {
unsigned all : 8;
struct {
#if defined(__LITTLE_ENDIAN_BITFIELD)
unsigned bit0 : 1;
unsigned nIEN : 1;
unsigned SRST : 1;
unsigned bit3 : 1;
unsigned reserved456 : 3;
unsigned HOB : 1;
#elif defined(__BIG_ENDIAN_BITFIELD)
unsigned HOB : 1;
unsigned reserved456 : 3;
unsigned bit3 : 1;
unsigned SRST : 1;
unsigned nIEN : 1;
unsigned bit0 : 1;
#else
#error "Please fix <asm/byteorder.h>"
#endif
} b;
} ata_control_t;
/*
* ATAPI Feature Register
*
@ -617,39 +529,6 @@ typedef union {
} b;
} atapi_error_t;
/*
* ATAPI floppy Drive Select Register
*
* sam_lun : Logical unit number
* reserved3 : Reserved
* drv : The responding drive will be drive 0 (0) or drive 1 (1)
* one5 : Should be set to 1
* reserved6 : Reserved
* one7 : Should be set to 1
*/
typedef union {
unsigned all :8;
struct {
#if defined(__LITTLE_ENDIAN_BITFIELD)
unsigned sam_lun :3;
unsigned reserved3 :1;
unsigned drv :1;
unsigned one5 :1;
unsigned reserved6 :1;
unsigned one7 :1;
#elif defined(__BIG_ENDIAN_BITFIELD)
unsigned one7 :1;
unsigned reserved6 :1;
unsigned one5 :1;
unsigned drv :1;
unsigned reserved3 :1;
unsigned sam_lun :3;
#else
#error "Please fix <asm/byteorder.h>"
#endif
} b;
} atapi_select_t;
/*
* Status returned from various ide_ functions
*/
@ -1101,10 +980,7 @@ typedef struct ide_driver_s {
int (*end_request)(ide_drive_t *, int, int);
ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
int (*ioctl)(ide_drive_t *, struct inode *, struct file *, unsigned int, unsigned long);
ide_proc_entry_t *proc;
void (*ata_prebuilder)(ide_drive_t *);
void (*atapi_prebuilder)(ide_drive_t *);
struct device_driver gen_driver;
} ide_driver_t;
@ -1298,7 +1174,6 @@ extern int ide_spin_wait_hwgroup(ide_drive_t *);
extern void ide_timer_expiry(unsigned long);
extern irqreturn_t ide_intr(int irq, void *dev_id, struct pt_regs *regs);
extern void do_ide_request(request_queue_t *);
extern void ide_init_subdrivers(void);
void ide_init_disk(struct gendisk *, ide_drive_t *);
@ -1371,6 +1246,12 @@ void ide_init_sg_cmd(ide_drive_t *, struct request *);
#define GOOD_DMA_DRIVE 1
#ifdef CONFIG_BLK_DEV_IDEDMA
struct drive_list_entry {
const char *id_model;
const char *id_firmware;
};
int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
int __ide_dma_bad_drive(ide_drive_t *);
int __ide_dma_good_drive(ide_drive_t *);
int ide_use_dma(ide_drive_t *);

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