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ARM: dts: am57xx-idk: Select pull down for mmc1_clk line in default mode
During a short period when the bus voltage is switched from 3.3v to 1.8v, (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines are kept in a state according to the programmed pad mux pull type. According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the host should hold CLK low for at least 5ms. In order to keep the card line low during voltage switch, the pad mux of mmc1_clk line should be configured to pull down. This is specific to am57xx-idk (and not all dra72/dra74 based boards) since mmc1_clk line in am57xx-idk is not connected to an external pullup. While at that change the order of header files in am571x-idk.dts and am572x-idk.dts so that the modified pinctrl values in am57xx-idk-common could take effect. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -10,8 +10,8 @@
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#include "dra72x.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "am57xx-idk-common.dtsi"
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#include "dra72x-mmc-iodelay.dtsi"
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#include "am57xx-idk-common.dtsi"
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/ {
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model = "TI AM5718 IDK";
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@ -9,9 +9,8 @@
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/dts-v1/;
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#include "dra74x.dtsi"
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#include "am572x-idk-common.dtsi"
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#include "am57xx-idk-common.dtsi"
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#include "dra74x-mmc-iodelay.dtsi"
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#include "am572x-idk-common.dtsi"
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/ {
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model = "TI AM5728 IDK";
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@ -115,6 +115,17 @@ DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
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DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */
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>;
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};
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mmc1_pins_default: mmc1_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
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DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
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DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
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DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
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DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
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DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
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>;
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};
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};
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&i2c1 {
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