mirror of https://gitee.com/openkylin/linux.git
Some more powerdomains and usb2-otg support for the rk3399 as well
as the binding doc for the 32bit rk1108 eval board to prevent it from conflicting with the recently added 64bit px5 board. -----BEGIN PGP SIGNATURE----- iQEtBAABCAAXBQJYNj30EBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYEoJQf/ WaANx7eR9cLkinPv6H123jeHAtMdvLFHmwb9kr2DwwNs6C9UxIsp9VddpG7XMSpI bQLES0o0MALAAzIJH1oBb2wOWfDRWB/oXa/bSWXScbRXML+fH9ew1i1FaQQRDPHP 0/nm6GMbRZfMEraZHzTEY9duobLhbBH2va9GBv7M453D65B26c+ECvgbjULkI6My qAdy5nN4Fb2YhxlZJz+WQQt59MNBT6nw8ObNPgKmSI18vB8BnQxqIEfo1gCuW+Iz Sz+367EhVDtSW8cMWLttK6wB2iiiYGD0TOYfEeZS1zWavQlqDpFxFgZ66AKXdTxA OYuAB8AKkTfa8NmejAUR2Q== =PZ7U -----END PGP SIGNATURE----- Merge tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64 Pull "Rockchip dts64 changes for 4.10" from Heiko Stübner: Some more powerdomains and usb2-otg support for the rk3399 as well as the binding doc for the 32bit rk1108 eval board to prevent it from conflicting with the recently added 64bit px5 board. * tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: dt-bindings: add rockchip RK1108 Evaluation board arm64: dts: rockchip: add usb2-phy otg-port support for rk3399 arm64: dts: rockchip: add pd_sd power-domain node for rk3399 arm64: dts: rockchip: add eMMC's power domain support for rk3399 arm64: dts: rockchip: add backlight support for rk3399 evb board arm64: dts: rockchip: add gmac needed pclk for rk3399 pd
This commit is contained in:
Arnd Bergmann
commit
18e31f0b24
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@ -107,6 +107,10 @@ Rockchip platforms device tree bindings
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Required root node properties:
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- compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
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- Rockchip RK1108 Evaluation board
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Required root node properties:
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- compatible = "rockchip,rk1108-evb", "rockchip,rk1108";
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- Rockchip RK3368 evb:
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Required root node properties:
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- compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
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@ -49,6 +49,46 @@ / {
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compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
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"google,rk3399evb-rev2";
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backlight: backlight {
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compatible = "pwm-backlight";
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <200>;
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enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
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pwms = <&pwm0 0 25000 0>;
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};
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clkin_gmac: external-gmac-clock {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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@ -253,6 +253,7 @@ sdmmc: dwmmc@fe320000 {
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<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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power-domains = <&power RK3399_PD_SD>;
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status = "disabled";
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};
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@ -269,6 +270,7 @@ sdhci: sdhci@fe330000 {
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#clock-cells = <0>;
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phys = <&emmc_phy>;
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phy-names = "phy_arasan";
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power-domains = <&power RK3399_PD_EMMC>;
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status = "disabled";
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};
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@ -690,6 +692,16 @@ tsadc: tsadc@ff260000 {
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status = "disabled";
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};
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qos_sd: qos@ffa74000 {
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compatible = "syscon";
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reg = <0x0 0xffa74000 0x0 0x20>;
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};
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qos_emmc: qos@ffa58000 {
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compatible = "syscon";
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reg = <0x0 0xffa58000 0x0 0x20>;
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};
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qos_gmac: qos@ffa5c000 {
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compatible = "syscon";
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reg = <0x0 0xffa5c000 0x0 0x20>;
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@ -823,11 +835,23 @@ pd_gpu@RK3399_PD_GPU {
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};
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/* These power domains are grouped by VD_LOGIC */
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pd_emmc@RK3399_PD_EMMC {
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reg = <RK3399_PD_EMMC>;
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clocks = <&cru ACLK_EMMC>;
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pm_qos = <&qos_emmc>;
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};
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pd_gmac@RK3399_PD_GMAC {
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reg = <RK3399_PD_GMAC>;
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clocks = <&cru ACLK_GMAC>;
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clocks = <&cru ACLK_GMAC>,
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<&cru PCLK_GMAC>;
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pm_qos = <&qos_gmac>;
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};
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pd_sd@RK3399_PD_SD {
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reg = <RK3399_PD_SD>;
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clocks = <&cru HCLK_SDMMC>,
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<&cru SCLK_SDMMC>;
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pm_qos = <&qos_sd>;
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};
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pd_vio@RK3399_PD_VIO {
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reg = <RK3399_PD_VIO>;
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#address-cells = <1>;
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@ -1104,6 +1128,16 @@ u2phy0_host: host-port {
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interrupt-names = "linestate";
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status = "disabled";
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};
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u2phy0_otg: otg-port {
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#phy-cells = <0>;
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "otg-bvalid", "otg-id",
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"linestate";
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status = "disabled";
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};
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};
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u2phy1: usb2-phy@e460 {
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@ -1121,6 +1155,16 @@ u2phy1_host: host-port {
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interrupt-names = "linestate";
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status = "disabled";
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};
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u2phy1_otg: otg-port {
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#phy-cells = <0>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "otg-bvalid", "otg-id",
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"linestate";
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status = "disabled";
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};
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};
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emmc_phy: phy@f780 {
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