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drm/amd/display: Add DCN2 VMID 

Add support to program DCN2 VMID (Virtual Memory Support)

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Harry Wentland 2019-02-22 16:38:28 -05:00 committed by Alex Deucher
parent 83421f32b7
commit 18eaea4bf8
2 changed files with 153 additions and 0 deletions
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62
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c Normal file
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/*
* Copyright 2018 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/
#include "dcn20_vmid.h"
#include "reg_helper.h"
#define REG(reg)\
vmid->regs->reg
#define CTX \
vmid->ctx
#undef FN
#define FN(reg_name, field_name) \
vmid->shifts->field_name, vmid->masks->field_name
void dcn20_vmid_setup(struct dcn20_vmid *vmid, const struct dcn_vmid_page_table_config *config)
{
REG_SET(PAGE_TABLE_START_ADDR_HI32, 0,
VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_HI4, (config->page_table_start_addr >> 32) & 0xF);
REG_SET(PAGE_TABLE_START_ADDR_LO32, 0,
VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_LO32, config->page_table_start_addr & 0xFFFFFFFF);
REG_SET(PAGE_TABLE_END_ADDR_HI32, 0,
VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_HI4, (config->page_table_end_addr >> 32) & 0xF);
REG_SET(PAGE_TABLE_END_ADDR_LO32, 0,
VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_LO32, config->page_table_end_addr & 0xFFFFFFFF);
REG_SET_2(CNTL, 0,
VM_CONTEXT0_PAGE_TABLE_DEPTH, config->depth,
VM_CONTEXT0_PAGE_TABLE_BLOCK_SIZE, config->block_size);
}
void dcn20_vmid_set_ptb(struct dcn20_vmid *vmid, uint64_t base)
{
REG_SET(PAGE_TABLE_BASE_ADDR_HI32, 0,
VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_HI32, (base >> 32) & 0xFFFFFFFF);
REG_SET(PAGE_TABLE_BASE_ADDR_LO32, 0,
VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_LO32, base & 0xFFFFFFFF);
}

91
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h Normal file
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/*
* Copyright 2018 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/
#ifndef DAL_DC_DCN20_DCN20_VMID_H_
#define DAL_DC_DCN20_DCN20_VMID_H_
#include "vmid.h"
#define BASE_INNER(seg) \
DCE_BASE__INST0_SEG ## seg
#define BASE(seg) \
BASE_INNER(seg)
#define SRI(reg_name, block, id)\
.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
mm ## block ## id ## _ ## reg_name
#define SF(reg_name, field_name, post_fix)\
.field_name = reg_name ## __ ## field_name ## post_fix
#define DCN20_VMID_REG_LIST(id)\
SRI(CNTL, DCN_VM_CONTEXT, id),\
SRI(PAGE_TABLE_BASE_ADDR_HI32, DCN_VM_CONTEXT, id),\
SRI(PAGE_TABLE_BASE_ADDR_LO32, DCN_VM_CONTEXT, id),\
SRI(PAGE_TABLE_START_ADDR_HI32, DCN_VM_CONTEXT, id),\
SRI(PAGE_TABLE_START_ADDR_LO32, DCN_VM_CONTEXT, id),\
SRI(PAGE_TABLE_END_ADDR_HI32, DCN_VM_CONTEXT, id),\
SRI(PAGE_TABLE_END_ADDR_LO32, DCN_VM_CONTEXT, id)
#define DCN20_VMID_MASK_SH_LIST(mask_sh)\
SF(DCN_VM_CONTEXT0_CNTL, VM_CONTEXT0_PAGE_TABLE_DEPTH, mask_sh),\
SF(DCN_VM_CONTEXT0_CNTL, VM_CONTEXT0_PAGE_TABLE_BLOCK_SIZE, mask_sh),\
SF(DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_HI32, mask_sh),\
SF(DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_LO32, mask_sh),\
SF(DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_HI4, mask_sh),\
SF(DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_LO32, mask_sh),\
SF(DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_HI4, mask_sh),\
SF(DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_LO32, mask_sh)
#define DCN20_VMID_REG_FIELD_LIST(type)\
type VM_CONTEXT0_PAGE_TABLE_DEPTH;\
type VM_CONTEXT0_PAGE_TABLE_BLOCK_SIZE;\
type VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_HI32;\
type VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_LO32;\
type VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_HI4;\
type VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_LO32;\
type VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_HI4;\
type VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_LO32
struct dcn20_vmid_shift {
DCN20_VMID_REG_FIELD_LIST(uint8_t);
};
struct dcn20_vmid_mask {
DCN20_VMID_REG_FIELD_LIST(uint32_t);
};
struct dcn20_vmid {
struct dc_context *ctx;
const struct dcn_vmid_registers *regs;
const struct dcn20_vmid_shift *shifts;
const struct dcn20_vmid_mask *masks;
};
void dcn20_vmid_setup(struct dcn20_vmid *vmid, const struct dcn_vmid_page_table_config *config);
void dcn20_vmid_set_ptb(struct dcn20_vmid *vmid, uint64_t base);
#endif /* DAL_DC_DCN20_DCN20_VMID_H_ */