mirror of https://gitee.com/openkylin/linux.git
drm/amd/display: Add DCN2 VMID
Add support to program DCN2 VMID (Virtual Memory Support) Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/*
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* Copyright 2018 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "dcn20_vmid.h"
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#include "reg_helper.h"
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#define REG(reg)\
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vmid->regs->reg
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#define CTX \
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vmid->ctx
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#undef FN
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#define FN(reg_name, field_name) \
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vmid->shifts->field_name, vmid->masks->field_name
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void dcn20_vmid_setup(struct dcn20_vmid *vmid, const struct dcn_vmid_page_table_config *config)
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{
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REG_SET(PAGE_TABLE_START_ADDR_HI32, 0,
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VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_HI4, (config->page_table_start_addr >> 32) & 0xF);
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REG_SET(PAGE_TABLE_START_ADDR_LO32, 0,
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VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_LO32, config->page_table_start_addr & 0xFFFFFFFF);
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REG_SET(PAGE_TABLE_END_ADDR_HI32, 0,
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VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_HI4, (config->page_table_end_addr >> 32) & 0xF);
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REG_SET(PAGE_TABLE_END_ADDR_LO32, 0,
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VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_LO32, config->page_table_end_addr & 0xFFFFFFFF);
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REG_SET_2(CNTL, 0,
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VM_CONTEXT0_PAGE_TABLE_DEPTH, config->depth,
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VM_CONTEXT0_PAGE_TABLE_BLOCK_SIZE, config->block_size);
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}
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void dcn20_vmid_set_ptb(struct dcn20_vmid *vmid, uint64_t base)
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{
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REG_SET(PAGE_TABLE_BASE_ADDR_HI32, 0,
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VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_HI32, (base >> 32) & 0xFFFFFFFF);
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REG_SET(PAGE_TABLE_BASE_ADDR_LO32, 0,
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VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_LO32, base & 0xFFFFFFFF);
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}
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/*
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* Copyright 2018 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef DAL_DC_DCN20_DCN20_VMID_H_
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#define DAL_DC_DCN20_DCN20_VMID_H_
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#include "vmid.h"
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#define BASE_INNER(seg) \
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DCE_BASE__INST0_SEG ## seg
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#define BASE(seg) \
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BASE_INNER(seg)
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#define SRI(reg_name, block, id)\
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.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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mm ## block ## id ## _ ## reg_name
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#define SF(reg_name, field_name, post_fix)\
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.field_name = reg_name ## __ ## field_name ## post_fix
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#define DCN20_VMID_REG_LIST(id)\
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SRI(CNTL, DCN_VM_CONTEXT, id),\
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SRI(PAGE_TABLE_BASE_ADDR_HI32, DCN_VM_CONTEXT, id),\
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SRI(PAGE_TABLE_BASE_ADDR_LO32, DCN_VM_CONTEXT, id),\
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SRI(PAGE_TABLE_START_ADDR_HI32, DCN_VM_CONTEXT, id),\
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SRI(PAGE_TABLE_START_ADDR_LO32, DCN_VM_CONTEXT, id),\
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SRI(PAGE_TABLE_END_ADDR_HI32, DCN_VM_CONTEXT, id),\
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SRI(PAGE_TABLE_END_ADDR_LO32, DCN_VM_CONTEXT, id)
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#define DCN20_VMID_MASK_SH_LIST(mask_sh)\
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SF(DCN_VM_CONTEXT0_CNTL, VM_CONTEXT0_PAGE_TABLE_DEPTH, mask_sh),\
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SF(DCN_VM_CONTEXT0_CNTL, VM_CONTEXT0_PAGE_TABLE_BLOCK_SIZE, mask_sh),\
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SF(DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_HI32, mask_sh),\
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SF(DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_LO32, mask_sh),\
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SF(DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_HI4, mask_sh),\
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SF(DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_LO32, mask_sh),\
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SF(DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_HI4, mask_sh),\
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SF(DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_LO32, mask_sh)
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#define DCN20_VMID_REG_FIELD_LIST(type)\
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type VM_CONTEXT0_PAGE_TABLE_DEPTH;\
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type VM_CONTEXT0_PAGE_TABLE_BLOCK_SIZE;\
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type VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_HI32;\
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type VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_LO32;\
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type VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_HI4;\
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type VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_LO32;\
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type VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_HI4;\
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type VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_LO32
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struct dcn20_vmid_shift {
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DCN20_VMID_REG_FIELD_LIST(uint8_t);
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};
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struct dcn20_vmid_mask {
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DCN20_VMID_REG_FIELD_LIST(uint32_t);
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};
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struct dcn20_vmid {
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struct dc_context *ctx;
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const struct dcn_vmid_registers *regs;
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const struct dcn20_vmid_shift *shifts;
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const struct dcn20_vmid_mask *masks;
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};
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void dcn20_vmid_setup(struct dcn20_vmid *vmid, const struct dcn_vmid_page_table_config *config);
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void dcn20_vmid_set_ptb(struct dcn20_vmid *vmid, uint64_t base);
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#endif /* DAL_DC_DCN20_DCN20_VMID_H_ */
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