mirror of https://gitee.com/openkylin/linux.git
Merge branch 'drm-next-3.8' of git://people.freedesktop.org/~agd5f/linux into drm-next
Alex writes: Pretty minor -next pull request. We some additional new bits waiting internally for release. Hopefully Monday we can get at least some of them out. The others will probably take a few more weeks. Highlights of the current request: - ELD registers for passing audio information to the sound hardware - Handle GPUVM page faults more gracefully - Misc fixes Merge radeon test * 'drm-next-3.8' of git://people.freedesktop.org/~agd5f/linux: (483 commits) drm/radeon: bump driver version for new info ioctl requests drm/radeon: fix eDP clk and lane setup for scaled modes drm/radeon: add new INFO ioctl requests drm/radeon/dce32+: use fractional fb dividers for high clocks drm/radeon: use cached memory when evicting for vram on non agp drm/radeon: add a CS flag END_OF_FRAME drm/radeon: stop page faults from hanging the system (v2) drm/radeon/dce4/5: add registers for ELD handling drm/radeon/dce3.2: add registers for ELD handling radeon: fix pll/ctrc mapping on dce2 and dce3 hardware Linux 3.7-rc7 powerpc/eeh: Do not invalidate PE properly Revert "drm/i915: enable rc6 on ilk again" ALSA: hda - Fix build without CONFIG_PM of/address: sparc: Declare of_iomap as an extern function for sparc again PM / QoS: fix wrong error-checking condition bnx2x: remove redundant warning log vxlan: fix command usage in its doc 8139cp: revert "set ring address before enabling receiver" MPI: Fix compilation on MIPS with GCC 4.4 and newer ... Conflicts: drivers/gpu/drm/exynos/exynos_drm_encoder.c drivers/gpu/drm/exynos/exynos_drm_fbdev.c drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
This commit is contained in:
Dave Airlie
commit
1a1494def7
5
CREDITS
5
CREDITS
|
|
@ -1823,6 +1823,11 @@ S: Kattreinstr 38
|
|||
S: D-64295
|
||||
S: Germany
|
||||
|
||||
N: Avi Kivity
|
||||
E: avi.kivity@gmail.com
|
||||
D: Kernel-based Virtual Machine (KVM)
|
||||
S: Ra'annana, Israel
|
||||
|
||||
N: Andi Kleen
|
||||
E: andi@firstfloor.org
|
||||
U: http://www.halobates.de
|
||||
|
|
|
|||
|
|
@ -27,17 +27,17 @@ Start End Size Use
|
|||
-----------------------------------------------------------------------
|
||||
0000000000000000 0000007fffffffff 512GB user
|
||||
|
||||
ffffff8000000000 ffffffbbfffcffff ~240GB vmalloc
|
||||
ffffff8000000000 ffffffbbfffeffff ~240GB vmalloc
|
||||
|
||||
ffffffbbfffd0000 ffffffbcfffdffff 64KB [guard page]
|
||||
|
||||
ffffffbbfffe0000 ffffffbcfffeffff 64KB PCI I/O space
|
||||
|
||||
ffffffbbffff0000 ffffffbcffffffff 64KB [guard page]
|
||||
ffffffbbffff0000 ffffffbbffffffff 64KB [guard page]
|
||||
|
||||
ffffffbc00000000 ffffffbdffffffff 8GB vmemmap
|
||||
|
||||
ffffffbe00000000 ffffffbffbffffff ~8GB [guard, future vmmemap]
|
||||
ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap]
|
||||
|
||||
ffffffbffbe00000 ffffffbffbe0ffff 64KB PCI I/O space
|
||||
|
||||
ffffffbbffff0000 ffffffbcffffffff ~2MB [guard]
|
||||
|
||||
ffffffbffc000000 ffffffbfffffffff 64MB modules
|
||||
|
||||
|
|
|
|||
|
|
@ -466,6 +466,10 @@ Note:
|
|||
5.3 swappiness
|
||||
|
||||
Similar to /proc/sys/vm/swappiness, but affecting a hierarchy of groups only.
|
||||
Please note that unlike the global swappiness, memcg knob set to 0
|
||||
really prevents from any swapping even if there is a swap storage
|
||||
available. This might lead to memcg OOM killer if there are no file
|
||||
pages to reclaim.
|
||||
|
||||
Following cgroups' swappiness can't be changed.
|
||||
- root cgroup (uses /proc/sys/vm/swappiness).
|
||||
|
|
|
|||
|
|
@ -8,9 +8,16 @@ gpios property as described in section VIII.1 in the following order:
|
|||
|
||||
MDC, MDIO.
|
||||
|
||||
Note: Each gpio-mdio bus should have an alias correctly numbered in "aliases"
|
||||
node.
|
||||
|
||||
Example:
|
||||
|
||||
mdio {
|
||||
aliases {
|
||||
mdio-gpio0 = <&mdio0>;
|
||||
};
|
||||
|
||||
mdio0: mdio {
|
||||
compatible = "virtual,mdio-gpio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ Table of Contents
|
|||
2 Modifying System Parameters
|
||||
|
||||
3 Per-Process Parameters
|
||||
3.1 /proc/<pid>/oom_score_adj - Adjust the oom-killer
|
||||
3.1 /proc/<pid>/oom_adj & /proc/<pid>/oom_score_adj - Adjust the oom-killer
|
||||
score
|
||||
3.2 /proc/<pid>/oom_score - Display current oom-killer score
|
||||
3.3 /proc/<pid>/io - Display the IO accounting fields
|
||||
|
|
@ -1320,10 +1320,10 @@ of the kernel.
|
|||
CHAPTER 3: PER-PROCESS PARAMETERS
|
||||
------------------------------------------------------------------------------
|
||||
|
||||
3.1 /proc/<pid>/oom_score_adj- Adjust the oom-killer score
|
||||
3.1 /proc/<pid>/oom_adj & /proc/<pid>/oom_score_adj- Adjust the oom-killer score
|
||||
--------------------------------------------------------------------------------
|
||||
|
||||
This file can be used to adjust the badness heuristic used to select which
|
||||
These file can be used to adjust the badness heuristic used to select which
|
||||
process gets killed in out of memory conditions.
|
||||
|
||||
The badness heuristic assigns a value to each candidate task ranging from 0
|
||||
|
|
@ -1361,6 +1361,12 @@ same system, cpuset, mempolicy, or memory controller resources to use at least
|
|||
equivalent to discounting 50% of the task's allowed memory from being considered
|
||||
as scoring against the task.
|
||||
|
||||
For backwards compatibility with previous kernels, /proc/<pid>/oom_adj may also
|
||||
be used to tune the badness score. Its acceptable values range from -16
|
||||
(OOM_ADJUST_MIN) to +15 (OOM_ADJUST_MAX) and a special value of -17
|
||||
(OOM_DISABLE) to disable oom killing entirely for that task. Its value is
|
||||
scaled linearly with /proc/<pid>/oom_score_adj.
|
||||
|
||||
The value of /proc/<pid>/oom_score_adj may be reduced no lower than the last
|
||||
value set by a CAP_SYS_RESOURCE process. To reduce the value any lower
|
||||
requires CAP_SYS_RESOURCE.
|
||||
|
|
@ -1375,7 +1381,9 @@ minimal amount of work.
|
|||
-------------------------------------------------------------
|
||||
|
||||
This file can be used to check the current score used by the oom-killer is for
|
||||
any given <pid>.
|
||||
any given <pid>. Use it together with /proc/<pid>/oom_score_adj to tune which
|
||||
process should be killed in an out-of-memory situation.
|
||||
|
||||
|
||||
3.3 /proc/<pid>/io - Display the IO accounting fields
|
||||
-------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -164,4 +164,4 @@ read the CRC recorded by the NIC on receipt of the packet.
|
|||
This requests that the NIC receive all possible frames, including errored
|
||||
frames (such as bad FCS, etc). This can be helpful when sniffing a link with
|
||||
bad packets on it. Some NICs may receive more packets if also put into normal
|
||||
PROMISC mdoe.
|
||||
PROMISC mode.
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@ no entry is in the forwarding table.
|
|||
# ip link delete vxlan0
|
||||
|
||||
3. Show vxlan info
|
||||
# ip -d show vxlan0
|
||||
# ip -d link show vxlan0
|
||||
|
||||
It is possible to create, destroy and display the vxlan
|
||||
forwarding table using the new bridge command.
|
||||
|
|
@ -41,7 +41,7 @@ forwarding table using the new bridge command.
|
|||
# bridge fdb add to 00:17:42:8a:b4:05 dst 192.19.0.2 dev vxlan0
|
||||
|
||||
2. Delete forwarding table entry
|
||||
# bridge fdb delete 00:17:42:8a:b4:05
|
||||
# bridge fdb delete 00:17:42:8a:b4:05 dev vxlan0
|
||||
|
||||
3. Show forwarding table
|
||||
# bridge fdb show dev vxlan0
|
||||
|
|
|
|||
96
MAINTAINERS
96
MAINTAINERS
|
|
@ -526,17 +526,17 @@ F: drivers/video/geode/
|
|||
F: arch/x86/include/asm/geode.h
|
||||
|
||||
AMD IOMMU (AMD-VI)
|
||||
M: Joerg Roedel <joerg.roedel@amd.com>
|
||||
M: Joerg Roedel <joro@8bytes.org>
|
||||
L: iommu@lists.linux-foundation.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
|
||||
S: Supported
|
||||
S: Maintained
|
||||
F: drivers/iommu/amd_iommu*.[ch]
|
||||
F: include/linux/amd-iommu.h
|
||||
|
||||
AMD MICROCODE UPDATE SUPPORT
|
||||
M: Andreas Herrmann <andreas.herrmann3@amd.com>
|
||||
M: Andreas Herrmann <herrmann.der.user@googlemail.com>
|
||||
L: amd64-microcode@amd64.org
|
||||
S: Supported
|
||||
S: Maintained
|
||||
F: arch/x86/kernel/microcode_amd.c
|
||||
|
||||
AMS (Apple Motion Sensor) DRIVER
|
||||
|
|
@ -841,6 +841,14 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/kristoffer/linux-hpc.git
|
|||
F: arch/arm/mach-sa1100/jornada720.c
|
||||
F: arch/arm/mach-sa1100/include/mach/jornada720.h
|
||||
|
||||
ARM/IGEP MACHINE SUPPORT
|
||||
M: Enric Balletbo i Serra <eballetbo@gmail.com>
|
||||
M: Javier Martinez Canillas <javier@dowhile0.org>
|
||||
L: linux-omap@vger.kernel.org
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-omap2/board-igep0020.c
|
||||
|
||||
ARM/INCOME PXA270 SUPPORT
|
||||
M: Marek Vasut <marek.vasut@gmail.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
|
|
@ -2717,10 +2725,10 @@ F: include/linux/edac.h
|
|||
|
||||
EDAC-AMD64
|
||||
M: Doug Thompson <dougthompson@xmission.com>
|
||||
M: Borislav Petkov <borislav.petkov@amd.com>
|
||||
M: Borislav Petkov <bp@alien8.de>
|
||||
L: linux-edac@vger.kernel.org
|
||||
W: bluesmoke.sourceforge.net
|
||||
S: Supported
|
||||
S: Maintained
|
||||
F: drivers/edac/amd64_edac*
|
||||
|
||||
EDAC-E752X
|
||||
|
|
@ -3607,6 +3615,49 @@ F: drivers/hid/hid-hyperv.c
|
|||
F: drivers/net/hyperv/
|
||||
F: drivers/staging/hv/
|
||||
|
||||
I2C OVER PARALLEL PORT
|
||||
M: Jean Delvare <khali@linux-fr.org>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/i2c/busses/i2c-parport
|
||||
F: Documentation/i2c/busses/i2c-parport-light
|
||||
F: drivers/i2c/busses/i2c-parport.c
|
||||
F: drivers/i2c/busses/i2c-parport-light.c
|
||||
|
||||
I2C/SMBUS CONTROLLER DRIVERS FOR PC
|
||||
M: Jean Delvare <khali@linux-fr.org>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/i2c/busses/i2c-ali1535
|
||||
F: Documentation/i2c/busses/i2c-ali1563
|
||||
F: Documentation/i2c/busses/i2c-ali15x3
|
||||
F: Documentation/i2c/busses/i2c-amd756
|
||||
F: Documentation/i2c/busses/i2c-amd8111
|
||||
F: Documentation/i2c/busses/i2c-i801
|
||||
F: Documentation/i2c/busses/i2c-nforce2
|
||||
F: Documentation/i2c/busses/i2c-piix4
|
||||
F: Documentation/i2c/busses/i2c-sis5595
|
||||
F: Documentation/i2c/busses/i2c-sis630
|
||||
F: Documentation/i2c/busses/i2c-sis96x
|
||||
F: Documentation/i2c/busses/i2c-via
|
||||
F: Documentation/i2c/busses/i2c-viapro
|
||||
F: drivers/i2c/busses/i2c-ali1535.c
|
||||
F: drivers/i2c/busses/i2c-ali1563.c
|
||||
F: drivers/i2c/busses/i2c-ali15x3.c
|
||||
F: drivers/i2c/busses/i2c-amd756.c
|
||||
F: drivers/i2c/busses/i2c-amd756-s4882.c
|
||||
F: drivers/i2c/busses/i2c-amd8111.c
|
||||
F: drivers/i2c/busses/i2c-i801.c
|
||||
F: drivers/i2c/busses/i2c-isch.c
|
||||
F: drivers/i2c/busses/i2c-nforce2.c
|
||||
F: drivers/i2c/busses/i2c-nforce2-s4985.c
|
||||
F: drivers/i2c/busses/i2c-piix4.c
|
||||
F: drivers/i2c/busses/i2c-sis5595.c
|
||||
F: drivers/i2c/busses/i2c-sis630.c
|
||||
F: drivers/i2c/busses/i2c-sis96x.c
|
||||
F: drivers/i2c/busses/i2c-via.c
|
||||
F: drivers/i2c/busses/i2c-viapro.c
|
||||
|
||||
I2C/SMBUS STUB DRIVER
|
||||
M: "Mark M. Hoffman" <mhoffman@lightlink.com>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
|
|
@ -3614,9 +3665,8 @@ S: Maintained
|
|||
F: drivers/i2c/busses/i2c-stub.c
|
||||
|
||||
I2C SUBSYSTEM
|
||||
M: "Jean Delvare (PC drivers, core)" <khali@linux-fr.org>
|
||||
M: Wolfram Sang <w.sang@pengutronix.de>
|
||||
M: "Ben Dooks (embedded platforms)" <ben-linux@fluff.org>
|
||||
M: "Wolfram Sang (embedded platforms)" <w.sang@pengutronix.de>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
W: http://i2c.wiki.kernel.org/
|
||||
T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-i2c/
|
||||
|
|
@ -3627,6 +3677,13 @@ F: drivers/i2c/
|
|||
F: include/linux/i2c.h
|
||||
F: include/linux/i2c-*.h
|
||||
|
||||
I2C-TAOS-EVM DRIVER
|
||||
M: Jean Delvare <khali@linux-fr.org>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/i2c/busses/i2c-taos-evm
|
||||
F: drivers/i2c/busses/i2c-taos-evm.c
|
||||
|
||||
I2C-TINY-USB DRIVER
|
||||
M: Till Harbaum <till@harbaum.org>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
|
|
@ -3713,7 +3770,7 @@ S: Maintained
|
|||
F: drivers/platform/x86/ideapad-laptop.c
|
||||
|
||||
IDE/ATAPI DRIVERS
|
||||
M: Borislav Petkov <petkovbb@gmail.com>
|
||||
M: Borislav Petkov <bp@alien8.de>
|
||||
L: linux-ide@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/cdrom/ide-cd
|
||||
|
|
@ -4240,8 +4297,8 @@ F: include/linux/lockd/
|
|||
F: include/linux/sunrpc/
|
||||
|
||||
KERNEL VIRTUAL MACHINE (KVM)
|
||||
M: Avi Kivity <avi@redhat.com>
|
||||
M: Marcelo Tosatti <mtosatti@redhat.com>
|
||||
M: Gleb Natapov <gleb@redhat.com>
|
||||
L: kvm@vger.kernel.org
|
||||
W: http://kvm.qumranet.com
|
||||
S: Supported
|
||||
|
|
@ -5373,7 +5430,7 @@ S: Maintained
|
|||
F: sound/drivers/opl4/
|
||||
|
||||
OPROFILE
|
||||
M: Robert Richter <robert.richter@amd.com>
|
||||
M: Robert Richter <rric@kernel.org>
|
||||
L: oprofile-list@lists.sf.net
|
||||
S: Maintained
|
||||
F: arch/*/include/asm/oprofile*.h
|
||||
|
|
@ -7219,6 +7276,14 @@ L: linux-xtensa@linux-xtensa.org
|
|||
S: Maintained
|
||||
F: arch/xtensa/
|
||||
|
||||
THERMAL
|
||||
M: Zhang Rui <rui.zhang@intel.com>
|
||||
L: linux-pm@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git
|
||||
S: Supported
|
||||
F: drivers/thermal/
|
||||
F: include/linux/thermal.h
|
||||
|
||||
THINKPAD ACPI EXTRAS DRIVER
|
||||
M: Henrique de Moraes Holschuh <ibm-acpi@hmh.eng.br>
|
||||
L: ibm-acpi-devel@lists.sourceforge.net
|
||||
|
|
@ -7896,13 +7961,6 @@ M: Roger Luethi <rl@hellgate.ch>
|
|||
S: Maintained
|
||||
F: drivers/net/ethernet/via/via-rhine.c
|
||||
|
||||
VIAPRO SMBUS DRIVER
|
||||
M: Jean Delvare <khali@linux-fr.org>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/i2c/busses/i2c-viapro
|
||||
F: drivers/i2c/busses/i2c-viapro.c
|
||||
|
||||
VIA SD/MMC CARD CONTROLLER DRIVER
|
||||
M: Bruce Chang <brucechang@via.com.tw>
|
||||
M: Harald Welte <HaraldWelte@viatech.com>
|
||||
|
|
@ -8157,7 +8215,7 @@ F: drivers/platform/x86
|
|||
|
||||
X86 MCE INFRASTRUCTURE
|
||||
M: Tony Luck <tony.luck@intel.com>
|
||||
M: Borislav Petkov <bp@amd64.org>
|
||||
M: Borislav Petkov <bp@alien8.de>
|
||||
L: linux-edac@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/x86/kernel/cpu/mcheck/*
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 7
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Terrified Chipmunk
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -445,7 +445,7 @@ struct procfs_args {
|
|||
* unhappy with OSF UFS. [CHECKME]
|
||||
*/
|
||||
static int
|
||||
osf_ufs_mount(char *dirname, struct ufs_args __user *args, int flags)
|
||||
osf_ufs_mount(const char *dirname, struct ufs_args __user *args, int flags)
|
||||
{
|
||||
int retval;
|
||||
struct cdfs_args tmp;
|
||||
|
|
@ -465,7 +465,7 @@ osf_ufs_mount(char *dirname, struct ufs_args __user *args, int flags)
|
|||
}
|
||||
|
||||
static int
|
||||
osf_cdfs_mount(char *dirname, struct cdfs_args __user *args, int flags)
|
||||
osf_cdfs_mount(const char *dirname, struct cdfs_args __user *args, int flags)
|
||||
{
|
||||
int retval;
|
||||
struct cdfs_args tmp;
|
||||
|
|
@ -485,7 +485,7 @@ osf_cdfs_mount(char *dirname, struct cdfs_args __user *args, int flags)
|
|||
}
|
||||
|
||||
static int
|
||||
osf_procfs_mount(char *dirname, struct procfs_args __user *args, int flags)
|
||||
osf_procfs_mount(const char *dirname, struct procfs_args __user *args, int flags)
|
||||
{
|
||||
struct procfs_args tmp;
|
||||
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ ifeq ($(CONFIG_XIP_KERNEL),y)
|
|||
|
||||
$(obj)/xipImage: vmlinux FORCE
|
||||
$(call if_changed,objcopy)
|
||||
$(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))'
|
||||
@$(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))'
|
||||
|
||||
$(obj)/Image $(obj)/zImage: FORCE
|
||||
@echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)'
|
||||
|
|
@ -48,14 +48,14 @@ $(obj)/xipImage: FORCE
|
|||
|
||||
$(obj)/Image: vmlinux FORCE
|
||||
$(call if_changed,objcopy)
|
||||
$(kecho) ' Kernel: $@ is ready'
|
||||
@$(kecho) ' Kernel: $@ is ready'
|
||||
|
||||
$(obj)/compressed/vmlinux: $(obj)/Image FORCE
|
||||
$(Q)$(MAKE) $(build)=$(obj)/compressed $@
|
||||
|
||||
$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
|
||||
$(call if_changed,objcopy)
|
||||
$(kecho) ' Kernel: $@ is ready'
|
||||
@$(kecho) ' Kernel: $@ is ready'
|
||||
|
||||
endif
|
||||
|
||||
|
|
@ -90,7 +90,7 @@ fi
|
|||
$(obj)/uImage: $(obj)/zImage FORCE
|
||||
@$(check_for_multiple_loadaddr)
|
||||
$(call if_changed,uimage)
|
||||
$(kecho) ' Image $@ is ready'
|
||||
@$(kecho) ' Image $@ is ready'
|
||||
|
||||
$(obj)/bootp/bootp: $(obj)/zImage initrd FORCE
|
||||
$(Q)$(MAKE) $(build)=$(obj)/bootp $@
|
||||
|
|
@ -98,7 +98,7 @@ $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE
|
|||
|
||||
$(obj)/bootpImage: $(obj)/bootp/bootp FORCE
|
||||
$(call if_changed,objcopy)
|
||||
$(kecho) ' Kernel: $@ is ready'
|
||||
@$(kecho) ' Kernel: $@ is ready'
|
||||
|
||||
PHONY += initrd FORCE
|
||||
initrd:
|
||||
|
|
|
|||
|
|
@ -73,8 +73,8 @@ gpio: gpio {
|
|||
|
||||
pinmux: pinmux {
|
||||
compatible = "nvidia,tegra30-pinmux";
|
||||
reg = <0x70000868 0xd0 /* Pad control registers */
|
||||
0x70003000 0x3e0>; /* Mux registers */
|
||||
reg = <0x70000868 0xd4 /* Pad control registers */
|
||||
0x70003000 0x3e4>; /* Mux registers */
|
||||
};
|
||||
|
||||
serial@70006000 {
|
||||
|
|
|
|||
|
|
@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
|
|||
static inline void __raw_writew(u16 val, volatile void __iomem *addr)
|
||||
{
|
||||
asm volatile("strh %1, %0"
|
||||
: "+Qo" (*(volatile u16 __force *)addr)
|
||||
: "+Q" (*(volatile u16 __force *)addr)
|
||||
: "r" (val));
|
||||
}
|
||||
|
||||
|
|
@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
|
|||
{
|
||||
u16 val;
|
||||
asm volatile("ldrh %1, %0"
|
||||
: "+Qo" (*(volatile u16 __force *)addr),
|
||||
: "+Q" (*(volatile u16 __force *)addr),
|
||||
"=r" (val));
|
||||
return val;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -10,7 +10,5 @@
|
|||
|
||||
extern void sched_clock_postinit(void);
|
||||
extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
|
||||
extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
|
||||
unsigned long rate);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -27,9 +27,9 @@
|
|||
#if __LINUX_ARM_ARCH__ <= 6
|
||||
ldr \tmp, =elf_hwcap @ may not have MVFR regs
|
||||
ldr \tmp, [\tmp, #0]
|
||||
tst \tmp, #HWCAP_VFPv3D16
|
||||
ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
|
||||
addne \base, \base, #32*4 @ step over unused register space
|
||||
tst \tmp, #HWCAP_VFPD32
|
||||
ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
|
||||
addeq \base, \base, #32*4 @ step over unused register space
|
||||
#else
|
||||
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
|
||||
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
|
||||
|
|
@ -51,9 +51,9 @@
|
|||
#if __LINUX_ARM_ARCH__ <= 6
|
||||
ldr \tmp, =elf_hwcap @ may not have MVFR regs
|
||||
ldr \tmp, [\tmp, #0]
|
||||
tst \tmp, #HWCAP_VFPv3D16
|
||||
stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
|
||||
addne \base, \base, #32*4 @ step over unused register space
|
||||
tst \tmp, #HWCAP_VFPD32
|
||||
stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
|
||||
addeq \base, \base, #32*4 @ step over unused register space
|
||||
#else
|
||||
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
|
||||
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
|
||||
|
|
|
|||
|
|
@ -18,11 +18,12 @@
|
|||
#define HWCAP_THUMBEE (1 << 11)
|
||||
#define HWCAP_NEON (1 << 12)
|
||||
#define HWCAP_VFPv3 (1 << 13)
|
||||
#define HWCAP_VFPv3D16 (1 << 14)
|
||||
#define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
|
||||
#define HWCAP_TLS (1 << 15)
|
||||
#define HWCAP_VFPv4 (1 << 16)
|
||||
#define HWCAP_IDIVA (1 << 17)
|
||||
#define HWCAP_IDIVT (1 << 18)
|
||||
#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
|
||||
#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks)
|
|||
update_sched_clock();
|
||||
}
|
||||
|
||||
void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
|
||||
unsigned long rate)
|
||||
{
|
||||
setup_sched_clock(read, bits, rate);
|
||||
cd.needs_suspend = true;
|
||||
}
|
||||
|
||||
void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
|
||||
{
|
||||
unsigned long r, w;
|
||||
|
|
@ -189,18 +182,15 @@ void __init sched_clock_postinit(void)
|
|||
static int sched_clock_suspend(void)
|
||||
{
|
||||
sched_clock_poll(sched_clock_timer.data);
|
||||
if (cd.needs_suspend)
|
||||
cd.suspended = true;
|
||||
cd.suspended = true;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sched_clock_resume(void)
|
||||
{
|
||||
if (cd.needs_suspend) {
|
||||
cd.epoch_cyc = read_sched_clock();
|
||||
cd.epoch_cyc_copy = cd.epoch_cyc;
|
||||
cd.suspended = false;
|
||||
}
|
||||
cd.epoch_cyc = read_sched_clock();
|
||||
cd.epoch_cyc_copy = cd.epoch_cyc;
|
||||
cd.suspended = false;
|
||||
}
|
||||
|
||||
static struct syscore_ops sched_clock_ops = {
|
||||
|
|
|
|||
|
|
@ -68,7 +68,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
|
|||
|
||||
/* Enable overcurrent notification */
|
||||
for (i = 0; i < data->ports; i++) {
|
||||
if (data->overcurrent_pin[i])
|
||||
if (gpio_is_valid(data->overcurrent_pin[i]))
|
||||
at91_set_gpio_input(data->overcurrent_pin[i], 1);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
|
|||
|
||||
/* Enable overcurrent notification */
|
||||
for (i = 0; i < data->ports; i++) {
|
||||
if (data->overcurrent_pin[i])
|
||||
if (gpio_is_valid(data->overcurrent_pin[i]))
|
||||
at91_set_gpio_input(data->overcurrent_pin[i], 1);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
|
|||
|
||||
/* Enable overcurrent notification */
|
||||
for (i = 0; i < data->ports; i++) {
|
||||
if (data->overcurrent_pin[i])
|
||||
if (gpio_is_valid(data->overcurrent_pin[i]))
|
||||
at91_set_gpio_input(data->overcurrent_pin[i], 1);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
|
|||
|
||||
/* Enable overcurrent notification */
|
||||
for (i = 0; i < data->ports; i++) {
|
||||
if (data->overcurrent_pin[i])
|
||||
if (gpio_is_valid(data->overcurrent_pin[i]))
|
||||
at91_set_gpio_input(data->overcurrent_pin[i], 1);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1841,8 +1841,8 @@ static struct resource sha_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91SAM9G45_ID_AESTDESSHA,
|
||||
.end = AT91SAM9G45_ID_AESTDESSHA,
|
||||
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
|
||||
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
@ -1874,8 +1874,8 @@ static struct resource tdes_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91SAM9G45_ID_AESTDESSHA,
|
||||
.end = AT91SAM9G45_ID_AESTDESSHA,
|
||||
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
|
||||
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
@ -1910,8 +1910,8 @@ static struct resource aes_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AT91SAM9G45_ID_AESTDESSHA,
|
||||
.end = AT91SAM9G45_ID_AESTDESSHA,
|
||||
.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
|
||||
.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -713,8 +713,7 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
|
|||
break;
|
||||
case VPBE_ENC_CUSTOM_TIMINGS:
|
||||
if (pclock <= 27000000) {
|
||||
v |= DM644X_VPSS_MUXSEL_PLL2_MODE |
|
||||
DM644X_VPSS_DACCLKEN;
|
||||
v |= DM644X_VPSS_DACCLKEN;
|
||||
writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
|
||||
} else {
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -275,6 +275,9 @@ static int __init exynos_dma_init(void)
|
|||
exynos_pdma1_pdata.nr_valid_peri =
|
||||
ARRAY_SIZE(exynos4210_pdma1_peri);
|
||||
exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
|
||||
|
||||
if (samsung_rev() == EXYNOS4210_REV_0)
|
||||
exynos_mdma1_device.res.start = EXYNOS4_PA_S_MDMA1;
|
||||
} else if (soc_is_exynos4212() || soc_is_exynos4412()) {
|
||||
exynos_pdma0_pdata.nr_valid_peri =
|
||||
ARRAY_SIZE(exynos4212_pdma0_peri);
|
||||
|
|
|
|||
|
|
@ -90,6 +90,7 @@
|
|||
|
||||
#define EXYNOS4_PA_MDMA0 0x10810000
|
||||
#define EXYNOS4_PA_MDMA1 0x12850000
|
||||
#define EXYNOS4_PA_S_MDMA1 0x12840000
|
||||
#define EXYNOS4_PA_PDMA0 0x12680000
|
||||
#define EXYNOS4_PA_PDMA1 0x12690000
|
||||
#define EXYNOS5_PA_MDMA0 0x10800000
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@ void highbank_restart(char mode, const char *cmd)
|
|||
hignbank_set_pwr_soft_reset();
|
||||
|
||||
scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
|
||||
cpu_do_idle();
|
||||
while (1)
|
||||
cpu_do_idle();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -112,7 +112,7 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,
|
|||
|
||||
clk = clk_register(dev, &gate->hw);
|
||||
if (IS_ERR(clk))
|
||||
kfree(clk);
|
||||
kfree(gate);
|
||||
|
||||
return clk;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@
|
|||
#define MX25_H1_SIC_SHIFT 21
|
||||
#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
|
||||
#define MX25_H1_PP_BIT (1 << 18)
|
||||
#define MX25_H1_PM_BIT (1 << 8)
|
||||
#define MX25_H1_PM_BIT (1 << 16)
|
||||
#define MX25_H1_IPPUE_UP_BIT (1 << 7)
|
||||
#define MX25_H1_IPPUE_DOWN_BIT (1 << 6)
|
||||
#define MX25_H1_TLL_BIT (1 << 5)
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@
|
|||
#define MX35_H1_SIC_SHIFT 21
|
||||
#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
|
||||
#define MX35_H1_PP_BIT (1 << 18)
|
||||
#define MX35_H1_PM_BIT (1 << 8)
|
||||
#define MX35_H1_PM_BIT (1 << 16)
|
||||
#define MX35_H1_IPPUE_UP_BIT (1 << 7)
|
||||
#define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
|
||||
#define MX35_H1_TLL_BIT (1 << 5)
|
||||
|
|
|
|||
|
|
@ -580,6 +580,11 @@ static void __init igep_wlan_bt_init(void)
|
|||
} else
|
||||
return;
|
||||
|
||||
/* Make sure that the GPIO pins are muxed correctly */
|
||||
omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT);
|
||||
omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT);
|
||||
omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT);
|
||||
|
||||
err = gpio_request_array(igep_wlan_bt_gpios,
|
||||
ARRAY_SIZE(igep_wlan_bt_gpios));
|
||||
if (err) {
|
||||
|
|
|
|||
|
|
@ -359,7 +359,7 @@ static struct clockdomain iss_44xx_clkdm = {
|
|||
.clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS,
|
||||
.wkdep_srcs = iss_wkup_sleep_deps,
|
||||
.sleepdep_srcs = iss_wkup_sleep_deps,
|
||||
.flags = CLKDM_CAN_HWSUP_SWSUP,
|
||||
.flags = CLKDM_CAN_SWSUP,
|
||||
};
|
||||
|
||||
static struct clockdomain l3_dss_44xx_clkdm = {
|
||||
|
|
|
|||
|
|
@ -64,30 +64,36 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
|
|||
struct spi_board_info *spi_bi = &ads7846_spi_board_info;
|
||||
int err;
|
||||
|
||||
err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown");
|
||||
if (err) {
|
||||
pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err);
|
||||
return;
|
||||
}
|
||||
/*
|
||||
* If a board defines get_pendown_state() function, request the pendown
|
||||
* GPIO and set the GPIO debounce time.
|
||||
* If a board does not define the get_pendown_state() function, then
|
||||
* the ads7846 driver will setup the pendown GPIO itself.
|
||||
*/
|
||||
if (board_pdata && board_pdata->get_pendown_state) {
|
||||
err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown");
|
||||
if (err) {
|
||||
pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err);
|
||||
return;
|
||||
}
|
||||
|
||||
if (gpio_debounce)
|
||||
gpio_set_debounce(gpio_pendown, gpio_debounce);
|
||||
if (gpio_debounce)
|
||||
gpio_set_debounce(gpio_pendown, gpio_debounce);
|
||||
|
||||
gpio_export(gpio_pendown, 0);
|
||||
}
|
||||
|
||||
spi_bi->bus_num = bus_num;
|
||||
spi_bi->irq = gpio_to_irq(gpio_pendown);
|
||||
|
||||
ads7846_config.gpio_pendown = gpio_pendown;
|
||||
|
||||
if (board_pdata) {
|
||||
board_pdata->gpio_pendown = gpio_pendown;
|
||||
board_pdata->gpio_pendown_debounce = gpio_debounce;
|
||||
spi_bi->platform_data = board_pdata;
|
||||
if (board_pdata->get_pendown_state)
|
||||
gpio_export(gpio_pendown, 0);
|
||||
} else {
|
||||
ads7846_config.gpio_pendown = gpio_pendown;
|
||||
}
|
||||
|
||||
if (!board_pdata || (board_pdata && !board_pdata->get_pendown_state))
|
||||
gpio_free(gpio_pendown);
|
||||
|
||||
spi_register_board_info(&ads7846_spi_board_info, 1);
|
||||
}
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@
|
|||
#include <linux/of.h>
|
||||
#include <linux/pinctrl/machine.h>
|
||||
#include <linux/platform_data/omap4-keypad.h>
|
||||
#include <linux/platform_data/omap_ocp2scp.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
|
@ -613,6 +614,83 @@ static void omap_init_vout(void)
|
|||
static inline void omap_init_vout(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_OMAP_OCP2SCP) || defined(CONFIG_OMAP_OCP2SCP_MODULE)
|
||||
static int count_ocp2scp_devices(struct omap_ocp2scp_dev *ocp2scp_dev)
|
||||
{
|
||||
int cnt = 0;
|
||||
|
||||
while (ocp2scp_dev->drv_name != NULL) {
|
||||
cnt++;
|
||||
ocp2scp_dev++;
|
||||
}
|
||||
|
||||
return cnt;
|
||||
}
|
||||
|
||||
static void omap_init_ocp2scp(void)
|
||||
{
|
||||
struct omap_hwmod *oh;
|
||||
struct platform_device *pdev;
|
||||
int bus_id = -1, dev_cnt = 0, i;
|
||||
struct omap_ocp2scp_dev *ocp2scp_dev;
|
||||
const char *oh_name, *name;
|
||||
struct omap_ocp2scp_platform_data *pdata;
|
||||
|
||||
if (!cpu_is_omap44xx())
|
||||
return;
|
||||
|
||||
oh_name = "ocp2scp_usb_phy";
|
||||
name = "omap-ocp2scp";
|
||||
|
||||
oh = omap_hwmod_lookup(oh_name);
|
||||
if (!oh) {
|
||||
pr_err("%s: could not find omap_hwmod for %s\n", __func__,
|
||||
oh_name);
|
||||
return;
|
||||
}
|
||||
|
||||
pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
|
||||
if (!pdata) {
|
||||
pr_err("%s: No memory for ocp2scp pdata\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
ocp2scp_dev = oh->dev_attr;
|
||||
dev_cnt = count_ocp2scp_devices(ocp2scp_dev);
|
||||
|
||||
if (!dev_cnt) {
|
||||
pr_err("%s: No devices connected to ocp2scp\n", __func__);
|
||||
kfree(pdata);
|
||||
return;
|
||||
}
|
||||
|
||||
pdata->devices = kzalloc(sizeof(struct omap_ocp2scp_dev *)
|
||||
* dev_cnt, GFP_KERNEL);
|
||||
if (!pdata->devices) {
|
||||
pr_err("%s: No memory for ocp2scp pdata devices\n", __func__);
|
||||
kfree(pdata);
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < dev_cnt; i++, ocp2scp_dev++)
|
||||
pdata->devices[i] = ocp2scp_dev;
|
||||
|
||||
pdata->dev_cnt = dev_cnt;
|
||||
|
||||
pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(*pdata), NULL,
|
||||
0, false);
|
||||
if (IS_ERR(pdev)) {
|
||||
pr_err("Could not build omap_device for %s %s\n",
|
||||
name, oh_name);
|
||||
kfree(pdata->devices);
|
||||
kfree(pdata);
|
||||
return;
|
||||
}
|
||||
}
|
||||
#else
|
||||
static inline void omap_init_ocp2scp(void) { }
|
||||
#endif
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
static int __init omap2_init_devices(void)
|
||||
|
|
@ -640,6 +718,7 @@ static int __init omap2_init_devices(void)
|
|||
omap_init_sham();
|
||||
omap_init_aes();
|
||||
omap_init_vout();
|
||||
omap_init_ocp2scp();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -421,6 +421,38 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* _wait_softreset_complete - wait for an OCP softreset to complete
|
||||
* @oh: struct omap_hwmod * to wait on
|
||||
*
|
||||
* Wait until the IP block represented by @oh reports that its OCP
|
||||
* softreset is complete. This can be triggered by software (see
|
||||
* _ocp_softreset()) or by hardware upon returning from off-mode (one
|
||||
* example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
|
||||
* microseconds. Returns the number of microseconds waited.
|
||||
*/
|
||||
static int _wait_softreset_complete(struct omap_hwmod *oh)
|
||||
{
|
||||
struct omap_hwmod_class_sysconfig *sysc;
|
||||
u32 softrst_mask;
|
||||
int c = 0;
|
||||
|
||||
sysc = oh->class->sysc;
|
||||
|
||||
if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
|
||||
omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
|
||||
& SYSS_RESETDONE_MASK),
|
||||
MAX_MODULE_SOFTRESET_WAIT, c);
|
||||
else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
|
||||
softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
|
||||
omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
|
||||
& softrst_mask),
|
||||
MAX_MODULE_SOFTRESET_WAIT, c);
|
||||
}
|
||||
|
||||
return c;
|
||||
}
|
||||
|
||||
/**
|
||||
* _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
|
||||
* @oh: struct omap_hwmod *
|
||||
|
|
@ -1282,6 +1314,18 @@ static void _enable_sysc(struct omap_hwmod *oh)
|
|||
if (!oh->class->sysc)
|
||||
return;
|
||||
|
||||
/*
|
||||
* Wait until reset has completed, this is needed as the IP
|
||||
* block is reset automatically by hardware in some cases
|
||||
* (off-mode for example), and the drivers require the
|
||||
* IP to be ready when they access it
|
||||
*/
|
||||
if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
|
||||
_enable_optional_clocks(oh);
|
||||
_wait_softreset_complete(oh);
|
||||
if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
|
||||
_disable_optional_clocks(oh);
|
||||
|
||||
v = oh->_sysc_cache;
|
||||
sf = oh->class->sysc->sysc_flags;
|
||||
|
||||
|
|
@ -1804,7 +1848,7 @@ static int _am33xx_disable_module(struct omap_hwmod *oh)
|
|||
*/
|
||||
static int _ocp_softreset(struct omap_hwmod *oh)
|
||||
{
|
||||
u32 v, softrst_mask;
|
||||
u32 v;
|
||||
int c = 0;
|
||||
int ret = 0;
|
||||
|
||||
|
|
@ -1834,19 +1878,7 @@ static int _ocp_softreset(struct omap_hwmod *oh)
|
|||
if (oh->class->sysc->srst_udelay)
|
||||
udelay(oh->class->sysc->srst_udelay);
|
||||
|
||||
if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
|
||||
omap_test_timeout((omap_hwmod_read(oh,
|
||||
oh->class->sysc->syss_offs)
|
||||
& SYSS_RESETDONE_MASK),
|
||||
MAX_MODULE_SOFTRESET_WAIT, c);
|
||||
else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
|
||||
softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
|
||||
omap_test_timeout(!(omap_hwmod_read(oh,
|
||||
oh->class->sysc->sysc_offs)
|
||||
& softrst_mask),
|
||||
MAX_MODULE_SOFTRESET_WAIT, c);
|
||||
}
|
||||
|
||||
c = _wait_softreset_complete(oh);
|
||||
if (c == MAX_MODULE_SOFTRESET_WAIT)
|
||||
pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
|
||||
oh->name, MAX_MODULE_SOFTRESET_WAIT);
|
||||
|
|
@ -2352,6 +2384,9 @@ static int __init _setup_reset(struct omap_hwmod *oh)
|
|||
if (oh->_state != _HWMOD_STATE_INITIALIZED)
|
||||
return -EINVAL;
|
||||
|
||||
if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
|
||||
return -EPERM;
|
||||
|
||||
if (oh->rst_lines_cnt == 0) {
|
||||
r = _enable(oh);
|
||||
if (r) {
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/platform_data/gpio-omap.h>
|
||||
#include <linux/power/smartreflex.h>
|
||||
#include <linux/platform_data/omap_ocp2scp.h>
|
||||
|
||||
#include <plat/omap_hwmod.h>
|
||||
#include <plat/i2c.h>
|
||||
|
|
@ -2125,6 +2126,14 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
|
|||
.name = "mcpdm",
|
||||
.class = &omap44xx_mcpdm_hwmod_class,
|
||||
.clkdm_name = "abe_clkdm",
|
||||
/*
|
||||
* It's suspected that the McPDM requires an off-chip main
|
||||
* functional clock, controlled via I2C. This IP block is
|
||||
* currently reset very early during boot, before I2C is
|
||||
* available, so it doesn't seem that we have any choice in
|
||||
* the kernel other than to avoid resetting it.
|
||||
*/
|
||||
.flags = HWMOD_EXT_OPT_MAIN_CLK,
|
||||
.mpu_irqs = omap44xx_mcpdm_irqs,
|
||||
.sdma_reqs = omap44xx_mcpdm_sdma_reqs,
|
||||
.main_clk = "mcpdm_fck",
|
||||
|
|
@ -2681,6 +2690,32 @@ static struct omap_hwmod_class omap44xx_ocp2scp_hwmod_class = {
|
|||
.sysc = &omap44xx_ocp2scp_sysc,
|
||||
};
|
||||
|
||||
/* ocp2scp dev_attr */
|
||||
static struct resource omap44xx_usb_phy_and_pll_addrs[] = {
|
||||
{
|
||||
.name = "usb_phy",
|
||||
.start = 0x4a0ad080,
|
||||
.end = 0x4a0ae000,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* XXX: Remove this once control module driver is in place */
|
||||
.name = "ctrl_dev",
|
||||
.start = 0x4a002300,
|
||||
.end = 0x4a002303,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = {
|
||||
{
|
||||
.drv_name = "omap-usb2",
|
||||
.res = omap44xx_usb_phy_and_pll_addrs,
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
/* ocp2scp_usb_phy */
|
||||
static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
|
||||
.name = "ocp2scp_usb_phy",
|
||||
|
|
@ -2694,6 +2729,7 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
|
|||
.modulemode = MODULEMODE_HWCTRL,
|
||||
},
|
||||
},
|
||||
.dev_attr = ocp2scp_dev_attr,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -73,6 +73,7 @@ void __init omap4_pmic_init(const char *pmic_type,
|
|||
{
|
||||
/* PMIC part*/
|
||||
omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
|
||||
omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT);
|
||||
omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
|
||||
|
||||
/* Register additional devices on i2c1 bus if needed */
|
||||
|
|
@ -366,7 +367,7 @@ static struct regulator_init_data omap4_clk32kg_idata = {
|
|||
};
|
||||
|
||||
static struct regulator_consumer_supply omap4_vdd1_supply[] = {
|
||||
REGULATOR_SUPPLY("vcc", "mpu.0"),
|
||||
REGULATOR_SUPPLY("vcc", "cpu0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply omap4_vdd2_supply[] = {
|
||||
|
|
|
|||
|
|
@ -264,7 +264,7 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
|
|||
|
||||
if (initialized) {
|
||||
if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
|
||||
pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).",
|
||||
pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).\n",
|
||||
__func__, voltdm->name, i2c_high_speed);
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@
|
|||
#include <linux/mfd/asic3.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/pda_power.h>
|
||||
#include <linux/pwm.h>
|
||||
#include <linux/pwm_backlight.h>
|
||||
#include <linux/regulator/driver.h>
|
||||
#include <linux/regulator/gpio-regulator.h>
|
||||
|
|
@ -556,7 +557,7 @@ static struct platform_device hx4700_lcd = {
|
|||
*/
|
||||
|
||||
static struct platform_pwm_backlight_data backlight_data = {
|
||||
.pwm_id = 1,
|
||||
.pwm_id = -1, /* Superseded by pwm_lookup */
|
||||
.max_brightness = 200,
|
||||
.dft_brightness = 100,
|
||||
.pwm_period_ns = 30923,
|
||||
|
|
@ -571,6 +572,10 @@ static struct platform_device backlight = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct pwm_lookup hx4700_pwm_lookup[] = {
|
||||
PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL),
|
||||
};
|
||||
|
||||
/*
|
||||
* USB "Transceiver"
|
||||
*/
|
||||
|
|
@ -872,6 +877,7 @@ static void __init hx4700_init(void)
|
|||
pxa_set_stuart_info(NULL);
|
||||
|
||||
platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
pwm_add_table(hx4700_pwm_lookup, ARRAY_SIZE(hx4700_pwm_lookup));
|
||||
|
||||
pxa_set_ficp_info(&ficp_info);
|
||||
pxa27x_set_i2c_power_info(NULL);
|
||||
|
|
|
|||
|
|
@ -86,10 +86,7 @@ static void spitz_discharge1(int on)
|
|||
gpio_set_value(SPITZ_GPIO_LED_GREEN, on);
|
||||
}
|
||||
|
||||
static unsigned long gpio18_config[] = {
|
||||
GPIO18_RDY,
|
||||
GPIO18_GPIO,
|
||||
};
|
||||
static unsigned long gpio18_config = GPIO18_GPIO;
|
||||
|
||||
static void spitz_presuspend(void)
|
||||
{
|
||||
|
|
@ -112,7 +109,7 @@ static void spitz_presuspend(void)
|
|||
PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
|
||||
PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0);
|
||||
|
||||
pxa2xx_mfp_config(&gpio18_config[0], 1);
|
||||
pxa2xx_mfp_config(&gpio18_config, 1);
|
||||
gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown");
|
||||
gpio_free(18);
|
||||
|
||||
|
|
@ -131,7 +128,6 @@ static void spitz_presuspend(void)
|
|||
|
||||
static void spitz_postsuspend(void)
|
||||
{
|
||||
pxa2xx_mfp_config(&gpio18_config[1], 1);
|
||||
}
|
||||
|
||||
static int spitz_should_wakeup(unsigned int resume_on_alarm)
|
||||
|
|
|
|||
|
|
@ -745,7 +745,7 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs,
|
|||
static int
|
||||
do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
|
||||
{
|
||||
union offset_union offset;
|
||||
union offset_union uninitialized_var(offset);
|
||||
unsigned long instr = 0, instrptr;
|
||||
int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs);
|
||||
unsigned int type;
|
||||
|
|
|
|||
|
|
@ -26,12 +26,14 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/i2c-omap.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/clk.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
#include <plat/i2c.h>
|
||||
#include <plat/omap-pm.h>
|
||||
#include <plat/omap_device.h>
|
||||
|
||||
#define OMAP_I2C_SIZE 0x3f
|
||||
|
|
@ -127,6 +129,16 @@ static inline int omap1_i2c_add_bus(int bus_id)
|
|||
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||
/*
|
||||
* XXX This function is a temporary compatibility wrapper - only
|
||||
* needed until the I2C driver can be converted to call
|
||||
* omap_pm_set_max_dev_wakeup_lat() and handle a return code.
|
||||
*/
|
||||
static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
|
||||
{
|
||||
omap_pm_set_max_mpu_wakeup_lat(dev, t);
|
||||
}
|
||||
|
||||
static inline int omap2_i2c_add_bus(int bus_id)
|
||||
{
|
||||
int l;
|
||||
|
|
@ -158,6 +170,15 @@ static inline int omap2_i2c_add_bus(int bus_id)
|
|||
dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
|
||||
pdata->flags = dev_attr->flags;
|
||||
|
||||
/*
|
||||
* When waiting for completion of a i2c transfer, we need to
|
||||
* set a wake up latency constraint for the MPU. This is to
|
||||
* ensure quick enough wakeup from idle, when transfer
|
||||
* completes.
|
||||
* Only omap3 has support for constraints
|
||||
*/
|
||||
if (cpu_is_omap34xx())
|
||||
pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
|
||||
pdev = omap_device_build(name, bus_id, oh, pdata,
|
||||
sizeof(struct omap_i2c_bus_platform_data),
|
||||
NULL, 0, 0);
|
||||
|
|
|
|||
|
|
@ -443,6 +443,11 @@ struct omap_hwmod_omap4_prcm {
|
|||
* in order to complete the reset. Optional clocks will be disabled
|
||||
* again after the reset.
|
||||
* HWMOD_16BIT_REG: Module has 16bit registers
|
||||
* HWMOD_EXT_OPT_MAIN_CLK: The only main functional clock source for
|
||||
* this IP block comes from an off-chip source and is not always
|
||||
* enabled. This prevents the hwmod code from being able to
|
||||
* enable and reset the IP block early. XXX Eventually it should
|
||||
* be possible to query the clock framework for this information.
|
||||
*/
|
||||
#define HWMOD_SWSUP_SIDLE (1 << 0)
|
||||
#define HWMOD_SWSUP_MSTANDBY (1 << 1)
|
||||
|
|
@ -453,6 +458,7 @@ struct omap_hwmod_omap4_prcm {
|
|||
#define HWMOD_NO_IDLEST (1 << 6)
|
||||
#define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7)
|
||||
#define HWMOD_16BIT_REG (1 << 8)
|
||||
#define HWMOD_EXT_OPT_MAIN_CLK (1 << 9)
|
||||
|
||||
/*
|
||||
* omap_hwmod._int_flags definitions
|
||||
|
|
|
|||
|
|
@ -5,6 +5,6 @@
|
|||
#
|
||||
|
||||
include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types
|
||||
$(kecho) ' Generating $@'
|
||||
@$(kecho) ' Generating $@'
|
||||
@mkdir -p $(dir $@)
|
||||
$(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; }
|
||||
|
|
|
|||
|
|
@ -701,11 +701,14 @@ static int __init vfp_init(void)
|
|||
elf_hwcap |= HWCAP_VFPv3;
|
||||
|
||||
/*
|
||||
* Check for VFPv3 D16. CPUs in this configuration
|
||||
* only have 16 x 64bit registers.
|
||||
* Check for VFPv3 D16 and VFPv4 D16. CPUs in
|
||||
* this configuration only have 16 x 64bit
|
||||
* registers.
|
||||
*/
|
||||
if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
|
||||
elf_hwcap |= HWCAP_VFPv3D16;
|
||||
elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */
|
||||
else
|
||||
elf_hwcap |= HWCAP_VFPD32;
|
||||
}
|
||||
#endif
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -166,3 +166,14 @@ void free_xenballooned_pages(int nr_pages, struct page **pages)
|
|||
*pages = NULL;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(free_xenballooned_pages);
|
||||
|
||||
/* In the hypervisor.S file. */
|
||||
EXPORT_SYMBOL_GPL(HYPERVISOR_event_channel_op);
|
||||
EXPORT_SYMBOL_GPL(HYPERVISOR_grant_table_op);
|
||||
EXPORT_SYMBOL_GPL(HYPERVISOR_xen_version);
|
||||
EXPORT_SYMBOL_GPL(HYPERVISOR_console_io);
|
||||
EXPORT_SYMBOL_GPL(HYPERVISOR_sched_op);
|
||||
EXPORT_SYMBOL_GPL(HYPERVISOR_hvm_op);
|
||||
EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op);
|
||||
EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op);
|
||||
EXPORT_SYMBOL_GPL(privcmd_call);
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
config ARM64
|
||||
def_bool y
|
||||
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
|
||||
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select GENERIC_HARDIRQS_NO_DEPRECATED
|
||||
select GENERIC_IOMAP
|
||||
|
|
|
|||
|
|
@ -25,12 +25,10 @@
|
|||
#include <asm/user.h>
|
||||
|
||||
typedef unsigned long elf_greg_t;
|
||||
typedef unsigned long elf_freg_t[3];
|
||||
|
||||
#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
|
||||
typedef elf_greg_t elf_gregset_t[ELF_NGREG];
|
||||
|
||||
typedef struct user_fp elf_fpregset_t;
|
||||
typedef struct user_fpsimd_state elf_fpregset_t;
|
||||
|
||||
#define EM_AARCH64 183
|
||||
|
||||
|
|
@ -87,7 +85,6 @@ typedef struct user_fp elf_fpregset_t;
|
|||
#define R_AARCH64_MOVW_PREL_G2_NC 292
|
||||
#define R_AARCH64_MOVW_PREL_G3 293
|
||||
|
||||
|
||||
/*
|
||||
* These are used to set parameters in the core dumps.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -25,9 +25,8 @@
|
|||
* - FPSR and FPCR
|
||||
* - 32 128-bit data registers
|
||||
*
|
||||
* Note that user_fp forms a prefix of this structure, which is relied
|
||||
* upon in the ptrace FP/SIMD accessors. struct user_fpsimd_state must
|
||||
* form a prefix of struct fpsimd_state.
|
||||
* Note that user_fpsimd forms a prefix of this structure, which is
|
||||
* relied upon in the ptrace FP/SIMD accessors.
|
||||
*/
|
||||
struct fpsimd_state {
|
||||
union {
|
||||
|
|
|
|||
|
|
@ -114,7 +114,7 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
|
|||
* I/O port access primitives.
|
||||
*/
|
||||
#define IO_SPACE_LIMIT 0xffff
|
||||
#define PCI_IOBASE ((void __iomem *)0xffffffbbfffe0000UL)
|
||||
#define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_2M))
|
||||
|
||||
static inline u8 inb(unsigned long addr)
|
||||
{
|
||||
|
|
@ -222,12 +222,12 @@ extern void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot
|
|||
extern void __iounmap(volatile void __iomem *addr);
|
||||
|
||||
#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_DIRTY)
|
||||
#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
|
||||
#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
|
||||
#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC))
|
||||
|
||||
#define ioremap(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE)
|
||||
#define ioremap_nocache(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE)
|
||||
#define ioremap_wc(addr, size) __ioremap((addr), (size), PROT_NORMAL_NC)
|
||||
#define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
|
||||
#define ioremap_nocache(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
|
||||
#define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC))
|
||||
#define iounmap __iounmap
|
||||
|
||||
#define ARCH_HAS_IOREMAP_WC
|
||||
|
|
|
|||
|
|
@ -38,7 +38,8 @@
|
|||
#define PMD_SECT_S (_AT(pmdval_t, 3) << 8)
|
||||
#define PMD_SECT_AF (_AT(pmdval_t, 1) << 10)
|
||||
#define PMD_SECT_NG (_AT(pmdval_t, 1) << 11)
|
||||
#define PMD_SECT_XN (_AT(pmdval_t, 1) << 54)
|
||||
#define PMD_SECT_PXN (_AT(pmdval_t, 1) << 53)
|
||||
#define PMD_SECT_UXN (_AT(pmdval_t, 1) << 54)
|
||||
|
||||
/*
|
||||
* AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
|
||||
|
|
@ -57,7 +58,8 @@
|
|||
#define PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */
|
||||
#define PTE_AF (_AT(pteval_t, 1) << 10) /* Access Flag */
|
||||
#define PTE_NG (_AT(pteval_t, 1) << 11) /* nG */
|
||||
#define PTE_XN (_AT(pteval_t, 1) << 54) /* XN */
|
||||
#define PTE_PXN (_AT(pteval_t, 1) << 53) /* Privileged XN */
|
||||
#define PTE_UXN (_AT(pteval_t, 1) << 54) /* User XN */
|
||||
|
||||
/*
|
||||
* AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
|
||||
|
|
|
|||
|
|
@ -62,23 +62,23 @@ extern pgprot_t pgprot_default;
|
|||
|
||||
#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
|
||||
|
||||
#define PAGE_NONE _MOD_PROT(pgprot_default, PTE_NG | PTE_XN | PTE_RDONLY)
|
||||
#define PAGE_SHARED _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN)
|
||||
#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG)
|
||||
#define PAGE_COPY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY)
|
||||
#define PAGE_COPY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_RDONLY)
|
||||
#define PAGE_READONLY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY)
|
||||
#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_RDONLY)
|
||||
#define PAGE_KERNEL _MOD_PROT(pgprot_default, PTE_XN | PTE_DIRTY)
|
||||
#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_default, PTE_DIRTY)
|
||||
#define PAGE_NONE _MOD_PROT(pgprot_default, PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
|
||||
#define PAGE_SHARED _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
|
||||
#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN)
|
||||
#define PAGE_COPY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
|
||||
#define PAGE_COPY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
|
||||
#define PAGE_READONLY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
|
||||
#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
|
||||
#define PAGE_KERNEL _MOD_PROT(pgprot_default, PTE_PXN | PTE_UXN | PTE_DIRTY)
|
||||
#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_default, PTE_UXN | PTE_DIRTY)
|
||||
|
||||
#define __PAGE_NONE __pgprot(_PAGE_DEFAULT | PTE_NG | PTE_XN | PTE_RDONLY)
|
||||
#define __PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN)
|
||||
#define __PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG)
|
||||
#define __PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY)
|
||||
#define __PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_RDONLY)
|
||||
#define __PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY)
|
||||
#define __PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_RDONLY)
|
||||
#define __PAGE_NONE __pgprot(_PAGE_DEFAULT | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
|
||||
#define __PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
|
||||
#define __PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
|
||||
#define __PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
|
||||
#define __PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
|
||||
#define __PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
|
||||
#define __PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
|
|
@ -130,10 +130,10 @@ extern struct page *empty_zero_page;
|
|||
#define pte_young(pte) (pte_val(pte) & PTE_AF)
|
||||
#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL)
|
||||
#define pte_write(pte) (!(pte_val(pte) & PTE_RDONLY))
|
||||
#define pte_exec(pte) (!(pte_val(pte) & PTE_XN))
|
||||
#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
|
||||
|
||||
#define pte_present_exec_user(pte) \
|
||||
((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_XN)) == \
|
||||
((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == \
|
||||
(PTE_VALID | PTE_USER))
|
||||
|
||||
#define PTE_BIT_FUNC(fn,op) \
|
||||
|
|
@ -262,7 +262,7 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
|
|||
|
||||
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
||||
{
|
||||
const pteval_t mask = PTE_USER | PTE_XN | PTE_RDONLY;
|
||||
const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY;
|
||||
pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
|
||||
return pte;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -43,6 +43,8 @@
|
|||
#else
|
||||
#define STACK_TOP STACK_TOP_MAX
|
||||
#endif /* CONFIG_COMPAT */
|
||||
|
||||
#define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
struct debug_info {
|
||||
|
|
|
|||
|
|
@ -14,7 +14,6 @@
|
|||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#ifdef CONFIG_COMPAT
|
||||
#define __ARCH_WANT_COMPAT_IPC_PARSE_VERSION
|
||||
#define __ARCH_WANT_COMPAT_STAT64
|
||||
#define __ARCH_WANT_SYS_GETHOSTNAME
|
||||
#define __ARCH_WANT_SYS_PAUSE
|
||||
|
|
|
|||
|
|
@ -613,17 +613,11 @@ enum armv8_pmuv3_perf_types {
|
|||
ARMV8_PMUV3_PERFCTR_BUS_ACCESS = 0x19,
|
||||
ARMV8_PMUV3_PERFCTR_MEM_ERROR = 0x1A,
|
||||
ARMV8_PMUV3_PERFCTR_BUS_CYCLES = 0x1D,
|
||||
|
||||
/*
|
||||
* This isn't an architected event.
|
||||
* We detect this event number and use the cycle counter instead.
|
||||
*/
|
||||
ARMV8_PMUV3_PERFCTR_CPU_CYCLES = 0xFF,
|
||||
};
|
||||
|
||||
/* PMUv3 HW events mapping. */
|
||||
static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = {
|
||||
[PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CPU_CYCLES,
|
||||
[PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES,
|
||||
[PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED,
|
||||
[PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS,
|
||||
[PERF_COUNT_HW_CACHE_MISSES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_REFILL,
|
||||
|
|
@ -1106,7 +1100,7 @@ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc,
|
|||
unsigned long evtype = event->config_base & ARMV8_EVTYPE_EVENT;
|
||||
|
||||
/* Always place a cycle counter into the cycle counter. */
|
||||
if (evtype == ARMV8_PMUV3_PERFCTR_CPU_CYCLES) {
|
||||
if (evtype == ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES) {
|
||||
if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask))
|
||||
return -EAGAIN;
|
||||
|
||||
|
|
|
|||
|
|
@ -309,24 +309,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
|
|||
return last;
|
||||
}
|
||||
|
||||
/*
|
||||
* Fill in the task's elfregs structure for a core dump.
|
||||
*/
|
||||
int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
|
||||
{
|
||||
elf_core_copy_regs(elfregs, task_pt_regs(t));
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* fill in the fpe structure for a core dump...
|
||||
*/
|
||||
int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(dump_fpu);
|
||||
|
||||
/*
|
||||
* Shuffle the argument into the correct register before calling the
|
||||
* thread function. x1 is the thread argument, x2 is the pointer to
|
||||
|
|
|
|||
|
|
@ -211,8 +211,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
|
|||
* before we continue.
|
||||
*/
|
||||
set_cpu_online(cpu, true);
|
||||
while (!cpu_active(cpu))
|
||||
cpu_relax();
|
||||
complete(&cpu_running);
|
||||
|
||||
/*
|
||||
* OK, it's off to the idle thread for us
|
||||
|
|
|
|||
|
|
@ -80,7 +80,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
|
|||
#ifdef CONFIG_ZONE_DMA32
|
||||
/* 4GB maximum for 32-bit only capable devices */
|
||||
max_dma32 = min(max, MAX_DMA32_PFN);
|
||||
zone_size[ZONE_DMA32] = max_dma32 - min;
|
||||
zone_size[ZONE_DMA32] = max(min, max_dma32) - min;
|
||||
#endif
|
||||
zone_size[ZONE_NORMAL] = max - max_dma32;
|
||||
|
||||
|
|
|
|||
|
|
@ -2,7 +2,8 @@
|
|||
#define __ARCH_H8300_CACHE_H
|
||||
|
||||
/* bytes per L1 cache line */
|
||||
#define L1_CACHE_BYTES 4
|
||||
#define L1_CACHE_SHIFT 2
|
||||
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
|
||||
|
||||
/* m68k-elf-gcc 2.95.2 doesn't like these */
|
||||
|
||||
|
|
|
|||
|
|
@ -637,7 +637,6 @@ mem_init (void)
|
|||
|
||||
high_memory = __va(max_low_pfn * PAGE_SIZE);
|
||||
|
||||
reset_zone_present_pages();
|
||||
for_each_online_pgdat(pgdat)
|
||||
if (pgdat->bdata->node_bootmem_map)
|
||||
totalram_pages += free_all_bootmem_node(pgdat);
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@ struct k_sigaction {
|
|||
static inline void sigaddset(sigset_t *set, int _sig)
|
||||
{
|
||||
asm ("bfset %0{%1,#1}"
|
||||
: "+od" (*set)
|
||||
: "+o" (*set)
|
||||
: "id" ((_sig - 1) ^ 31)
|
||||
: "cc");
|
||||
}
|
||||
|
|
@ -49,7 +49,7 @@ static inline void sigaddset(sigset_t *set, int _sig)
|
|||
static inline void sigdelset(sigset_t *set, int _sig)
|
||||
{
|
||||
asm ("bfclr %0{%1,#1}"
|
||||
: "+od" (*set)
|
||||
: "+o" (*set)
|
||||
: "id" ((_sig - 1) ^ 31)
|
||||
: "cc");
|
||||
}
|
||||
|
|
@ -65,7 +65,7 @@ static inline int __gen_sigismember(sigset_t *set, int _sig)
|
|||
int ret;
|
||||
asm ("bfextu %1{%2,#1},%0"
|
||||
: "=d" (ret)
|
||||
: "od" (*set), "id" ((_sig-1) ^ 31)
|
||||
: "o" (*set), "id" ((_sig-1) ^ 31)
|
||||
: "cc");
|
||||
return ret;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@
|
|||
* measurement, and debugging facilities.
|
||||
*/
|
||||
|
||||
#include <linux/irqflags.h>
|
||||
#include <asm/octeon/cvmx.h>
|
||||
#include <asm/octeon/cvmx-l2c.h>
|
||||
#include <asm/octeon/cvmx-spinlock.h>
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@
|
|||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/irqflags.h>
|
||||
|
||||
#include <asm/bcache.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -14,7 +14,6 @@
|
|||
#endif
|
||||
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/irqflags.h>
|
||||
#include <linux/types.h>
|
||||
#include <asm/barrier.h>
|
||||
#include <asm/byteorder.h> /* sigh ... */
|
||||
|
|
@ -44,6 +43,24 @@
|
|||
#define smp_mb__before_clear_bit() smp_mb__before_llsc()
|
||||
#define smp_mb__after_clear_bit() smp_llsc_mb()
|
||||
|
||||
|
||||
/*
|
||||
* These are the "slower" versions of the functions and are in bitops.c.
|
||||
* These functions call raw_local_irq_{save,restore}().
|
||||
*/
|
||||
void __mips_set_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
void __mips_change_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
int __mips_test_and_set_bit(unsigned long nr,
|
||||
volatile unsigned long *addr);
|
||||
int __mips_test_and_set_bit_lock(unsigned long nr,
|
||||
volatile unsigned long *addr);
|
||||
int __mips_test_and_clear_bit(unsigned long nr,
|
||||
volatile unsigned long *addr);
|
||||
int __mips_test_and_change_bit(unsigned long nr,
|
||||
volatile unsigned long *addr);
|
||||
|
||||
|
||||
/*
|
||||
* set_bit - Atomically set a bit in memory
|
||||
* @nr: the bit to set
|
||||
|
|
@ -57,7 +74,7 @@
|
|||
static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
|
||||
{
|
||||
unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
|
||||
unsigned short bit = nr & SZLONG_MASK;
|
||||
int bit = nr & SZLONG_MASK;
|
||||
unsigned long temp;
|
||||
|
||||
if (kernel_uses_llsc && R10000_LLSC_WAR) {
|
||||
|
|
@ -92,17 +109,8 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
|
|||
: "=&r" (temp), "+m" (*m)
|
||||
: "ir" (1UL << bit));
|
||||
} while (unlikely(!temp));
|
||||
} else {
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
*a |= mask;
|
||||
raw_local_irq_restore(flags);
|
||||
}
|
||||
} else
|
||||
__mips_set_bit(nr, addr);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -118,7 +126,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
|
|||
static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
|
||||
{
|
||||
unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
|
||||
unsigned short bit = nr & SZLONG_MASK;
|
||||
int bit = nr & SZLONG_MASK;
|
||||
unsigned long temp;
|
||||
|
||||
if (kernel_uses_llsc && R10000_LLSC_WAR) {
|
||||
|
|
@ -153,17 +161,8 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
|
|||
: "=&r" (temp), "+m" (*m)
|
||||
: "ir" (~(1UL << bit)));
|
||||
} while (unlikely(!temp));
|
||||
} else {
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
*a &= ~mask;
|
||||
raw_local_irq_restore(flags);
|
||||
}
|
||||
} else
|
||||
__mips_clear_bit(nr, addr);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -191,7 +190,7 @@ static inline void clear_bit_unlock(unsigned long nr, volatile unsigned long *ad
|
|||
*/
|
||||
static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
|
||||
{
|
||||
unsigned short bit = nr & SZLONG_MASK;
|
||||
int bit = nr & SZLONG_MASK;
|
||||
|
||||
if (kernel_uses_llsc && R10000_LLSC_WAR) {
|
||||
unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
|
||||
|
|
@ -220,17 +219,8 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
|
|||
: "=&r" (temp), "+m" (*m)
|
||||
: "ir" (1UL << bit));
|
||||
} while (unlikely(!temp));
|
||||
} else {
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
*a ^= mask;
|
||||
raw_local_irq_restore(flags);
|
||||
}
|
||||
} else
|
||||
__mips_change_bit(nr, addr);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -244,7 +234,7 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
|
|||
static inline int test_and_set_bit(unsigned long nr,
|
||||
volatile unsigned long *addr)
|
||||
{
|
||||
unsigned short bit = nr & SZLONG_MASK;
|
||||
int bit = nr & SZLONG_MASK;
|
||||
unsigned long res;
|
||||
|
||||
smp_mb__before_llsc();
|
||||
|
|
@ -281,18 +271,8 @@ static inline int test_and_set_bit(unsigned long nr,
|
|||
} while (unlikely(!res));
|
||||
|
||||
res = temp & (1UL << bit);
|
||||
} else {
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
res = (mask & *a);
|
||||
*a |= mask;
|
||||
raw_local_irq_restore(flags);
|
||||
}
|
||||
} else
|
||||
res = __mips_test_and_set_bit(nr, addr);
|
||||
|
||||
smp_llsc_mb();
|
||||
|
||||
|
|
@ -310,7 +290,7 @@ static inline int test_and_set_bit(unsigned long nr,
|
|||
static inline int test_and_set_bit_lock(unsigned long nr,
|
||||
volatile unsigned long *addr)
|
||||
{
|
||||
unsigned short bit = nr & SZLONG_MASK;
|
||||
int bit = nr & SZLONG_MASK;
|
||||
unsigned long res;
|
||||
|
||||
if (kernel_uses_llsc && R10000_LLSC_WAR) {
|
||||
|
|
@ -345,18 +325,8 @@ static inline int test_and_set_bit_lock(unsigned long nr,
|
|||
} while (unlikely(!res));
|
||||
|
||||
res = temp & (1UL << bit);
|
||||
} else {
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
res = (mask & *a);
|
||||
*a |= mask;
|
||||
raw_local_irq_restore(flags);
|
||||
}
|
||||
} else
|
||||
res = __mips_test_and_set_bit_lock(nr, addr);
|
||||
|
||||
smp_llsc_mb();
|
||||
|
||||
|
|
@ -373,7 +343,7 @@ static inline int test_and_set_bit_lock(unsigned long nr,
|
|||
static inline int test_and_clear_bit(unsigned long nr,
|
||||
volatile unsigned long *addr)
|
||||
{
|
||||
unsigned short bit = nr & SZLONG_MASK;
|
||||
int bit = nr & SZLONG_MASK;
|
||||
unsigned long res;
|
||||
|
||||
smp_mb__before_llsc();
|
||||
|
|
@ -428,18 +398,8 @@ static inline int test_and_clear_bit(unsigned long nr,
|
|||
} while (unlikely(!res));
|
||||
|
||||
res = temp & (1UL << bit);
|
||||
} else {
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
res = (mask & *a);
|
||||
*a &= ~mask;
|
||||
raw_local_irq_restore(flags);
|
||||
}
|
||||
} else
|
||||
res = __mips_test_and_clear_bit(nr, addr);
|
||||
|
||||
smp_llsc_mb();
|
||||
|
||||
|
|
@ -457,7 +417,7 @@ static inline int test_and_clear_bit(unsigned long nr,
|
|||
static inline int test_and_change_bit(unsigned long nr,
|
||||
volatile unsigned long *addr)
|
||||
{
|
||||
unsigned short bit = nr & SZLONG_MASK;
|
||||
int bit = nr & SZLONG_MASK;
|
||||
unsigned long res;
|
||||
|
||||
smp_mb__before_llsc();
|
||||
|
|
@ -494,18 +454,8 @@ static inline int test_and_change_bit(unsigned long nr,
|
|||
} while (unlikely(!res));
|
||||
|
||||
res = temp & (1UL << bit);
|
||||
} else {
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
res = (mask & *a);
|
||||
*a ^= mask;
|
||||
raw_local_irq_restore(flags);
|
||||
}
|
||||
} else
|
||||
res = __mips_test_and_change_bit(nr, addr);
|
||||
|
||||
smp_llsc_mb();
|
||||
|
||||
|
|
|
|||
|
|
@ -290,7 +290,7 @@ struct compat_shmid64_ds {
|
|||
|
||||
static inline int is_compat_task(void)
|
||||
{
|
||||
return test_thread_flag(TIF_32BIT);
|
||||
return test_thread_flag(TIF_32BIT_ADDR);
|
||||
}
|
||||
|
||||
#endif /* _ASM_COMPAT_H */
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/compiler.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/irqflags.h>
|
||||
|
||||
#include <asm/addrspace.h>
|
||||
#include <asm/bug.h>
|
||||
|
|
|
|||
|
|
@ -16,6 +16,105 @@
|
|||
#include <linux/compiler.h>
|
||||
#include <asm/hazards.h>
|
||||
|
||||
#if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_MIPS_MT_SMTC)
|
||||
|
||||
__asm__(
|
||||
" .macro arch_local_irq_disable\n"
|
||||
" .set push \n"
|
||||
" .set noat \n"
|
||||
" di \n"
|
||||
" irq_disable_hazard \n"
|
||||
" .set pop \n"
|
||||
" .endm \n");
|
||||
|
||||
static inline void arch_local_irq_disable(void)
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
"arch_local_irq_disable"
|
||||
: /* no outputs */
|
||||
: /* no inputs */
|
||||
: "memory");
|
||||
}
|
||||
|
||||
|
||||
__asm__(
|
||||
" .macro arch_local_irq_save result \n"
|
||||
" .set push \n"
|
||||
" .set reorder \n"
|
||||
" .set noat \n"
|
||||
" di \\result \n"
|
||||
" andi \\result, 1 \n"
|
||||
" irq_disable_hazard \n"
|
||||
" .set pop \n"
|
||||
" .endm \n");
|
||||
|
||||
static inline unsigned long arch_local_irq_save(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
asm volatile("arch_local_irq_save\t%0"
|
||||
: "=r" (flags)
|
||||
: /* no inputs */
|
||||
: "memory");
|
||||
return flags;
|
||||
}
|
||||
|
||||
|
||||
__asm__(
|
||||
" .macro arch_local_irq_restore flags \n"
|
||||
" .set push \n"
|
||||
" .set noreorder \n"
|
||||
" .set noat \n"
|
||||
#if defined(CONFIG_IRQ_CPU)
|
||||
/*
|
||||
* Slow, but doesn't suffer from a relatively unlikely race
|
||||
* condition we're having since days 1.
|
||||
*/
|
||||
" beqz \\flags, 1f \n"
|
||||
" di \n"
|
||||
" ei \n"
|
||||
"1: \n"
|
||||
#else
|
||||
/*
|
||||
* Fast, dangerous. Life is fun, life is good.
|
||||
*/
|
||||
" mfc0 $1, $12 \n"
|
||||
" ins $1, \\flags, 0, 1 \n"
|
||||
" mtc0 $1, $12 \n"
|
||||
#endif
|
||||
" irq_disable_hazard \n"
|
||||
" .set pop \n"
|
||||
" .endm \n");
|
||||
|
||||
static inline void arch_local_irq_restore(unsigned long flags)
|
||||
{
|
||||
unsigned long __tmp1;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"arch_local_irq_restore\t%0"
|
||||
: "=r" (__tmp1)
|
||||
: "0" (flags)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
static inline void __arch_local_irq_restore(unsigned long flags)
|
||||
{
|
||||
unsigned long __tmp1;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"arch_local_irq_restore\t%0"
|
||||
: "=r" (__tmp1)
|
||||
: "0" (flags)
|
||||
: "memory");
|
||||
}
|
||||
#else
|
||||
/* Functions that require preempt_{dis,en}able() are in mips-atomic.c */
|
||||
void arch_local_irq_disable(void);
|
||||
unsigned long arch_local_irq_save(void);
|
||||
void arch_local_irq_restore(unsigned long flags);
|
||||
void __arch_local_irq_restore(unsigned long flags);
|
||||
#endif /* if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_MIPS_MT_SMTC) */
|
||||
|
||||
|
||||
__asm__(
|
||||
" .macro arch_local_irq_enable \n"
|
||||
" .set push \n"
|
||||
|
|
@ -57,55 +156,6 @@ static inline void arch_local_irq_enable(void)
|
|||
}
|
||||
|
||||
|
||||
/*
|
||||
* For cli() we have to insert nops to make sure that the new value
|
||||
* has actually arrived in the status register before the end of this
|
||||
* macro.
|
||||
* R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
|
||||
* no nops at all.
|
||||
*/
|
||||
/*
|
||||
* For TX49, operating only IE bit is not enough.
|
||||
*
|
||||
* If mfc0 $12 follows store and the mfc0 is last instruction of a
|
||||
* page and fetching the next instruction causes TLB miss, the result
|
||||
* of the mfc0 might wrongly contain EXL bit.
|
||||
*
|
||||
* ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
|
||||
*
|
||||
* Workaround: mask EXL bit of the result or place a nop before mfc0.
|
||||
*/
|
||||
__asm__(
|
||||
" .macro arch_local_irq_disable\n"
|
||||
" .set push \n"
|
||||
" .set noat \n"
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
" mfc0 $1, $2, 1 \n"
|
||||
" ori $1, 0x400 \n"
|
||||
" .set noreorder \n"
|
||||
" mtc0 $1, $2, 1 \n"
|
||||
#elif defined(CONFIG_CPU_MIPSR2)
|
||||
" di \n"
|
||||
#else
|
||||
" mfc0 $1,$12 \n"
|
||||
" ori $1,0x1f \n"
|
||||
" xori $1,0x1f \n"
|
||||
" .set noreorder \n"
|
||||
" mtc0 $1,$12 \n"
|
||||
#endif
|
||||
" irq_disable_hazard \n"
|
||||
" .set pop \n"
|
||||
" .endm \n");
|
||||
|
||||
static inline void arch_local_irq_disable(void)
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
"arch_local_irq_disable"
|
||||
: /* no outputs */
|
||||
: /* no inputs */
|
||||
: "memory");
|
||||
}
|
||||
|
||||
__asm__(
|
||||
" .macro arch_local_save_flags flags \n"
|
||||
" .set push \n"
|
||||
|
|
@ -125,113 +175,6 @@ static inline unsigned long arch_local_save_flags(void)
|
|||
return flags;
|
||||
}
|
||||
|
||||
__asm__(
|
||||
" .macro arch_local_irq_save result \n"
|
||||
" .set push \n"
|
||||
" .set reorder \n"
|
||||
" .set noat \n"
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
" mfc0 \\result, $2, 1 \n"
|
||||
" ori $1, \\result, 0x400 \n"
|
||||
" .set noreorder \n"
|
||||
" mtc0 $1, $2, 1 \n"
|
||||
" andi \\result, \\result, 0x400 \n"
|
||||
#elif defined(CONFIG_CPU_MIPSR2)
|
||||
" di \\result \n"
|
||||
" andi \\result, 1 \n"
|
||||
#else
|
||||
" mfc0 \\result, $12 \n"
|
||||
" ori $1, \\result, 0x1f \n"
|
||||
" xori $1, 0x1f \n"
|
||||
" .set noreorder \n"
|
||||
" mtc0 $1, $12 \n"
|
||||
#endif
|
||||
" irq_disable_hazard \n"
|
||||
" .set pop \n"
|
||||
" .endm \n");
|
||||
|
||||
static inline unsigned long arch_local_irq_save(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
asm volatile("arch_local_irq_save\t%0"
|
||||
: "=r" (flags)
|
||||
: /* no inputs */
|
||||
: "memory");
|
||||
return flags;
|
||||
}
|
||||
|
||||
__asm__(
|
||||
" .macro arch_local_irq_restore flags \n"
|
||||
" .set push \n"
|
||||
" .set noreorder \n"
|
||||
" .set noat \n"
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
"mfc0 $1, $2, 1 \n"
|
||||
"andi \\flags, 0x400 \n"
|
||||
"ori $1, 0x400 \n"
|
||||
"xori $1, 0x400 \n"
|
||||
"or \\flags, $1 \n"
|
||||
"mtc0 \\flags, $2, 1 \n"
|
||||
#elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
|
||||
/*
|
||||
* Slow, but doesn't suffer from a relatively unlikely race
|
||||
* condition we're having since days 1.
|
||||
*/
|
||||
" beqz \\flags, 1f \n"
|
||||
" di \n"
|
||||
" ei \n"
|
||||
"1: \n"
|
||||
#elif defined(CONFIG_CPU_MIPSR2)
|
||||
/*
|
||||
* Fast, dangerous. Life is fun, life is good.
|
||||
*/
|
||||
" mfc0 $1, $12 \n"
|
||||
" ins $1, \\flags, 0, 1 \n"
|
||||
" mtc0 $1, $12 \n"
|
||||
#else
|
||||
" mfc0 $1, $12 \n"
|
||||
" andi \\flags, 1 \n"
|
||||
" ori $1, 0x1f \n"
|
||||
" xori $1, 0x1f \n"
|
||||
" or \\flags, $1 \n"
|
||||
" mtc0 \\flags, $12 \n"
|
||||
#endif
|
||||
" irq_disable_hazard \n"
|
||||
" .set pop \n"
|
||||
" .endm \n");
|
||||
|
||||
|
||||
static inline void arch_local_irq_restore(unsigned long flags)
|
||||
{
|
||||
unsigned long __tmp1;
|
||||
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
/*
|
||||
* SMTC kernel needs to do a software replay of queued
|
||||
* IPIs, at the cost of branch and call overhead on each
|
||||
* local_irq_restore()
|
||||
*/
|
||||
if (unlikely(!(flags & 0x0400)))
|
||||
smtc_ipi_replay();
|
||||
#endif
|
||||
|
||||
__asm__ __volatile__(
|
||||
"arch_local_irq_restore\t%0"
|
||||
: "=r" (__tmp1)
|
||||
: "0" (flags)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
static inline void __arch_local_irq_restore(unsigned long flags)
|
||||
{
|
||||
unsigned long __tmp1;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"arch_local_irq_restore\t%0"
|
||||
: "=r" (__tmp1)
|
||||
: "0" (flags)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
static inline int arch_irqs_disabled_flags(unsigned long flags)
|
||||
{
|
||||
|
|
@ -245,7 +188,7 @@ static inline int arch_irqs_disabled_flags(unsigned long flags)
|
|||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
#endif /* #ifndef __ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
* Do the CPU's IRQ-state tracing from assembly code.
|
||||
|
|
|
|||
|
|
@ -112,12 +112,6 @@ register struct thread_info *__current_thread_info __asm__("$28");
|
|||
#define TIF_LOAD_WATCH 25 /* If set, load watch registers */
|
||||
#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
|
||||
|
||||
#ifdef CONFIG_MIPS32_O32
|
||||
#define TIF_32BIT TIF_32BIT_REGS
|
||||
#elif defined(CONFIG_MIPS32_N32)
|
||||
#define TIF_32BIT _TIF_32BIT_ADDR
|
||||
#endif /* CONFIG_MIPS32_O32 */
|
||||
|
||||
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
|
||||
#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
|
||||
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
|
||||
|
|
|
|||
|
|
@ -79,7 +79,7 @@ static struct resource data_resource = { .name = "Kernel data", };
|
|||
void __init add_memory_region(phys_t start, phys_t size, long type)
|
||||
{
|
||||
int x = boot_mem_map.nr_map;
|
||||
struct boot_mem_map_entry *prev = boot_mem_map.map + x - 1;
|
||||
int i;
|
||||
|
||||
/* Sanity check */
|
||||
if (start + size < start) {
|
||||
|
|
@ -88,15 +88,29 @@ void __init add_memory_region(phys_t start, phys_t size, long type)
|
|||
}
|
||||
|
||||
/*
|
||||
* Try to merge with previous entry if any. This is far less than
|
||||
* perfect but is sufficient for most real world cases.
|
||||
* Try to merge with existing entry, if any.
|
||||
*/
|
||||
if (x && prev->addr + prev->size == start && prev->type == type) {
|
||||
prev->size += size;
|
||||
for (i = 0; i < boot_mem_map.nr_map; i++) {
|
||||
struct boot_mem_map_entry *entry = boot_mem_map.map + i;
|
||||
unsigned long top;
|
||||
|
||||
if (entry->type != type)
|
||||
continue;
|
||||
|
||||
if (start + size < entry->addr)
|
||||
continue; /* no overlap */
|
||||
|
||||
if (entry->addr + entry->size < start)
|
||||
continue; /* no overlap */
|
||||
|
||||
top = max(entry->addr + entry->size, start + size);
|
||||
entry->addr = min(entry->addr, start);
|
||||
entry->size = top - entry->addr;
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
if (x == BOOT_MEM_MAP_MAX) {
|
||||
if (boot_mem_map.nr_map == BOOT_MEM_MAP_MAX) {
|
||||
pr_err("Ooops! Too many entries in the memory map!\n");
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,8 +2,9 @@
|
|||
# Makefile for MIPS-specific library files..
|
||||
#
|
||||
|
||||
lib-y += csum_partial.o delay.o memcpy.o memset.o \
|
||||
strlen_user.o strncpy_user.o strnlen_user.o uncached.o
|
||||
lib-y += bitops.o csum_partial.o delay.o memcpy.o memset.o \
|
||||
mips-atomic.o strlen_user.o strncpy_user.o \
|
||||
strnlen_user.o uncached.o
|
||||
|
||||
obj-y += iomap.o
|
||||
obj-$(CONFIG_PCI) += iomap-pci.o
|
||||
|
|
|
|||
|
|
@ -0,0 +1,179 @@
|
|||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (c) 1994-1997, 99, 2000, 06, 07 Ralf Baechle (ralf@linux-mips.org)
|
||||
* Copyright (c) 1999, 2000 Silicon Graphics, Inc.
|
||||
*/
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/irqflags.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
|
||||
/**
|
||||
* __mips_set_bit - Atomically set a bit in memory. This is called by
|
||||
* set_bit() if it cannot find a faster solution.
|
||||
* @nr: the bit to set
|
||||
* @addr: the address to start counting from
|
||||
*/
|
||||
void __mips_set_bit(unsigned long nr, volatile unsigned long *addr)
|
||||
{
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned bit = nr & SZLONG_MASK;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
*a |= mask;
|
||||
raw_local_irq_restore(flags);
|
||||
}
|
||||
EXPORT_SYMBOL(__mips_set_bit);
|
||||
|
||||
|
||||
/**
|
||||
* __mips_clear_bit - Clears a bit in memory. This is called by clear_bit() if
|
||||
* it cannot find a faster solution.
|
||||
* @nr: Bit to clear
|
||||
* @addr: Address to start counting from
|
||||
*/
|
||||
void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr)
|
||||
{
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned bit = nr & SZLONG_MASK;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
*a &= ~mask;
|
||||
raw_local_irq_restore(flags);
|
||||
}
|
||||
EXPORT_SYMBOL(__mips_clear_bit);
|
||||
|
||||
|
||||
/**
|
||||
* __mips_change_bit - Toggle a bit in memory. This is called by change_bit()
|
||||
* if it cannot find a faster solution.
|
||||
* @nr: Bit to change
|
||||
* @addr: Address to start counting from
|
||||
*/
|
||||
void __mips_change_bit(unsigned long nr, volatile unsigned long *addr)
|
||||
{
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned bit = nr & SZLONG_MASK;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
*a ^= mask;
|
||||
raw_local_irq_restore(flags);
|
||||
}
|
||||
EXPORT_SYMBOL(__mips_change_bit);
|
||||
|
||||
|
||||
/**
|
||||
* __mips_test_and_set_bit - Set a bit and return its old value. This is
|
||||
* called by test_and_set_bit() if it cannot find a faster solution.
|
||||
* @nr: Bit to set
|
||||
* @addr: Address to count from
|
||||
*/
|
||||
int __mips_test_and_set_bit(unsigned long nr,
|
||||
volatile unsigned long *addr)
|
||||
{
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned bit = nr & SZLONG_MASK;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
unsigned long res;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
res = (mask & *a);
|
||||
*a |= mask;
|
||||
raw_local_irq_restore(flags);
|
||||
return res;
|
||||
}
|
||||
EXPORT_SYMBOL(__mips_test_and_set_bit);
|
||||
|
||||
|
||||
/**
|
||||
* __mips_test_and_set_bit_lock - Set a bit and return its old value. This is
|
||||
* called by test_and_set_bit_lock() if it cannot find a faster solution.
|
||||
* @nr: Bit to set
|
||||
* @addr: Address to count from
|
||||
*/
|
||||
int __mips_test_and_set_bit_lock(unsigned long nr,
|
||||
volatile unsigned long *addr)
|
||||
{
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned bit = nr & SZLONG_MASK;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
unsigned long res;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
res = (mask & *a);
|
||||
*a |= mask;
|
||||
raw_local_irq_restore(flags);
|
||||
return res;
|
||||
}
|
||||
EXPORT_SYMBOL(__mips_test_and_set_bit_lock);
|
||||
|
||||
|
||||
/**
|
||||
* __mips_test_and_clear_bit - Clear a bit and return its old value. This is
|
||||
* called by test_and_clear_bit() if it cannot find a faster solution.
|
||||
* @nr: Bit to clear
|
||||
* @addr: Address to count from
|
||||
*/
|
||||
int __mips_test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
|
||||
{
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned bit = nr & SZLONG_MASK;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
unsigned long res;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
res = (mask & *a);
|
||||
*a &= ~mask;
|
||||
raw_local_irq_restore(flags);
|
||||
return res;
|
||||
}
|
||||
EXPORT_SYMBOL(__mips_test_and_clear_bit);
|
||||
|
||||
|
||||
/**
|
||||
* __mips_test_and_change_bit - Change a bit and return its old value. This is
|
||||
* called by test_and_change_bit() if it cannot find a faster solution.
|
||||
* @nr: Bit to change
|
||||
* @addr: Address to count from
|
||||
*/
|
||||
int __mips_test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
|
||||
{
|
||||
volatile unsigned long *a = addr;
|
||||
unsigned bit = nr & SZLONG_MASK;
|
||||
unsigned long mask;
|
||||
unsigned long flags;
|
||||
unsigned long res;
|
||||
|
||||
a += nr >> SZLONG_LOG;
|
||||
mask = 1UL << bit;
|
||||
raw_local_irq_save(flags);
|
||||
res = (mask & *a);
|
||||
*a ^= mask;
|
||||
raw_local_irq_restore(flags);
|
||||
return res;
|
||||
}
|
||||
EXPORT_SYMBOL(__mips_test_and_change_bit);
|
||||
|
|
@ -0,0 +1,176 @@
|
|||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle
|
||||
* Copyright (C) 1996 by Paul M. Antoine
|
||||
* Copyright (C) 1999 Silicon Graphics
|
||||
* Copyright (C) 2000 MIPS Technologies, Inc.
|
||||
*/
|
||||
#include <asm/irqflags.h>
|
||||
#include <asm/hazards.h>
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/preempt.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
#if !defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT_SMTC)
|
||||
|
||||
/*
|
||||
* For cli() we have to insert nops to make sure that the new value
|
||||
* has actually arrived in the status register before the end of this
|
||||
* macro.
|
||||
* R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
|
||||
* no nops at all.
|
||||
*/
|
||||
/*
|
||||
* For TX49, operating only IE bit is not enough.
|
||||
*
|
||||
* If mfc0 $12 follows store and the mfc0 is last instruction of a
|
||||
* page and fetching the next instruction causes TLB miss, the result
|
||||
* of the mfc0 might wrongly contain EXL bit.
|
||||
*
|
||||
* ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
|
||||
*
|
||||
* Workaround: mask EXL bit of the result or place a nop before mfc0.
|
||||
*/
|
||||
__asm__(
|
||||
" .macro arch_local_irq_disable\n"
|
||||
" .set push \n"
|
||||
" .set noat \n"
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
" mfc0 $1, $2, 1 \n"
|
||||
" ori $1, 0x400 \n"
|
||||
" .set noreorder \n"
|
||||
" mtc0 $1, $2, 1 \n"
|
||||
#elif defined(CONFIG_CPU_MIPSR2)
|
||||
/* see irqflags.h for inline function */
|
||||
#else
|
||||
" mfc0 $1,$12 \n"
|
||||
" ori $1,0x1f \n"
|
||||
" xori $1,0x1f \n"
|
||||
" .set noreorder \n"
|
||||
" mtc0 $1,$12 \n"
|
||||
#endif
|
||||
" irq_disable_hazard \n"
|
||||
" .set pop \n"
|
||||
" .endm \n");
|
||||
|
||||
notrace void arch_local_irq_disable(void)
|
||||
{
|
||||
preempt_disable();
|
||||
__asm__ __volatile__(
|
||||
"arch_local_irq_disable"
|
||||
: /* no outputs */
|
||||
: /* no inputs */
|
||||
: "memory");
|
||||
preempt_enable();
|
||||
}
|
||||
EXPORT_SYMBOL(arch_local_irq_disable);
|
||||
|
||||
|
||||
__asm__(
|
||||
" .macro arch_local_irq_save result \n"
|
||||
" .set push \n"
|
||||
" .set reorder \n"
|
||||
" .set noat \n"
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
" mfc0 \\result, $2, 1 \n"
|
||||
" ori $1, \\result, 0x400 \n"
|
||||
" .set noreorder \n"
|
||||
" mtc0 $1, $2, 1 \n"
|
||||
" andi \\result, \\result, 0x400 \n"
|
||||
#elif defined(CONFIG_CPU_MIPSR2)
|
||||
/* see irqflags.h for inline function */
|
||||
#else
|
||||
" mfc0 \\result, $12 \n"
|
||||
" ori $1, \\result, 0x1f \n"
|
||||
" xori $1, 0x1f \n"
|
||||
" .set noreorder \n"
|
||||
" mtc0 $1, $12 \n"
|
||||
#endif
|
||||
" irq_disable_hazard \n"
|
||||
" .set pop \n"
|
||||
" .endm \n");
|
||||
|
||||
notrace unsigned long arch_local_irq_save(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
preempt_disable();
|
||||
asm volatile("arch_local_irq_save\t%0"
|
||||
: "=r" (flags)
|
||||
: /* no inputs */
|
||||
: "memory");
|
||||
preempt_enable();
|
||||
return flags;
|
||||
}
|
||||
EXPORT_SYMBOL(arch_local_irq_save);
|
||||
|
||||
|
||||
__asm__(
|
||||
" .macro arch_local_irq_restore flags \n"
|
||||
" .set push \n"
|
||||
" .set noreorder \n"
|
||||
" .set noat \n"
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
"mfc0 $1, $2, 1 \n"
|
||||
"andi \\flags, 0x400 \n"
|
||||
"ori $1, 0x400 \n"
|
||||
"xori $1, 0x400 \n"
|
||||
"or \\flags, $1 \n"
|
||||
"mtc0 \\flags, $2, 1 \n"
|
||||
#elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
|
||||
/* see irqflags.h for inline function */
|
||||
#elif defined(CONFIG_CPU_MIPSR2)
|
||||
/* see irqflags.h for inline function */
|
||||
#else
|
||||
" mfc0 $1, $12 \n"
|
||||
" andi \\flags, 1 \n"
|
||||
" ori $1, 0x1f \n"
|
||||
" xori $1, 0x1f \n"
|
||||
" or \\flags, $1 \n"
|
||||
" mtc0 \\flags, $12 \n"
|
||||
#endif
|
||||
" irq_disable_hazard \n"
|
||||
" .set pop \n"
|
||||
" .endm \n");
|
||||
|
||||
notrace void arch_local_irq_restore(unsigned long flags)
|
||||
{
|
||||
unsigned long __tmp1;
|
||||
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
/*
|
||||
* SMTC kernel needs to do a software replay of queued
|
||||
* IPIs, at the cost of branch and call overhead on each
|
||||
* local_irq_restore()
|
||||
*/
|
||||
if (unlikely(!(flags & 0x0400)))
|
||||
smtc_ipi_replay();
|
||||
#endif
|
||||
preempt_disable();
|
||||
__asm__ __volatile__(
|
||||
"arch_local_irq_restore\t%0"
|
||||
: "=r" (__tmp1)
|
||||
: "0" (flags)
|
||||
: "memory");
|
||||
preempt_enable();
|
||||
}
|
||||
EXPORT_SYMBOL(arch_local_irq_restore);
|
||||
|
||||
|
||||
notrace void __arch_local_irq_restore(unsigned long flags)
|
||||
{
|
||||
unsigned long __tmp1;
|
||||
|
||||
preempt_disable();
|
||||
__asm__ __volatile__(
|
||||
"arch_local_irq_restore\t%0"
|
||||
: "=r" (__tmp1)
|
||||
: "0" (flags)
|
||||
: "memory");
|
||||
preempt_enable();
|
||||
}
|
||||
EXPORT_SYMBOL(__arch_local_irq_restore);
|
||||
|
||||
#endif /* !defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT_SMTC) */
|
||||
|
|
@ -29,6 +29,7 @@
|
|||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/mips-boards/maltaint.h>
|
||||
#include <mtd/mtd-abi.h>
|
||||
|
||||
#define SMC_PORT(base, int) \
|
||||
|
|
@ -48,7 +49,7 @@ static struct plat_serial8250_port uart8250_data[] = {
|
|||
SMC_PORT(0x2F8, 3),
|
||||
{
|
||||
.mapbase = 0x1f000900, /* The CBUS UART */
|
||||
.irq = MIPS_CPU_IRQ_BASE + 2,
|
||||
.irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
|
||||
.uartclk = 3686400, /* Twice the usual clk! */
|
||||
.iotype = UPIO_MEM32,
|
||||
.flags = CBUS_UART_FLAGS,
|
||||
|
|
|
|||
|
|
@ -65,7 +65,8 @@ put_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz)
|
|||
{
|
||||
compat_sigset_t s;
|
||||
|
||||
if (sz != sizeof *set) panic("put_sigset32()");
|
||||
if (sz != sizeof *set)
|
||||
return -EINVAL;
|
||||
sigset_64to32(&s, set);
|
||||
|
||||
return copy_to_user(up, &s, sizeof s);
|
||||
|
|
@ -77,7 +78,8 @@ get_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz)
|
|||
compat_sigset_t s;
|
||||
int r;
|
||||
|
||||
if (sz != sizeof *set) panic("put_sigset32()");
|
||||
if (sz != sizeof *set)
|
||||
return -EINVAL;
|
||||
|
||||
if ((r = copy_from_user(&s, up, sz)) == 0) {
|
||||
sigset_32to64(set, &s);
|
||||
|
|
|
|||
|
|
@ -73,6 +73,8 @@ static unsigned long get_shared_area(struct address_space *mapping,
|
|||
struct vm_area_struct *vma;
|
||||
int offset = mapping ? get_offset(mapping) : 0;
|
||||
|
||||
offset = (offset + (pgoff << PAGE_SHIFT)) & 0x3FF000;
|
||||
|
||||
addr = DCACHE_ALIGN(addr - offset) + offset;
|
||||
|
||||
for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) {
|
||||
|
|
|
|||
|
|
@ -231,6 +231,12 @@ ata@3a00 {
|
|||
interrupts = <2 7 0>;
|
||||
};
|
||||
|
||||
sclpc@3c00 {
|
||||
compatible = "fsl,mpc5200-lpbfifo";
|
||||
reg = <0x3c00 0x60>;
|
||||
interrupts = <2 23 0>;
|
||||
};
|
||||
|
||||
i2c@3d00 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -86,12 +86,6 @@ phy0: ethernet-phy@0 {
|
|||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
sclpc@3c00 {
|
||||
compatible = "fsl,mpc5200-lpbfifo";
|
||||
reg = <0x3c00 0x60>;
|
||||
interrupts = <3 23 0>;
|
||||
};
|
||||
};
|
||||
|
||||
localbus {
|
||||
|
|
|
|||
|
|
@ -59,7 +59,7 @@ gpt7: timer@670 { // General Purpose Timer in GPIO mode
|
|||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
psc@2000 { /* PSC1 in ac97 mode */
|
||||
audioplatform: psc@2000 { /* PSC1 in ac97 mode */
|
||||
compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
|
||||
cell-index = <0>;
|
||||
};
|
||||
|
|
@ -134,4 +134,9 @@ pci@f0000d00 {
|
|||
localbus {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "phytec,pcm030-audio-fabric";
|
||||
asoc-platform = <&audioplatform>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -372,10 +372,11 @@ static int mpc52xx_irqhost_map(struct irq_domain *h, unsigned int virq,
|
|||
case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break;
|
||||
case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break;
|
||||
case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break;
|
||||
default:
|
||||
pr_err("%s: invalid irq: virq=%i, l1=%i, l2=%i\n",
|
||||
__func__, virq, l1irq, l2irq);
|
||||
return -EINVAL;
|
||||
case MPC52xx_IRQ_L1_CRIT:
|
||||
pr_warn("%s: Critical IRQ #%d is unsupported! Nopping it.\n",
|
||||
__func__, l2irq);
|
||||
irq_set_chip(virq, &no_irq_chip);
|
||||
return 0;
|
||||
}
|
||||
|
||||
irq_set_chip_and_handler(virq, irqchip, handle_level_irq);
|
||||
|
|
|
|||
|
|
@ -449,7 +449,7 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe)
|
|||
if (list_empty(&pe->edevs)) {
|
||||
cnt = 0;
|
||||
list_for_each_entry(child, &pe->child_list, child) {
|
||||
if (!(pe->type & EEH_PE_INVALID)) {
|
||||
if (!(child->type & EEH_PE_INVALID)) {
|
||||
cnt++;
|
||||
break;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -220,7 +220,8 @@ static struct device_node *find_pe_dn(struct pci_dev *dev, int *total)
|
|||
|
||||
/* Get the top level device in the PE */
|
||||
edev = of_node_to_eeh_dev(dn);
|
||||
edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, list);
|
||||
if (edev->pe)
|
||||
edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, list);
|
||||
dn = eeh_dev_to_of_node(edev);
|
||||
if (!dn)
|
||||
return NULL;
|
||||
|
|
|
|||
|
|
@ -96,6 +96,7 @@ config S390
|
|||
select HAVE_MEMBLOCK_NODE_MAP
|
||||
select HAVE_CMPXCHG_LOCAL
|
||||
select HAVE_CMPXCHG_DOUBLE
|
||||
select HAVE_ALIGNED_STRUCT_PAGE if SLUB
|
||||
select HAVE_VIRT_CPU_ACCOUNTING
|
||||
select VIRT_CPU_ACCOUNTING
|
||||
select ARCH_DISCARD_MEMBLOCK
|
||||
|
|
|
|||
|
|
@ -9,6 +9,8 @@
|
|||
|
||||
#define LPM_ANYPATH 0xff
|
||||
#define __MAX_CSSID 0
|
||||
#define __MAX_SUBCHANNEL 65535
|
||||
#define __MAX_SSID 3
|
||||
|
||||
#include <asm/scsw.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
#define PSW32_MASK_CC 0x00003000UL
|
||||
#define PSW32_MASK_PM 0x00000f00UL
|
||||
|
||||
#define PSW32_MASK_USER 0x00003F00UL
|
||||
#define PSW32_MASK_USER 0x0000FF00UL
|
||||
|
||||
#define PSW32_ADDR_AMODE 0x80000000UL
|
||||
#define PSW32_ADDR_INSN 0x7FFFFFFFUL
|
||||
|
|
|
|||
|
|
@ -506,12 +506,15 @@ static inline int pud_bad(pud_t pud)
|
|||
|
||||
static inline int pmd_present(pmd_t pmd)
|
||||
{
|
||||
return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL;
|
||||
unsigned long mask = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY_RO;
|
||||
return (pmd_val(pmd) & mask) == _HPAGE_TYPE_NONE ||
|
||||
!(pmd_val(pmd) & _SEGMENT_ENTRY_INV);
|
||||
}
|
||||
|
||||
static inline int pmd_none(pmd_t pmd)
|
||||
{
|
||||
return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL;
|
||||
return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) &&
|
||||
!(pmd_val(pmd) & _SEGMENT_ENTRY_RO);
|
||||
}
|
||||
|
||||
static inline int pmd_large(pmd_t pmd)
|
||||
|
|
@ -1223,6 +1226,11 @@ static inline void __pmd_idte(unsigned long address, pmd_t *pmdp)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
|
||||
|
||||
#define SEGMENT_NONE __pgprot(_HPAGE_TYPE_NONE)
|
||||
#define SEGMENT_RO __pgprot(_HPAGE_TYPE_RO)
|
||||
#define SEGMENT_RW __pgprot(_HPAGE_TYPE_RW)
|
||||
|
||||
#define __HAVE_ARCH_PGTABLE_DEPOSIT
|
||||
extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
|
||||
|
||||
|
|
@ -1242,16 +1250,15 @@ static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
|
|||
|
||||
static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
|
||||
{
|
||||
unsigned long pgprot_pmd = 0;
|
||||
|
||||
if (pgprot_val(pgprot) & _PAGE_INVALID) {
|
||||
if (pgprot_val(pgprot) & _PAGE_SWT)
|
||||
pgprot_pmd |= _HPAGE_TYPE_NONE;
|
||||
pgprot_pmd |= _SEGMENT_ENTRY_INV;
|
||||
}
|
||||
if (pgprot_val(pgprot) & _PAGE_RO)
|
||||
pgprot_pmd |= _SEGMENT_ENTRY_RO;
|
||||
return pgprot_pmd;
|
||||
/*
|
||||
* pgprot is PAGE_NONE, PAGE_RO, or PAGE_RW (see __Pxxx / __Sxxx)
|
||||
* Convert to segment table entry format.
|
||||
*/
|
||||
if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
|
||||
return pgprot_val(SEGMENT_NONE);
|
||||
if (pgprot_val(pgprot) == pgprot_val(PAGE_RO))
|
||||
return pgprot_val(SEGMENT_RO);
|
||||
return pgprot_val(SEGMENT_RW);
|
||||
}
|
||||
|
||||
static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
|
||||
|
|
@ -1269,7 +1276,9 @@ static inline pmd_t pmd_mkhuge(pmd_t pmd)
|
|||
|
||||
static inline pmd_t pmd_mkwrite(pmd_t pmd)
|
||||
{
|
||||
pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;
|
||||
/* Do not clobber _HPAGE_TYPE_NONE pages! */
|
||||
if (!(pmd_val(pmd) & _SEGMENT_ENTRY_INV))
|
||||
pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;
|
||||
return pmd;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -8,6 +8,9 @@ struct cpu;
|
|||
|
||||
#ifdef CONFIG_SCHED_BOOK
|
||||
|
||||
extern unsigned char cpu_socket_id[NR_CPUS];
|
||||
#define topology_physical_package_id(cpu) (cpu_socket_id[cpu])
|
||||
|
||||
extern unsigned char cpu_core_id[NR_CPUS];
|
||||
extern cpumask_t cpu_core_map[NR_CPUS];
|
||||
|
||||
|
|
|
|||
|
|
@ -239,7 +239,7 @@ typedef struct
|
|||
#define PSW_MASK_EA 0x00000000UL
|
||||
#define PSW_MASK_BA 0x00000000UL
|
||||
|
||||
#define PSW_MASK_USER 0x00003F00UL
|
||||
#define PSW_MASK_USER 0x0000FF00UL
|
||||
|
||||
#define PSW_ADDR_AMODE 0x80000000UL
|
||||
#define PSW_ADDR_INSN 0x7FFFFFFFUL
|
||||
|
|
@ -269,7 +269,7 @@ typedef struct
|
|||
#define PSW_MASK_EA 0x0000000100000000UL
|
||||
#define PSW_MASK_BA 0x0000000080000000UL
|
||||
|
||||
#define PSW_MASK_USER 0x00003F8180000000UL
|
||||
#define PSW_MASK_USER 0x0000FF8180000000UL
|
||||
|
||||
#define PSW_ADDR_AMODE 0x0000000000000000UL
|
||||
#define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL
|
||||
|
|
|
|||
|
|
@ -309,6 +309,10 @@ static int restore_sigregs32(struct pt_regs *regs,_sigregs32 __user *sregs)
|
|||
regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
|
||||
(__u64)(regs32.psw.mask & PSW32_MASK_USER) << 32 |
|
||||
(__u64)(regs32.psw.addr & PSW32_ADDR_AMODE);
|
||||
/* Check for invalid user address space control. */
|
||||
if ((regs->psw.mask & PSW_MASK_ASC) >= (psw_kernel_bits & PSW_MASK_ASC))
|
||||
regs->psw.mask = (psw_user_bits & PSW_MASK_ASC) |
|
||||
(regs->psw.mask & ~PSW_MASK_ASC);
|
||||
regs->psw.addr = (__u64)(regs32.psw.addr & PSW32_ADDR_INSN);
|
||||
for (i = 0; i < NUM_GPRS; i++)
|
||||
regs->gprs[i] = (__u64) regs32.gprs[i];
|
||||
|
|
@ -481,7 +485,10 @@ static int setup_frame32(int sig, struct k_sigaction *ka,
|
|||
|
||||
/* Set up registers for signal handler */
|
||||
regs->gprs[15] = (__force __u64) frame;
|
||||
regs->psw.mask |= PSW_MASK_BA; /* force amode 31 */
|
||||
/* Force 31 bit amode and default user address space control. */
|
||||
regs->psw.mask = PSW_MASK_BA |
|
||||
(psw_user_bits & PSW_MASK_ASC) |
|
||||
(regs->psw.mask & ~PSW_MASK_ASC);
|
||||
regs->psw.addr = (__force __u64) ka->sa.sa_handler;
|
||||
|
||||
regs->gprs[2] = map_signal(sig);
|
||||
|
|
@ -549,7 +556,10 @@ static int setup_rt_frame32(int sig, struct k_sigaction *ka, siginfo_t *info,
|
|||
|
||||
/* Set up registers for signal handler */
|
||||
regs->gprs[15] = (__force __u64) frame;
|
||||
regs->psw.mask |= PSW_MASK_BA; /* force amode 31 */
|
||||
/* Force 31 bit amode and default user address space control. */
|
||||
regs->psw.mask = PSW_MASK_BA |
|
||||
(psw_user_bits & PSW_MASK_ASC) |
|
||||
(regs->psw.mask & ~PSW_MASK_ASC);
|
||||
regs->psw.addr = (__u64) ka->sa.sa_handler;
|
||||
|
||||
regs->gprs[2] = map_signal(sig);
|
||||
|
|
|
|||
|
|
@ -44,6 +44,12 @@ _sclp_wait_int:
|
|||
#endif
|
||||
mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8)
|
||||
mvc 0(16,%r8),0(%r9)
|
||||
#ifdef CONFIG_64BIT
|
||||
epsw %r6,%r7 # set current addressing mode
|
||||
nill %r6,0x1 # in new psw (31 or 64 bit mode)
|
||||
nilh %r7,0x8000
|
||||
stm %r6,%r7,0(%r8)
|
||||
#endif
|
||||
lhi %r6,0x0200 # cr mask for ext int (cr0.54)
|
||||
ltr %r2,%r2
|
||||
jz .LsetctS1
|
||||
|
|
@ -87,7 +93,7 @@ _sclp_wait_int:
|
|||
.long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int
|
||||
#ifdef CONFIG_64BIT
|
||||
.LextpswS1_64:
|
||||
.quad 0x0000000180000000, .LwaitS1 # PSW to handle ext int, 64 bit
|
||||
.quad 0, .LwaitS1 # PSW to handle ext int, 64 bit
|
||||
#endif
|
||||
.LwaitpswS1:
|
||||
.long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int
|
||||
|
|
|
|||
|
|
@ -136,6 +136,10 @@ static int restore_sigregs(struct pt_regs *regs, _sigregs __user *sregs)
|
|||
/* Use regs->psw.mask instead of psw_user_bits to preserve PER bit. */
|
||||
regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
|
||||
(user_sregs.regs.psw.mask & PSW_MASK_USER);
|
||||
/* Check for invalid user address space control. */
|
||||
if ((regs->psw.mask & PSW_MASK_ASC) >= (psw_kernel_bits & PSW_MASK_ASC))
|
||||
regs->psw.mask = (psw_user_bits & PSW_MASK_ASC) |
|
||||
(regs->psw.mask & ~PSW_MASK_ASC);
|
||||
/* Check for invalid amode */
|
||||
if (regs->psw.mask & PSW_MASK_EA)
|
||||
regs->psw.mask |= PSW_MASK_BA;
|
||||
|
|
@ -273,7 +277,10 @@ static int setup_frame(int sig, struct k_sigaction *ka,
|
|||
|
||||
/* Set up registers for signal handler */
|
||||
regs->gprs[15] = (unsigned long) frame;
|
||||
regs->psw.mask |= PSW_MASK_EA | PSW_MASK_BA; /* 64 bit amode */
|
||||
/* Force default amode and default user address space control. */
|
||||
regs->psw.mask = PSW_MASK_EA | PSW_MASK_BA |
|
||||
(psw_user_bits & PSW_MASK_ASC) |
|
||||
(regs->psw.mask & ~PSW_MASK_ASC);
|
||||
regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE;
|
||||
|
||||
regs->gprs[2] = map_signal(sig);
|
||||
|
|
@ -346,7 +353,10 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
|
|||
|
||||
/* Set up registers for signal handler */
|
||||
regs->gprs[15] = (unsigned long) frame;
|
||||
regs->psw.mask |= PSW_MASK_EA | PSW_MASK_BA; /* 64 bit amode */
|
||||
/* Force default amode and default user address space control. */
|
||||
regs->psw.mask = PSW_MASK_EA | PSW_MASK_BA |
|
||||
(psw_user_bits & PSW_MASK_ASC) |
|
||||
(regs->psw.mask & ~PSW_MASK_ASC);
|
||||
regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE;
|
||||
|
||||
regs->gprs[2] = map_signal(sig);
|
||||
|
|
|
|||
|
|
@ -40,6 +40,7 @@ static DEFINE_SPINLOCK(topology_lock);
|
|||
static struct mask_info core_info;
|
||||
cpumask_t cpu_core_map[NR_CPUS];
|
||||
unsigned char cpu_core_id[NR_CPUS];
|
||||
unsigned char cpu_socket_id[NR_CPUS];
|
||||
|
||||
static struct mask_info book_info;
|
||||
cpumask_t cpu_book_map[NR_CPUS];
|
||||
|
|
@ -83,11 +84,12 @@ static struct mask_info *add_cpus_to_mask(struct topology_cpu *tl_cpu,
|
|||
cpumask_set_cpu(lcpu, &book->mask);
|
||||
cpu_book_id[lcpu] = book->id;
|
||||
cpumask_set_cpu(lcpu, &core->mask);
|
||||
cpu_core_id[lcpu] = rcpu;
|
||||
if (one_core_per_cpu) {
|
||||
cpu_core_id[lcpu] = rcpu;
|
||||
cpu_socket_id[lcpu] = rcpu;
|
||||
core = core->next;
|
||||
} else {
|
||||
cpu_core_id[lcpu] = core->id;
|
||||
cpu_socket_id[lcpu] = core->id;
|
||||
}
|
||||
smp_cpu_set_polarization(lcpu, tl_cpu->pp);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -39,7 +39,7 @@ static __always_inline unsigned long follow_table(struct mm_struct *mm,
|
|||
pmd = pmd_offset(pud, addr);
|
||||
if (pmd_none(*pmd))
|
||||
return -0x10UL;
|
||||
if (pmd_huge(*pmd)) {
|
||||
if (pmd_large(*pmd)) {
|
||||
if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO))
|
||||
return -0x04UL;
|
||||
return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK);
|
||||
|
|
|
|||
|
|
@ -126,7 +126,7 @@ static inline int gup_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr,
|
|||
*/
|
||||
if (pmd_none(pmd) || pmd_trans_splitting(pmd))
|
||||
return 0;
|
||||
if (unlikely(pmd_huge(pmd))) {
|
||||
if (unlikely(pmd_large(pmd))) {
|
||||
if (!gup_huge_pmd(pmdp, pmd, addr, next,
|
||||
write, pages, nr))
|
||||
return 0;
|
||||
|
|
@ -180,8 +180,7 @@ int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
|
|||
addr = start;
|
||||
len = (unsigned long) nr_pages << PAGE_SHIFT;
|
||||
end = start + len;
|
||||
if (unlikely(!access_ok(write ? VERIFY_WRITE : VERIFY_READ,
|
||||
(void __user *)start, len)))
|
||||
if ((end < start) || (end > TASK_SIZE))
|
||||
return 0;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
|
@ -229,7 +228,7 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
|
|||
addr = start;
|
||||
len = (unsigned long) nr_pages << PAGE_SHIFT;
|
||||
end = start + len;
|
||||
if (end < start)
|
||||
if ((end < start) || (end > TASK_SIZE))
|
||||
goto slow_irqon;
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@ config SPARC
|
|||
select HAVE_ARCH_TRACEHOOK
|
||||
select SYSCTL_EXCEPTION_TRACE
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
|
||||
select RTC_CLASS
|
||||
select RTC_DRV_M48T59
|
||||
select HAVE_IRQ_WORK
|
||||
|
|
|
|||
|
|
@ -13,13 +13,13 @@ obj-$(CONFIG_CRYPTO_DES_SPARC64) += camellia-sparc64.o
|
|||
|
||||
obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o
|
||||
|
||||
sha1-sparc64-y := sha1_asm.o sha1_glue.o crop_devid.o
|
||||
sha256-sparc64-y := sha256_asm.o sha256_glue.o crop_devid.o
|
||||
sha512-sparc64-y := sha512_asm.o sha512_glue.o crop_devid.o
|
||||
md5-sparc64-y := md5_asm.o md5_glue.o crop_devid.o
|
||||
sha1-sparc64-y := sha1_asm.o sha1_glue.o
|
||||
sha256-sparc64-y := sha256_asm.o sha256_glue.o
|
||||
sha512-sparc64-y := sha512_asm.o sha512_glue.o
|
||||
md5-sparc64-y := md5_asm.o md5_glue.o
|
||||
|
||||
aes-sparc64-y := aes_asm.o aes_glue.o crop_devid.o
|
||||
des-sparc64-y := des_asm.o des_glue.o crop_devid.o
|
||||
camellia-sparc64-y := camellia_asm.o camellia_glue.o crop_devid.o
|
||||
aes-sparc64-y := aes_asm.o aes_glue.o
|
||||
des-sparc64-y := des_asm.o des_glue.o
|
||||
camellia-sparc64-y := camellia_asm.o camellia_glue.o
|
||||
|
||||
crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o crop_devid.o
|
||||
crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o
|
||||
|
|
|
|||
|
|
@ -475,3 +475,5 @@ MODULE_LICENSE("GPL");
|
|||
MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated");
|
||||
|
||||
MODULE_ALIAS("aes");
|
||||
|
||||
#include "crop_devid.c"
|
||||
|
|
|
|||
|
|
@ -320,3 +320,5 @@ MODULE_LICENSE("GPL");
|
|||
MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated");
|
||||
|
||||
MODULE_ALIAS("aes");
|
||||
|
||||
#include "crop_devid.c"
|
||||
|
|
|
|||
|
|
@ -177,3 +177,5 @@ MODULE_LICENSE("GPL");
|
|||
MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated");
|
||||
|
||||
MODULE_ALIAS("crc32c");
|
||||
|
||||
#include "crop_devid.c"
|
||||
|
|
|
|||
|
|
@ -527,3 +527,5 @@ MODULE_LICENSE("GPL");
|
|||
MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated");
|
||||
|
||||
MODULE_ALIAS("des");
|
||||
|
||||
#include "crop_devid.c"
|
||||
|
|
|
|||
|
|
@ -186,3 +186,5 @@ MODULE_LICENSE("GPL");
|
|||
MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated");
|
||||
|
||||
MODULE_ALIAS("md5");
|
||||
|
||||
#include "crop_devid.c"
|
||||
|
|
|
|||
|
|
@ -181,3 +181,5 @@ MODULE_LICENSE("GPL");
|
|||
MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated");
|
||||
|
||||
MODULE_ALIAS("sha1");
|
||||
|
||||
#include "crop_devid.c"
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue