mirror of https://gitee.com/openkylin/linux.git
OMAP2 clock: drop CONFIG_PARTICIPANT clock flag
It turns out that the only purpose of the CONFIG_PARTICIPANT clock flag is to prevent omap2_clk_set_rate() and omap2_clk_set_parent() from being executed on clocks with that flag set. The rate-changing component can be more directly accomplished by dropping the .set_rate and .round_rate function pointers from those CONFIG_PARTICIPANT struct clks. As far as the parent-changing component is concerned, it turns out that none of the CONFIG_PARTICIPANT clocks have multiple parent choices, so all that is necessary is for omap2_clk_set_parent() to bail out early if the new parent is equal to the old parent. Implement this change and get rid of the flag, which has always had a confusing name (it appears to be a Kconfig option, falsely). Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com>
This commit is contained in:
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17d092733d
commit
1a3377176b
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@ -318,11 +318,6 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
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pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate);
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pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate);
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/* CONFIG_PARTICIPANT clocks are changed only in sets via the
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rate table mechanism, driven by mpu_speed */
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if (clk->flags & CONFIG_PARTICIPANT)
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return -EINVAL;
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/* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */
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/* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */
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if (clk->set_rate)
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if (clk->set_rate)
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ret = clk->set_rate(clk, rate);
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ret = clk->set_rate(clk, rate);
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@ -332,12 +327,12 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
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int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
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int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
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{
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{
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if (clk->flags & CONFIG_PARTICIPANT)
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return -EINVAL;
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if (!clk->clksel)
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if (!clk->clksel)
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return -EINVAL;
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return -EINVAL;
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if (clk->parent == new_parent)
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return 0;
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return omap2_clksel_set_parent(clk, new_parent);
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return omap2_clksel_set_parent(clk, new_parent);
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}
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}
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@ -426,15 +426,13 @@ static struct clk mpu_ck = { /* Control cpu */
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.name = "mpu_ck",
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.name = "mpu_ck",
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.ops = &clkops_null,
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.ops = &clkops_null,
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.parent = &core_ck,
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.parent = &core_ck,
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.flags = DELAYED_APP | CONFIG_PARTICIPANT,
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.flags = DELAYED_APP,
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.clkdm_name = "mpu_clkdm",
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.clkdm_name = "mpu_clkdm",
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.init = &omap2_init_clksel_parent,
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.init = &omap2_init_clksel_parent,
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.clksel_reg = OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL),
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.clksel_reg = OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL),
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.clksel_mask = OMAP24XX_CLKSEL_MPU_MASK,
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.clksel_mask = OMAP24XX_CLKSEL_MPU_MASK,
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.clksel = mpu_clksel,
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.clksel = mpu_clksel,
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.recalc = &omap2_clksel_recalc,
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.recalc = &omap2_clksel_recalc,
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.round_rate = &omap2_clksel_round_rate,
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.set_rate = &omap2_clksel_set_rate
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};
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};
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/*
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/*
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@ -468,7 +466,7 @@ static struct clk dsp_fck = {
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.name = "dsp_fck",
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.name = "dsp_fck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt_wait,
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.parent = &core_ck,
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.parent = &core_ck,
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.flags = DELAYED_APP | CONFIG_PARTICIPANT,
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.flags = DELAYED_APP,
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.clkdm_name = "dsp_clkdm",
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.clkdm_name = "dsp_clkdm",
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.enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
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.enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
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.enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
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.enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
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@ -476,8 +474,6 @@ static struct clk dsp_fck = {
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.clksel_mask = OMAP24XX_CLKSEL_DSP_MASK,
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.clksel_mask = OMAP24XX_CLKSEL_DSP_MASK,
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.clksel = dsp_fck_clksel,
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.clksel = dsp_fck_clksel,
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.recalc = &omap2_clksel_recalc,
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.recalc = &omap2_clksel_recalc,
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.round_rate = &omap2_clksel_round_rate,
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.set_rate = &omap2_clksel_set_rate
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};
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};
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/* DSP interface clock */
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/* DSP interface clock */
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@ -498,13 +494,11 @@ static struct clk dsp_irate_ick = {
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.name = "dsp_irate_ick",
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.name = "dsp_irate_ick",
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.ops = &clkops_null,
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.ops = &clkops_null,
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.parent = &dsp_fck,
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.parent = &dsp_fck,
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.flags = DELAYED_APP | CONFIG_PARTICIPANT,
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.flags = DELAYED_APP,
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.clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
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.clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
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.clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK,
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.clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK,
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.clksel = dsp_irate_ick_clksel,
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.clksel = dsp_irate_ick_clksel,
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.recalc = &omap2_clksel_recalc,
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.recalc = &omap2_clksel_recalc,
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.round_rate = &omap2_clksel_round_rate,
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.set_rate = &omap2_clksel_set_rate
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};
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};
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/* 2420 only */
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/* 2420 only */
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@ -512,7 +506,6 @@ static struct clk dsp_ick = {
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.name = "dsp_ick", /* apparently ipi and isp */
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.name = "dsp_ick", /* apparently ipi and isp */
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt_wait,
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.parent = &dsp_irate_ick,
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.parent = &dsp_irate_ick,
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.flags = CONFIG_PARTICIPANT,
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.enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_ICLKEN),
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.enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_ICLKEN),
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.enable_bit = OMAP2420_EN_DSP_IPI_SHIFT, /* for ipi */
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.enable_bit = OMAP2420_EN_DSP_IPI_SHIFT, /* for ipi */
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};
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};
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@ -522,7 +515,6 @@ static struct clk iva2_1_ick = {
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.name = "iva2_1_ick",
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.name = "iva2_1_ick",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt_wait,
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.parent = &dsp_irate_ick,
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.parent = &dsp_irate_ick,
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.flags = CONFIG_PARTICIPANT,
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.enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
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.enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
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.enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
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.enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
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};
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};
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@ -536,7 +528,7 @@ static struct clk iva1_ifck = {
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.name = "iva1_ifck",
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.name = "iva1_ifck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt_wait,
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.parent = &core_ck,
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.parent = &core_ck,
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.flags = CONFIG_PARTICIPANT | DELAYED_APP,
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.flags = DELAYED_APP,
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.clkdm_name = "iva1_clkdm",
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.clkdm_name = "iva1_clkdm",
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.enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
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.enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
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.enable_bit = OMAP2420_EN_IVA_COP_SHIFT,
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.enable_bit = OMAP2420_EN_IVA_COP_SHIFT,
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@ -544,8 +536,6 @@ static struct clk iva1_ifck = {
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.clksel_mask = OMAP2420_CLKSEL_IVA_MASK,
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.clksel_mask = OMAP2420_CLKSEL_IVA_MASK,
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.clksel = dsp_fck_clksel,
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.clksel = dsp_fck_clksel,
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.recalc = &omap2_clksel_recalc,
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.recalc = &omap2_clksel_recalc,
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.round_rate = &omap2_clksel_round_rate,
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.set_rate = &omap2_clksel_set_rate
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};
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};
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/* IVA1 mpu/int/i/f clocks are /2 of parent */
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/* IVA1 mpu/int/i/f clocks are /2 of parent */
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@ -599,14 +589,12 @@ static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */
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.name = "core_l3_ck",
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.name = "core_l3_ck",
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.ops = &clkops_null,
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.ops = &clkops_null,
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.parent = &core_ck,
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.parent = &core_ck,
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.flags = DELAYED_APP | CONFIG_PARTICIPANT,
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.flags = DELAYED_APP,
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.clkdm_name = "core_l3_clkdm",
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.clkdm_name = "core_l3_clkdm",
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.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
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.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
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.clksel_mask = OMAP24XX_CLKSEL_L3_MASK,
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.clksel_mask = OMAP24XX_CLKSEL_L3_MASK,
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.clksel = core_l3_clksel,
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.clksel = core_l3_clksel,
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.recalc = &omap2_clksel_recalc,
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.recalc = &omap2_clksel_recalc,
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.round_rate = &omap2_clksel_round_rate,
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.set_rate = &omap2_clksel_set_rate
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};
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};
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/* usb_l4_ick */
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/* usb_l4_ick */
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@ -627,7 +615,7 @@ static struct clk usb_l4_ick = { /* FS-USB interface clock */
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.name = "usb_l4_ick",
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.name = "usb_l4_ick",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt_wait,
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.parent = &core_l3_ck,
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.parent = &core_l3_ck,
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.flags = DELAYED_APP | CONFIG_PARTICIPANT,
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.flags = DELAYED_APP,
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.clkdm_name = "core_l4_clkdm",
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
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.enable_bit = OMAP24XX_EN_USB_SHIFT,
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.enable_bit = OMAP24XX_EN_USB_SHIFT,
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@ -635,8 +623,6 @@ static struct clk usb_l4_ick = { /* FS-USB interface clock */
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.clksel_mask = OMAP24XX_CLKSEL_USB_MASK,
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.clksel_mask = OMAP24XX_CLKSEL_USB_MASK,
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.clksel = usb_l4_ick_clksel,
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.clksel = usb_l4_ick_clksel,
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.recalc = &omap2_clksel_recalc,
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.recalc = &omap2_clksel_recalc,
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.round_rate = &omap2_clksel_round_rate,
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.set_rate = &omap2_clksel_set_rate
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};
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};
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/*
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/*
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@ -763,7 +749,7 @@ static struct clk gfx_2d_fck = {
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.name = "gfx_2d_fck",
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.name = "gfx_2d_fck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt_wait,
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.parent = &core_l3_ck,
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.parent = &core_l3_ck,
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.flags = DELAYED_APP | CONFIG_PARTICIPANT,
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.flags = DELAYED_APP,
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.clkdm_name = "gfx_clkdm",
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.clkdm_name = "gfx_clkdm",
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.enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
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.enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
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.enable_bit = OMAP24XX_EN_2D_SHIFT,
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.enable_bit = OMAP24XX_EN_2D_SHIFT,
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@ -771,15 +757,12 @@ static struct clk gfx_2d_fck = {
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.clksel_mask = OMAP_CLKSEL_GFX_MASK,
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.clksel_mask = OMAP_CLKSEL_GFX_MASK,
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.clksel = gfx_fck_clksel,
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.clksel = gfx_fck_clksel,
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.recalc = &omap2_clksel_recalc,
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.recalc = &omap2_clksel_recalc,
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.round_rate = &omap2_clksel_round_rate,
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.set_rate = &omap2_clksel_set_rate
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};
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};
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static struct clk gfx_ick = {
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static struct clk gfx_ick = {
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.name = "gfx_ick", /* From l3 */
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.name = "gfx_ick", /* From l3 */
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt_wait,
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.parent = &core_l3_ck,
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.parent = &core_l3_ck,
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.flags = CONFIG_PARTICIPANT,
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.clkdm_name = "gfx_clkdm",
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.clkdm_name = "gfx_clkdm",
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.enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
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.enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
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.enable_bit = OMAP_EN_GFX_SHIFT,
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.enable_bit = OMAP_EN_GFX_SHIFT,
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@ -810,7 +793,7 @@ static struct clk mdm_ick = { /* used both as a ick and fck */
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.name = "mdm_ick",
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.name = "mdm_ick",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt_wait,
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.parent = &core_ck,
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.parent = &core_ck,
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.flags = DELAYED_APP | CONFIG_PARTICIPANT,
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.flags = DELAYED_APP,
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.clkdm_name = "mdm_clkdm",
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.clkdm_name = "mdm_clkdm",
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.enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_ICLKEN),
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.enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_ICLKEN),
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.enable_bit = OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT,
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.enable_bit = OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT,
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.clksel_mask = OMAP2430_CLKSEL_MDM_MASK,
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.clksel_mask = OMAP2430_CLKSEL_MDM_MASK,
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.clksel = mdm_ick_clksel,
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.clksel = mdm_ick_clksel,
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.recalc = &omap2_clksel_recalc,
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.recalc = &omap2_clksel_recalc,
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.round_rate = &omap2_clksel_round_rate,
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.set_rate = &omap2_clksel_set_rate
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};
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};
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static struct clk mdm_osc_ck = {
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static struct clk mdm_osc_ck = {
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@ -195,7 +195,7 @@ extern const struct clkops clkops_null;
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#define CLOCK_IDLE_CONTROL (1 << 7)
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#define CLOCK_IDLE_CONTROL (1 << 7)
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#define CLOCK_NO_IDLE_PARENT (1 << 8)
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#define CLOCK_NO_IDLE_PARENT (1 << 8)
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#define DELAYED_APP (1 << 9) /* Delay application of clock */
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#define DELAYED_APP (1 << 9) /* Delay application of clock */
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#define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */
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/* bit 10 is currently free */
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#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */
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#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */
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#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */
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#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */
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/* bit 13 is currently free */
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/* bit 13 is currently free */
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