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drivers/net/ethernet: Fix non-kernel-doc comments with kernel-doc start markers 

Convert doxygen (or similar) formatted comments to kernel-doc or
unformatted comment.  Delete a few that are content-free.

Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ben Hutchings 2012-07-10 10:56:59 +00:00 committed by David S. Miller
parent 49ce9c2cda
commit 1aa8b471e0
36 changed files with 342 additions and 892 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
View File

@ -1740,15 +1740,6 @@ struct bnx2x_func_init_params {
int bnx2x_set_mac_one(struct bnx2x *bp, u8 *mac, int bnx2x_set_mac_one(struct bnx2x *bp, u8 *mac,
struct bnx2x_vlan_mac_obj *obj, bool set, struct bnx2x_vlan_mac_obj *obj, bool set,
int mac_type, unsigned long *ramrod_flags); int mac_type, unsigned long *ramrod_flags);
/**
* Deletes all MACs configured for the specific MAC object.
*
* @param bp Function driver instance
* @param mac_obj MAC object to cleanup
*
* @return zero if all MACs were cleaned
*/
/** /**
* bnx2x_del_all_macs - delete all MACs configured for the specific MAC object * bnx2x_del_all_macs - delete all MACs configured for the specific MAC object
* *

4
drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h
View File

@ -321,9 +321,7 @@
#define DISABLE_STATISTIC_COUNTER_ID_VALUE 0 #define DISABLE_STATISTIC_COUNTER_ID_VALUE 0
/** /* This file defines HSI constants common to all microcode flows */
* This file defines HSI constants common to all microcode flows
*/
#define PROTOCOL_STATE_BIT_OFFSET 6 #define PROTOCOL_STATE_BIT_OFFSET 6

3
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
View File

@ -493,8 +493,7 @@ struct bnx2x_ets_params {
struct bnx2x_ets_cos_params cos[DCBX_MAX_NUM_COS]; struct bnx2x_ets_cos_params cos[DCBX_MAX_NUM_COS];
}; };
/** /* Used to update the PFC attributes in EMAC, BMAC, NIG and BRB
* Used to update the PFC attributes in EMAC, BMAC, NIG and BRB
* when link is already up * when link is already up
*/ */
int bnx2x_update_pfc(struct link_params *params, int bnx2x_update_pfc(struct link_params *params,

3
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
View File

@ -11560,8 +11560,7 @@ static void bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n)
} }
} }
/** /* IRO array is stored in the following format:
* IRO array is stored in the following format:
* {base(24bit), m1(16bit), m2(16bit), m3(16bit), size(16bit) } * {base(24bit), m1(16bit), m2(16bit), m3(16bit), size(16bit) }
*/ */
static void bnx2x_prep_iro(const u8 *_source, u8 *_target, u32 n) static void bnx2x_prep_iro(const u8 *_source, u8 *_target, u32 n)

3
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
View File

@ -7275,8 +7275,7 @@ Theotherbitsarereservedandshouldbezero*/
#define CDU_REGION_NUMBER_UCM_AG 4 #define CDU_REGION_NUMBER_UCM_AG 4
/** /* String-to-compress [31:8] = CID (all 24 bits)
* String-to-compress [31:8] = CID (all 24 bits)
* String-to-compress [7:4] = Region * String-to-compress [7:4] = Region
* String-to-compress [3:0] = Type * String-to-compress [3:0] = Type
*/ */

34
drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h
View File

@ -167,8 +167,7 @@ typedef int (*exe_q_remove)(struct bnx2x *bp,
union bnx2x_qable_obj *o, union bnx2x_qable_obj *o,
struct bnx2x_exeq_elem *elem); struct bnx2x_exeq_elem *elem);
/** /* Return positive if entry was optimized, 0 - if not, negative
* @return positive is entry was optimized, 0 - if not, negative
* in case of an error. * in case of an error.
*/ */
typedef int (*exe_q_optimize)(struct bnx2x *bp, typedef int (*exe_q_optimize)(struct bnx2x *bp,
@ -1286,12 +1285,11 @@ void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
struct bnx2x_rx_mode_obj *o); struct bnx2x_rx_mode_obj *o);
/** /**
* Send and RX_MODE ramrod according to the provided parameters. * bnx2x_config_rx_mode - Send and RX_MODE ramrod according to the provided parameters.
* *
* @param bp * @p: Command parameters
* @param p Command parameters
* *
* @return 0 - if operation was successfull and there is no pending completions, * Return: 0 - if operation was successfull and there is no pending completions,
* positive number - if there are pending completions, * positive number - if there are pending completions,
* negative - if there were errors * negative - if there were errors
*/ */
@ -1308,7 +1306,11 @@ void bnx2x_init_mcast_obj(struct bnx2x *bp,
bnx2x_obj_type type); bnx2x_obj_type type);
/** /**
* Configure multicast MACs list. May configure a new list * bnx2x_config_mcast - Configure multicast MACs list.
*
* @cmd: command to execute: BNX2X_MCAST_CMD_X
*
* May configure a new list
* provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up * provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up
* (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current * (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current
* configuration, continue to execute the pending commands * configuration, continue to execute the pending commands
@ -1319,11 +1321,7 @@ void bnx2x_init_mcast_obj(struct bnx2x *bp,
* the current command will be enqueued to the tail of the * the current command will be enqueued to the tail of the
* pending commands list. * pending commands list.
* *
* @param bp * Return: 0 is operation was sucessfull and there are no pending completions,
* @param p
* @param command to execute: BNX2X_MCAST_CMD_X
*
* @return 0 is operation was sucessfull and there are no pending completions,
* negative if there were errors, positive if there are pending * negative if there were errors, positive if there are pending
* completions. * completions.
*/ */
@ -1348,21 +1346,17 @@ void bnx2x_init_rss_config_obj(struct bnx2x *bp,
bnx2x_obj_type type); bnx2x_obj_type type);
/** /**
* Updates RSS configuration according to provided parameters. * bnx2x_config_rss - Updates RSS configuration according to provided parameters
* *
* @param bp * Return: 0 in case of success
* @param p
*
* @return 0 in case of success
*/ */
int bnx2x_config_rss(struct bnx2x *bp, int bnx2x_config_rss(struct bnx2x *bp,
struct bnx2x_config_rss_params *p); struct bnx2x_config_rss_params *p);
/** /**
* Return the current ind_table configuration. * bnx2x_get_rss_ind_table - Return the current ind_table configuration.
* *
* @param bp * @ind_table: buffer to fill with the current indirection
* @param ind_table buffer to fill with the current indirection
* table content. Should be at least * table content. Should be at least
* T_ETH_INDIRECTION_TABLE_SIZE bytes long. * T_ETH_INDIRECTION_TABLE_SIZE bytes long.
*/ */

5
drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c
View File

@ -1321,12 +1321,9 @@ static void bnx2x_port_stats_base_init(struct bnx2x *bp)
bnx2x_stats_comp(bp); bnx2x_stats_comp(bp);
} }
/** /* This function will prepare the statistics ramrod data the way
* This function will prepare the statistics ramrod data the way
* we will only have to increment the statistics counter and * we will only have to increment the statistics counter and
* send the ramrod each time we have to. * send the ramrod each time we have to.
*
* @param bp
*/ */
static void bnx2x_prep_fw_stats_req(struct bnx2x *bp) static void bnx2x_prep_fw_stats_req(struct bnx2x *bp)
{ {

4
drivers/net/ethernet/broadcom/cnic.c
View File

@ -5542,9 +5542,7 @@ static void cnic_rcv_netevent(struct cnic_local *cp, unsigned long event,
rcu_read_unlock(); rcu_read_unlock();
} }
/** /* netdev event handler */
* netdev event handler
*/
static int cnic_netdev_event(struct notifier_block *this, unsigned long event, static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
void *ptr) void *ptr)
{ {

57
drivers/net/ethernet/brocade/bna/bfa_cee.c
View File

@ -127,13 +127,7 @@ bfa_cee_reset_stats_isr(struct bfa_cee *cee, enum bfa_status status)
cee->cbfn.reset_stats_cbfn(cee->cbfn.reset_stats_cbarg, status); cee->cbfn.reset_stats_cbfn(cee->cbfn.reset_stats_cbarg, status);
} }
/** /**
* bfa_nw_cee_meminfo() * bfa_nw_cee_meminfo - Returns the size of the DMA memory needed by CEE module
*
* @brief Returns the size of the DMA memory needed by CEE module
*
* @param[in] void
*
* @return Size of DMA region
*/ */
u32 u32
bfa_nw_cee_meminfo(void) bfa_nw_cee_meminfo(void)
@ -142,15 +136,11 @@ bfa_nw_cee_meminfo(void)
} }
/** /**
* bfa_nw_cee_mem_claim() * bfa_nw_cee_mem_claim - Initialized CEE DMA Memory
* *
* @brief Initialized CEE DMA Memory * @cee: CEE module pointer
* * @dma_kva: Kernel Virtual Address of CEE DMA Memory
* @param[in] cee CEE module pointer * @dma_pa: Physical Address of CEE DMA Memory
* dma_kva Kernel Virtual Address of CEE DMA Memory
* dma_pa Physical Address of CEE DMA Memory
*
* @return void
*/ */
void void
bfa_nw_cee_mem_claim(struct bfa_cee *cee, u8 *dma_kva, u64 dma_pa) bfa_nw_cee_mem_claim(struct bfa_cee *cee, u8 *dma_kva, u64 dma_pa)
@ -165,13 +155,11 @@ bfa_nw_cee_mem_claim(struct bfa_cee *cee, u8 *dma_kva, u64 dma_pa)
} }
/** /**
* bfa_cee_get_attr() * bfa_cee_get_attr - Send the request to the f/w to fetch CEE attributes.
* *
* @brief Send the request to the f/w to fetch CEE attributes. * @cee: Pointer to the CEE module data structure.
* *
* @param[in] Pointer to the CEE module data structure. * Return: status
*
* @return Status
*/ */
enum bfa_status enum bfa_status
bfa_nw_cee_get_attr(struct bfa_cee *cee, struct bfa_cee_attr *attr, bfa_nw_cee_get_attr(struct bfa_cee *cee, struct bfa_cee_attr *attr,
@ -200,13 +188,7 @@ bfa_nw_cee_get_attr(struct bfa_cee *cee, struct bfa_cee_attr *attr,
} }
/** /**
* bfa_cee_isrs() * bfa_cee_isrs - Handles Mail-box interrupts for CEE module.
*
* @brief Handles Mail-box interrupts for CEE module.
*
* @param[in] Pointer to the CEE module data structure.
*
* @return void
*/ */
static void static void
@ -233,14 +215,9 @@ bfa_cee_isr(void *cbarg, struct bfi_mbmsg *m)
} }
/** /**
* bfa_cee_notify() * bfa_cee_notify - CEE module heart-beat failure handler.
* *
* @brief CEE module heart-beat failure handler. * @event: IOC event type
* @brief CEE module IOC event handler.
*
* @param[in] IOC event type
*
* @return void
*/ */
static void static void
@ -287,17 +264,13 @@ bfa_cee_notify(void *arg, enum bfa_ioc_event event)
} }
/** /**
* bfa_nw_cee_attach() * bfa_nw_cee_attach - CEE module-attach API
* *
* @brief CEE module-attach API * @cee: Pointer to the CEE module data structure
* * @ioc: Pointer to the ioc module data structure
* @param[in] cee - Pointer to the CEE module data structure * @dev: Pointer to the device driver module data structure.
* ioc - Pointer to the ioc module data structure
* dev - Pointer to the device driver module data structure
* The device driver specific mbox ISR functions have * The device driver specific mbox ISR functions have
* this pointer as one of the parameters. * this pointer as one of the parameters.
*
* @return void
*/ */
void void
bfa_nw_cee_attach(struct bfa_cee *cee, struct bfa_ioc *ioc, bfa_nw_cee_attach(struct bfa_cee *cee, struct bfa_ioc *ioc,

34
drivers/net/ethernet/brocade/bna/bfa_cs.h
View File

@ -16,23 +16,18 @@
* www.brocade.com * www.brocade.com
*/ */
/** /* BFA common services */
* @file bfa_cs.h BFA common services
*/
#ifndef __BFA_CS_H__ #ifndef __BFA_CS_H__
#define __BFA_CS_H__ #define __BFA_CS_H__
#include "cna.h" #include "cna.h"
/** /* BFA state machine interfaces */
* @ BFA state machine interfaces
*/
typedef void (*bfa_sm_t)(void *sm, int event); typedef void (*bfa_sm_t)(void *sm, int event);
/** /* oc - object class eg. bfa_ioc
* oc - object class eg. bfa_ioc
* st - state, eg. reset * st - state, eg. reset
* otype - object type, eg. struct bfa_ioc * otype - object type, eg. struct bfa_ioc
* etype - object type, eg. enum ioc_event * etype - object type, eg. enum ioc_event
@ -45,9 +40,7 @@ typedef void (*bfa_sm_t)(void *sm, int event);
#define bfa_sm_get_state(_sm) ((_sm)->sm) #define bfa_sm_get_state(_sm) ((_sm)->sm)
#define bfa_sm_cmp_state(_sm, _state) ((_sm)->sm == (bfa_sm_t)(_state)) #define bfa_sm_cmp_state(_sm, _state) ((_sm)->sm == (bfa_sm_t)(_state))
/** /* For converting from state machine function to state encoding. */
* For converting from state machine function to state encoding.
*/
struct bfa_sm_table { struct bfa_sm_table {
bfa_sm_t sm; /*!< state machine function */ bfa_sm_t sm; /*!< state machine function */
int state; /*!< state machine encoding */ int state; /*!< state machine encoding */
@ -55,13 +48,10 @@ struct bfa_sm_table {
}; };
#define BFA_SM(_sm) ((bfa_sm_t)(_sm)) #define BFA_SM(_sm) ((bfa_sm_t)(_sm))
/** /* State machine with entry actions. */
* State machine with entry actions.
*/
typedef void (*bfa_fsm_t)(void *fsm, int event); typedef void (*bfa_fsm_t)(void *fsm, int event);
/** /* oc - object class eg. bfa_ioc
* oc - object class eg. bfa_ioc
* st - state, eg. reset * st - state, eg. reset
* otype - object type, eg. struct bfa_ioc * otype - object type, eg. struct bfa_ioc
* etype - object type, eg. enum ioc_event * etype - object type, eg. enum ioc_event
@ -90,9 +80,7 @@ bfa_sm_to_state(const struct bfa_sm_table *smt, bfa_sm_t sm)
return smt[i].state; return smt[i].state;
} }
/** /* Generic wait counter. */
* @ Generic wait counter.
*/
typedef void (*bfa_wc_resume_t) (void *cbarg); typedef void (*bfa_wc_resume_t) (void *cbarg);
@ -116,9 +104,7 @@ bfa_wc_down(struct bfa_wc *wc)
wc->wc_resume(wc->wc_cbarg); wc->wc_resume(wc->wc_cbarg);
} }
/** /* Initialize a waiting counter. */
* Initialize a waiting counter.
*/
static inline void static inline void
bfa_wc_init(struct bfa_wc *wc, bfa_wc_resume_t wc_resume, void *wc_cbarg) bfa_wc_init(struct bfa_wc *wc, bfa_wc_resume_t wc_resume, void *wc_cbarg)
{ {
@ -128,9 +114,7 @@ bfa_wc_init(struct bfa_wc *wc, bfa_wc_resume_t wc_resume, void *wc_cbarg)
bfa_wc_up(wc); bfa_wc_up(wc);
} }
/** /* Wait for counter to reach zero */
* Wait for counter to reach zero
*/
static inline void static inline void
bfa_wc_wait(struct bfa_wc *wc) bfa_wc_wait(struct bfa_wc *wc)
{ {

63
drivers/net/ethernet/brocade/bna/bfa_defs.h
View File

@ -26,13 +26,9 @@
#define BFA_STRING_32 32 #define BFA_STRING_32 32
#define BFA_VERSION_LEN 64 #define BFA_VERSION_LEN 64
/** /* ---------------------- adapter definitions ------------ */
* ---------------------- adapter definitions ------------
*/
/** /* BFA adapter level attributes. */
* BFA adapter level attributes.
*/
enum { enum {
BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE), BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE),
/* /*
@ -74,18 +70,14 @@ struct bfa_adapter_attr {
u8 trunk_capable; u8 trunk_capable;
}; };
/** /* ---------------------- IOC definitions ------------ */
* ---------------------- IOC definitions ------------
*/
enum { enum {
BFA_IOC_DRIVER_LEN = 16, BFA_IOC_DRIVER_LEN = 16,
BFA_IOC_CHIP_REV_LEN = 8, BFA_IOC_CHIP_REV_LEN = 8,
}; };
/** /* Driver and firmware versions. */
* Driver and firmware versions.
*/
struct bfa_ioc_driver_attr { struct bfa_ioc_driver_attr {
char driver[BFA_IOC_DRIVER_LEN]; /*!< driver name */ char driver[BFA_IOC_DRIVER_LEN]; /*!< driver name */
char driver_ver[BFA_VERSION_LEN]; /*!< driver version */ char driver_ver[BFA_VERSION_LEN]; /*!< driver version */
@ -95,9 +87,7 @@ struct bfa_ioc_driver_attr {
char ob_ver[BFA_VERSION_LEN]; /*!< openboot version */ char ob_ver[BFA_VERSION_LEN]; /*!< openboot version */
}; };
/** /* IOC PCI device attributes */
* IOC PCI device attributes
*/
struct bfa_ioc_pci_attr { struct bfa_ioc_pci_attr {
u16 vendor_id; /*!< PCI vendor ID */ u16 vendor_id; /*!< PCI vendor ID */
u16 device_id; /*!< PCI device ID */ u16 device_id; /*!< PCI device ID */
@ -108,9 +98,7 @@ struct bfa_ioc_pci_attr {
char chip_rev[BFA_IOC_CHIP_REV_LEN]; /*!< chip revision */ char chip_rev[BFA_IOC_CHIP_REV_LEN]; /*!< chip revision */
}; };
/** /* IOC states */
* IOC states
*/
enum bfa_ioc_state { enum bfa_ioc_state {
BFA_IOC_UNINIT = 1, /*!< IOC is in uninit state */ BFA_IOC_UNINIT = 1, /*!< IOC is in uninit state */
BFA_IOC_RESET = 2, /*!< IOC is in reset state */ BFA_IOC_RESET = 2, /*!< IOC is in reset state */
@ -127,9 +115,7 @@ enum bfa_ioc_state {
BFA_IOC_HWFAIL = 13, /*!< PCI mapping doesn't exist */ BFA_IOC_HWFAIL = 13, /*!< PCI mapping doesn't exist */
}; };
/** /* IOC firmware stats */
* IOC firmware stats
*/
struct bfa_fw_ioc_stats { struct bfa_fw_ioc_stats {
u32 enable_reqs; u32 enable_reqs;
u32 disable_reqs; u32 disable_reqs;
@ -139,9 +125,7 @@ struct bfa_fw_ioc_stats {
u32 unknown_reqs; u32 unknown_reqs;
}; };
/** /* IOC driver stats */
* IOC driver stats
*/
struct bfa_ioc_drv_stats { struct bfa_ioc_drv_stats {
u32 ioc_isrs; u32 ioc_isrs;
u32 ioc_enables; u32 ioc_enables;
@ -157,9 +141,7 @@ struct bfa_ioc_drv_stats {
u32 rsvd; u32 rsvd;
}; };
/** /* IOC statistics */
* IOC statistics
*/
struct bfa_ioc_stats { struct bfa_ioc_stats {
struct bfa_ioc_drv_stats drv_stats; /*!< driver IOC stats */ struct bfa_ioc_drv_stats drv_stats; /*!< driver IOC stats */
struct bfa_fw_ioc_stats fw_stats; /*!< firmware IOC stats */ struct bfa_fw_ioc_stats fw_stats; /*!< firmware IOC stats */
@ -171,9 +153,7 @@ enum bfa_ioc_type {
BFA_IOC_TYPE_LL = 3, BFA_IOC_TYPE_LL = 3,
}; };
/** /* IOC attributes returned in queries */
* IOC attributes returned in queries
*/
struct bfa_ioc_attr { struct bfa_ioc_attr {
enum bfa_ioc_type ioc_type; enum bfa_ioc_type ioc_type;
enum bfa_ioc_state state; /*!< IOC state */ enum bfa_ioc_state state; /*!< IOC state */
@ -187,22 +167,16 @@ struct bfa_ioc_attr {
u8 rsvd[4]; /*!< 64bit align */ u8 rsvd[4]; /*!< 64bit align */
}; };
/** /* Adapter capability mask definition */
* Adapter capability mask definition
*/
enum { enum {
BFA_CM_HBA = 0x01, BFA_CM_HBA = 0x01,
BFA_CM_CNA = 0x02, BFA_CM_CNA = 0x02,
BFA_CM_NIC = 0x04, BFA_CM_NIC = 0x04,
}; };
/** /* ---------------------- mfg definitions ------------ */
* ---------------------- mfg definitions ------------
*/
/** /* Checksum size */
* Checksum size
*/
#define BFA_MFG_CHKSUM_SIZE 16 #define BFA_MFG_CHKSUM_SIZE 16
#define BFA_MFG_PARTNUM_SIZE 14 #define BFA_MFG_PARTNUM_SIZE 14
@ -213,8 +187,7 @@ enum {
#pragma pack(1) #pragma pack(1)
/** /* BFA adapter manufacturing block definition.
* @brief BFA adapter manufacturing block definition.
* *
* All numerical fields are in big-endian format. * All numerical fields are in big-endian format.
*/ */
@ -256,9 +229,7 @@ struct bfa_mfg_block {
#pragma pack() #pragma pack()
/** /* ---------------------- pci definitions ------------ */
* ---------------------- pci definitions ------------
*/
/* /*
* PCI device ID information * PCI device ID information
@ -275,9 +246,7 @@ enum {
#define bfa_asic_id_ctc(device) \ #define bfa_asic_id_ctc(device) \
(bfa_asic_id_ct(device) || bfa_asic_id_ct2(device)) (bfa_asic_id_ct(device) || bfa_asic_id_ct2(device))
/** /* PCI sub-system device and vendor ID information */
* PCI sub-system device and vendor ID information
*/
enum { enum {
BFA_PCI_FCOE_SSDEVICE_ID = 0x14, BFA_PCI_FCOE_SSDEVICE_ID = 0x14,
BFA_PCI_CT2_SSID_FCoE = 0x22, BFA_PCI_CT2_SSID_FCoE = 0x22,

15
drivers/net/ethernet/brocade/bna/bfa_defs_cna.h
View File

@ -20,10 +20,7 @@
#include "bfa_defs.h" #include "bfa_defs.h"
/** /* FC physical port statistics. */
* @brief
* FC physical port statistics.
*/
struct bfa_port_fc_stats { struct bfa_port_fc_stats {
u64 secs_reset; /*!< Seconds since stats is reset */ u64 secs_reset; /*!< Seconds since stats is reset */
u64 tx_frames; /*!< Tx frames */ u64 tx_frames; /*!< Tx frames */
@ -59,10 +56,7 @@ struct bfa_port_fc_stats {
u64 bbsc_link_resets; /*!< Credit Recovery-Link Resets */ u64 bbsc_link_resets; /*!< Credit Recovery-Link Resets */
}; };
/** /* Eth Physical Port statistics. */
* @brief
* Eth Physical Port statistics.
*/
struct bfa_port_eth_stats { struct bfa_port_eth_stats {
u64 secs_reset; /*!< Seconds since stats is reset */ u64 secs_reset; /*!< Seconds since stats is reset */
u64 frame_64; /*!< Frames 64 bytes */ u64 frame_64; /*!< Frames 64 bytes */
@ -108,10 +102,7 @@ struct bfa_port_eth_stats {
u64 tx_iscsi_zero_pause; /*!< Tx iSCSI zero pause */ u64 tx_iscsi_zero_pause; /*!< Tx iSCSI zero pause */
}; };
/** /* Port statistics. */
* @brief
* Port statistics.
*/
union bfa_port_stats_u { union bfa_port_stats_u {
struct bfa_port_fc_stats fc; struct bfa_port_fc_stats fc;
struct bfa_port_eth_stats eth; struct bfa_port_eth_stats eth;

35
drivers/net/ethernet/brocade/bna/bfa_defs_mfg_comm.h
View File

@ -20,33 +20,23 @@
#include "bfa_defs.h" #include "bfa_defs.h"
/** /* Manufacturing block version */
* Manufacturing block version
*/
#define BFA_MFG_VERSION 3 #define BFA_MFG_VERSION 3
#define BFA_MFG_VERSION_UNINIT 0xFF #define BFA_MFG_VERSION_UNINIT 0xFF
/** /* Manufacturing block encrypted version */
* Manufacturing block encrypted version
*/
#define BFA_MFG_ENC_VER 2 #define BFA_MFG_ENC_VER 2
/** /* Manufacturing block version 1 length */
* Manufacturing block version 1 length
*/
#define BFA_MFG_VER1_LEN 128 #define BFA_MFG_VER1_LEN 128
/** /* Manufacturing block header length */
* Manufacturing block header length
*/
#define BFA_MFG_HDR_LEN 4 #define BFA_MFG_HDR_LEN 4
#define BFA_MFG_SERIALNUM_SIZE 11 #define BFA_MFG_SERIALNUM_SIZE 11
#define STRSZ(_n) (((_n) + 4) & ~3) #define STRSZ(_n) (((_n) + 4) & ~3)
/** /* Manufacturing card type */
* Manufacturing card type
*/
enum { enum {
BFA_MFG_TYPE_CB_MAX = 825, /*!< Crossbow card type max */ BFA_MFG_TYPE_CB_MAX = 825, /*!< Crossbow card type max */
BFA_MFG_TYPE_FC8P2 = 825, /*!< 8G 2port FC card */ BFA_MFG_TYPE_FC8P2 = 825, /*!< 8G 2port FC card */
@ -70,9 +60,7 @@ enum {
#pragma pack(1) #pragma pack(1)
/** /* Check if Mezz card */
* Check if Mezz card
*/
#define bfa_mfg_is_mezz(type) (( \ #define bfa_mfg_is_mezz(type) (( \
(type) == BFA_MFG_TYPE_JAYHAWK || \ (type) == BFA_MFG_TYPE_JAYHAWK || \
(type) == BFA_MFG_TYPE_WANCHESE || \ (type) == BFA_MFG_TYPE_WANCHESE || \
@ -127,9 +115,7 @@ do { \
} \ } \
} while (0) } while (0)
/** /* VPD data length */
* VPD data length
*/
#define BFA_MFG_VPD_LEN 512 #define BFA_MFG_VPD_LEN 512
#define BFA_MFG_VPD_LEN_INVALID 0 #define BFA_MFG_VPD_LEN_INVALID 0
@ -137,9 +123,7 @@ do { \
#define BFA_MFG_VPD_PCI_VER_MASK 0x07 /*!< version mask 3 bits */ #define BFA_MFG_VPD_PCI_VER_MASK 0x07 /*!< version mask 3 bits */
#define BFA_MFG_VPD_PCI_VDR_MASK 0xf8 /*!< vendor mask 5 bits */ #define BFA_MFG_VPD_PCI_VDR_MASK 0xf8 /*!< vendor mask 5 bits */
/** /* VPD vendor tag */
* VPD vendor tag
*/
enum { enum {
BFA_MFG_VPD_UNKNOWN = 0, /*!< vendor unknown */ BFA_MFG_VPD_UNKNOWN = 0, /*!< vendor unknown */
BFA_MFG_VPD_IBM = 1, /*!< vendor IBM */ BFA_MFG_VPD_IBM = 1, /*!< vendor IBM */
@ -151,8 +135,7 @@ enum {
BFA_MFG_VPD_PCI_BRCD = 0xf8, /*!< PCI VPD Brocade */ BFA_MFG_VPD_PCI_BRCD = 0xf8, /*!< PCI VPD Brocade */
}; };
/** /* BFA adapter flash vpd data definition.
* @brief BFA adapter flash vpd data definition.
* *
* All numerical fields are in big-endian format. * All numerical fields are in big-endian format.
*/ */

3
drivers/net/ethernet/brocade/bna/bfa_defs_status.h
View File

@ -18,8 +18,7 @@
#ifndef __BFA_DEFS_STATUS_H__ #ifndef __BFA_DEFS_STATUS_H__
#define __BFA_DEFS_STATUS_H__ #define __BFA_DEFS_STATUS_H__
/** /* API status return values
* API status return values
* *
* NOTE: The error msgs are auto generated from the comments. Only singe line * NOTE: The error msgs are auto generated from the comments. Only singe line
* comments are supported * comments are supported

393
drivers/net/ethernet/brocade/bna/bfa_ioc.c
View File

@ -20,13 +20,9 @@
#include "bfi_reg.h" #include "bfi_reg.h"
#include "bfa_defs.h" #include "bfa_defs.h"
/** /* IOC local definitions */
* IOC local definitions
*/
/** /* Asic specific macros : see bfa_hw_cb.c and bfa_hw_ct.c for details. */
* Asic specific macros : see bfa_hw_cb.c and bfa_hw_ct.c for details.
*/
#define bfa_ioc_firmware_lock(__ioc) \ #define bfa_ioc_firmware_lock(__ioc) \
((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc)) ((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc))
@ -96,9 +92,7 @@ static void bfa_ioc_get_adapter_manufacturer(struct bfa_ioc *ioc,
static void bfa_ioc_get_adapter_model(struct bfa_ioc *ioc, char *model); static void bfa_ioc_get_adapter_model(struct bfa_ioc *ioc, char *model);
static u64 bfa_ioc_get_pwwn(struct bfa_ioc *ioc); static u64 bfa_ioc_get_pwwn(struct bfa_ioc *ioc);
/** /* IOC state machine definitions/declarations */
* IOC state machine definitions/declarations
*/
enum ioc_event { enum ioc_event {
IOC_E_RESET = 1, /*!< IOC reset request */ IOC_E_RESET = 1, /*!< IOC reset request */
IOC_E_ENABLE = 2, /*!< IOC enable request */ IOC_E_ENABLE = 2, /*!< IOC enable request */
@ -148,9 +142,7 @@ static void bfa_iocpf_initfail(struct bfa_ioc *ioc);
static void bfa_iocpf_getattrfail(struct bfa_ioc *ioc); static void bfa_iocpf_getattrfail(struct bfa_ioc *ioc);
static void bfa_iocpf_stop(struct bfa_ioc *ioc); static void bfa_iocpf_stop(struct bfa_ioc *ioc);
/** /* IOCPF state machine events */
* IOCPF state machine events
*/
enum iocpf_event { enum iocpf_event {
IOCPF_E_ENABLE = 1, /*!< IOCPF enable request */ IOCPF_E_ENABLE = 1, /*!< IOCPF enable request */
IOCPF_E_DISABLE = 2, /*!< IOCPF disable request */ IOCPF_E_DISABLE = 2, /*!< IOCPF disable request */
@ -166,9 +158,7 @@ enum iocpf_event {
IOCPF_E_SEM_ERROR = 12, /*!< h/w sem mapping error */ IOCPF_E_SEM_ERROR = 12, /*!< h/w sem mapping error */
}; };
/** /* IOCPF states */
* IOCPF states
*/
enum bfa_iocpf_state { enum bfa_iocpf_state {
BFA_IOCPF_RESET = 1, /*!< IOC is in reset state */ BFA_IOCPF_RESET = 1, /*!< IOC is in reset state */
BFA_IOCPF_SEMWAIT = 2, /*!< Waiting for IOC h/w semaphore */ BFA_IOCPF_SEMWAIT = 2, /*!< Waiting for IOC h/w semaphore */
@ -215,21 +205,15 @@ static struct bfa_sm_table iocpf_sm_table[] = {
{BFA_SM(bfa_iocpf_sm_disabled), BFA_IOCPF_DISABLED}, {BFA_SM(bfa_iocpf_sm_disabled), BFA_IOCPF_DISABLED},
}; };
/** /* IOC State Machine */
* IOC State Machine
*/
/** /* Beginning state. IOC uninit state. */
* Beginning state. IOC uninit state.
*/
static void static void
bfa_ioc_sm_uninit_entry(struct bfa_ioc *ioc) bfa_ioc_sm_uninit_entry(struct bfa_ioc *ioc)
{ {
} }
/** /* IOC is in uninit state. */
* IOC is in uninit state.
*/
static void static void
bfa_ioc_sm_uninit(struct bfa_ioc *ioc, enum ioc_event event) bfa_ioc_sm_uninit(struct bfa_ioc *ioc, enum ioc_event event)
{ {
@ -243,18 +227,14 @@ bfa_ioc_sm_uninit(struct bfa_ioc *ioc, enum ioc_event event)
} }
} }
/** /* Reset entry actions -- initialize state machine */
* Reset entry actions -- initialize state machine
*/
static void static void
bfa_ioc_sm_reset_entry(struct bfa_ioc *ioc) bfa_ioc_sm_reset_entry(struct bfa_ioc *ioc)
{ {
bfa_fsm_set_state(&ioc->iocpf, bfa_iocpf_sm_reset); bfa_fsm_set_state(&ioc->iocpf, bfa_iocpf_sm_reset);
} }
/** /* IOC is in reset state. */
* IOC is in reset state.
*/
static void static void
bfa_ioc_sm_reset(struct bfa_ioc *ioc, enum ioc_event event) bfa_ioc_sm_reset(struct bfa_ioc *ioc, enum ioc_event event)
{ {
@ -282,8 +262,7 @@ bfa_ioc_sm_enabling_entry(struct bfa_ioc *ioc)
bfa_iocpf_enable(ioc); bfa_iocpf_enable(ioc);
} }
/** /* Host IOC function is being enabled, awaiting response from firmware.
* Host IOC function is being enabled, awaiting response from firmware.
* Semaphore is acquired. * Semaphore is acquired.
*/ */
static void static void
@ -325,9 +304,7 @@ bfa_ioc_sm_enabling(struct bfa_ioc *ioc, enum ioc_event event)
} }
} }
/** /* Semaphore should be acquired for version check. */
* Semaphore should be acquired for version check.
*/
static void static void
bfa_ioc_sm_getattr_entry(struct bfa_ioc *ioc) bfa_ioc_sm_getattr_entry(struct bfa_ioc *ioc)
{ {
@ -336,9 +313,7 @@ bfa_ioc_sm_getattr_entry(struct bfa_ioc *ioc)
bfa_ioc_send_getattr(ioc); bfa_ioc_send_getattr(ioc);
} }
/** /* IOC configuration in progress. Timer is active. */
* IOC configuration in progress. Timer is active.
*/
static void static void
bfa_ioc_sm_getattr(struct bfa_ioc *ioc, enum ioc_event event) bfa_ioc_sm_getattr(struct bfa_ioc *ioc, enum ioc_event event)
{ {
@ -419,9 +394,7 @@ bfa_ioc_sm_disabling_entry(struct bfa_ioc *ioc)
bfa_iocpf_disable(ioc); bfa_iocpf_disable(ioc);
} }
/** /* IOC is being disabled */
* IOC is being disabled
*/
static void static void
bfa_ioc_sm_disabling(struct bfa_ioc *ioc, enum ioc_event event) bfa_ioc_sm_disabling(struct bfa_ioc *ioc, enum ioc_event event)
{ {
@ -449,9 +422,7 @@ bfa_ioc_sm_disabling(struct bfa_ioc *ioc, enum ioc_event event)
} }
} }
/** /* IOC disable completion entry. */
* IOC disable completion entry.
*/
static void static void
bfa_ioc_sm_disabled_entry(struct bfa_ioc *ioc) bfa_ioc_sm_disabled_entry(struct bfa_ioc *ioc)
{ {
@ -485,9 +456,7 @@ bfa_ioc_sm_fail_retry_entry(struct bfa_ioc *ioc)
{ {
} }
/** /* Hardware initialization retry. */
* Hardware initialization retry.
*/
static void static void
bfa_ioc_sm_fail_retry(struct bfa_ioc *ioc, enum ioc_event event) bfa_ioc_sm_fail_retry(struct bfa_ioc *ioc, enum ioc_event event)
{ {
@ -534,9 +503,7 @@ bfa_ioc_sm_fail_entry(struct bfa_ioc *ioc)
{ {
} }
/** /* IOC failure. */
* IOC failure.
*/
static void static void
bfa_ioc_sm_fail(struct bfa_ioc *ioc, enum ioc_event event) bfa_ioc_sm_fail(struct bfa_ioc *ioc, enum ioc_event event)
{ {
@ -568,9 +535,7 @@ bfa_ioc_sm_hwfail_entry(struct bfa_ioc *ioc)
{ {
} }
/** /* IOC failure. */
* IOC failure.
*/
static void static void
bfa_ioc_sm_hwfail(struct bfa_ioc *ioc, enum ioc_event event) bfa_ioc_sm_hwfail(struct bfa_ioc *ioc, enum ioc_event event)
{ {
@ -593,13 +558,9 @@ bfa_ioc_sm_hwfail(struct bfa_ioc *ioc, enum ioc_event event)
} }
} }
/** /* IOCPF State Machine */
* IOCPF State Machine
*/
/** /* Reset entry actions -- initialize state machine */
* Reset entry actions -- initialize state machine
*/
static void static void
bfa_iocpf_sm_reset_entry(struct bfa_iocpf *iocpf) bfa_iocpf_sm_reset_entry(struct bfa_iocpf *iocpf)
{ {
@ -607,9 +568,7 @@ bfa_iocpf_sm_reset_entry(struct bfa_iocpf *iocpf)
iocpf->auto_recover = bfa_nw_auto_recover; iocpf->auto_recover = bfa_nw_auto_recover;
} }
/** /* Beginning state. IOC is in reset state. */
* Beginning state. IOC is in reset state.
*/
static void static void
bfa_iocpf_sm_reset(struct bfa_iocpf *iocpf, enum iocpf_event event) bfa_iocpf_sm_reset(struct bfa_iocpf *iocpf, enum iocpf_event event)
{ {
@ -626,9 +585,7 @@ bfa_iocpf_sm_reset(struct bfa_iocpf *iocpf, enum iocpf_event event)
} }
} }
/** /* Semaphore should be acquired for version check. */
* Semaphore should be acquired for version check.
*/
static void static void
bfa_iocpf_sm_fwcheck_entry(struct bfa_iocpf *iocpf) bfa_iocpf_sm_fwcheck_entry(struct bfa_iocpf *iocpf)
{ {
@ -636,9 +593,7 @@ bfa_iocpf_sm_fwcheck_entry(struct bfa_iocpf *iocpf)
bfa_ioc_hw_sem_get(iocpf->ioc); bfa_ioc_hw_sem_get(iocpf->ioc);
} }
/** /* Awaiting h/w semaphore to continue with version check. */
* Awaiting h/w semaphore to continue with version check.
*/
static void static void
bfa_iocpf_sm_fwcheck(struct bfa_iocpf *iocpf, enum iocpf_event event) bfa_iocpf_sm_fwcheck(struct bfa_iocpf *iocpf, enum iocpf_event event)
{ {
@ -683,9 +638,7 @@ bfa_iocpf_sm_fwcheck(struct bfa_iocpf *iocpf, enum iocpf_event event)
} }
} }
/** /* Notify enable completion callback */
* Notify enable completion callback
*/
static void static void
bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf *iocpf) bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf *iocpf)
{ {
@ -698,9 +651,7 @@ bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf *iocpf)
msecs_to_jiffies(BFA_IOC_TOV)); msecs_to_jiffies(BFA_IOC_TOV));
} }
/** /* Awaiting firmware version match. */
* Awaiting firmware version match.
*/
static void static void
bfa_iocpf_sm_mismatch(struct bfa_iocpf *iocpf, enum iocpf_event event) bfa_iocpf_sm_mismatch(struct bfa_iocpf *iocpf, enum iocpf_event event)
{ {
@ -727,18 +678,14 @@ bfa_iocpf_sm_mismatch(struct bfa_iocpf *iocpf, enum iocpf_event event)
} }
} }
/** /* Request for semaphore. */
* Request for semaphore.
*/
static void static void
bfa_iocpf_sm_semwait_entry(struct bfa_iocpf *iocpf) bfa_iocpf_sm_semwait_entry(struct bfa_iocpf *iocpf)
{ {
bfa_ioc_hw_sem_get(iocpf->ioc); bfa_ioc_hw_sem_get(iocpf->ioc);
} }
/** /* Awaiting semaphore for h/w initialzation. */
* Awaiting semaphore for h/w initialzation.
*/
static void static void
bfa_iocpf_sm_semwait(struct bfa_iocpf *iocpf, enum iocpf_event event) bfa_iocpf_sm_semwait(struct bfa_iocpf *iocpf, enum iocpf_event event)
{ {
@ -778,8 +725,7 @@ bfa_iocpf_sm_hwinit_entry(struct bfa_iocpf *iocpf)
bfa_ioc_reset(iocpf->ioc, false); bfa_ioc_reset(iocpf->ioc, false);
} }
/** /* Hardware is being initialized. Interrupts are enabled.
* Hardware is being initialized. Interrupts are enabled.
* Holding hardware semaphore lock. * Holding hardware semaphore lock.
*/ */
static void static void
@ -822,8 +768,7 @@ bfa_iocpf_sm_enabling_entry(struct bfa_iocpf *iocpf)
bfa_ioc_send_enable(iocpf->ioc); bfa_ioc_send_enable(iocpf->ioc);
} }
/** /* Host IOC function is being enabled, awaiting response from firmware.
* Host IOC function is being enabled, awaiting response from firmware.
* Semaphore is acquired. * Semaphore is acquired.
*/ */
static void static void
@ -896,9 +841,7 @@ bfa_iocpf_sm_disabling_entry(struct bfa_iocpf *iocpf)
bfa_ioc_send_disable(iocpf->ioc); bfa_ioc_send_disable(iocpf->ioc);
} }
/** /* IOC is being disabled */
* IOC is being disabled
*/
static void static void
bfa_iocpf_sm_disabling(struct bfa_iocpf *iocpf, enum iocpf_event event) bfa_iocpf_sm_disabling(struct bfa_iocpf *iocpf, enum iocpf_event event)
{ {
@ -935,9 +878,7 @@ bfa_iocpf_sm_disabling_sync_entry(struct bfa_iocpf *iocpf)
bfa_ioc_hw_sem_get(iocpf->ioc); bfa_ioc_hw_sem_get(iocpf->ioc);
} }
/** /* IOC hb ack request is being removed. */
* IOC hb ack request is being removed.
*/
static void static void
bfa_iocpf_sm_disabling_sync(struct bfa_iocpf *iocpf, enum iocpf_event event) bfa_iocpf_sm_disabling_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
{ {
@ -963,9 +904,7 @@ bfa_iocpf_sm_disabling_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
} }
} }
/** /* IOC disable completion entry. */
* IOC disable completion entry.
*/
static void static void
bfa_iocpf_sm_disabled_entry(struct bfa_iocpf *iocpf) bfa_iocpf_sm_disabled_entry(struct bfa_iocpf *iocpf)
{ {
@ -1000,9 +939,7 @@ bfa_iocpf_sm_initfail_sync_entry(struct bfa_iocpf *iocpf)
bfa_ioc_hw_sem_get(iocpf->ioc); bfa_ioc_hw_sem_get(iocpf->ioc);
} }
/** /* Hardware initialization failed. */
* Hardware initialization failed.
*/
static void static void
bfa_iocpf_sm_initfail_sync(struct bfa_iocpf *iocpf, enum iocpf_event event) bfa_iocpf_sm_initfail_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
{ {
@ -1046,9 +983,7 @@ bfa_iocpf_sm_initfail_entry(struct bfa_iocpf *iocpf)
{ {
} }
/** /* Hardware initialization failed. */
* Hardware initialization failed.
*/
static void static void
bfa_iocpf_sm_initfail(struct bfa_iocpf *iocpf, enum iocpf_event event) bfa_iocpf_sm_initfail(struct bfa_iocpf *iocpf, enum iocpf_event event)
{ {
@ -1084,9 +1019,7 @@ bfa_iocpf_sm_fail_sync_entry(struct bfa_iocpf *iocpf)
bfa_ioc_hw_sem_get(iocpf->ioc); bfa_ioc_hw_sem_get(iocpf->ioc);
} }
/** /* IOC is in failed state. */
* IOC is in failed state.
*/
static void static void
bfa_iocpf_sm_fail_sync(struct bfa_iocpf *iocpf, enum iocpf_event event) bfa_iocpf_sm_fail_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
{ {
@ -1134,10 +1067,7 @@ bfa_iocpf_sm_fail_entry(struct bfa_iocpf *iocpf)
{ {
} }
/** /* IOC is in failed state. */
* @brief
* IOC is in failed state.
*/
static void static void
bfa_iocpf_sm_fail(struct bfa_iocpf *iocpf, enum iocpf_event event) bfa_iocpf_sm_fail(struct bfa_iocpf *iocpf, enum iocpf_event event)
{ {
@ -1151,13 +1081,9 @@ bfa_iocpf_sm_fail(struct bfa_iocpf *iocpf, enum iocpf_event event)
} }
} }
/** /* BFA IOC private functions */
* BFA IOC private functions
*/
/** /* Notify common modules registered for notification. */
* Notify common modules registered for notification.
*/
static void static void
bfa_ioc_event_notify(struct bfa_ioc *ioc, enum bfa_ioc_event event) bfa_ioc_event_notify(struct bfa_ioc *ioc, enum bfa_ioc_event event)
{ {
@ -1298,10 +1224,7 @@ bfa_ioc_hw_sem_get_cancel(struct bfa_ioc *ioc)
del_timer(&ioc->sem_timer); del_timer(&ioc->sem_timer);
} }
/** /* Initialize LPU local memory (aka secondary memory / SRAM) */
* @brief
* Initialize LPU local memory (aka secondary memory / SRAM)
*/
static void static void
bfa_ioc_lmem_init(struct bfa_ioc *ioc) bfa_ioc_lmem_init(struct bfa_ioc *ioc)
{ {
@ -1366,9 +1289,7 @@ bfa_ioc_lpu_stop(struct bfa_ioc *ioc)
writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg); writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
} }
/** /* Get driver and firmware versions. */
* Get driver and firmware versions.
*/
void void
bfa_nw_ioc_fwver_get(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr) bfa_nw_ioc_fwver_get(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr)
{ {
@ -1388,9 +1309,7 @@ bfa_nw_ioc_fwver_get(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr)
} }
} }
/** /* Returns TRUE if same. */
* Returns TRUE if same.
*/
bool bool
bfa_nw_ioc_fwver_cmp(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr) bfa_nw_ioc_fwver_cmp(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr)
{ {
@ -1408,8 +1327,7 @@ bfa_nw_ioc_fwver_cmp(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr)
return true; return true;
} }
/** /* Return true if current running version is valid. Firmware signature and
* Return true if current running version is valid. Firmware signature and
* execution context (driver/bios) must match. * execution context (driver/bios) must match.
*/ */
static bool static bool
@ -1430,9 +1348,7 @@ bfa_ioc_fwver_valid(struct bfa_ioc *ioc, u32 boot_env)
return bfa_nw_ioc_fwver_cmp(ioc, &fwhdr); return bfa_nw_ioc_fwver_cmp(ioc, &fwhdr);
} }
/** /* Conditionally flush any pending message from firmware at start. */
* Conditionally flush any pending message from firmware at start.
*/
static void static void
bfa_ioc_msgflush(struct bfa_ioc *ioc) bfa_ioc_msgflush(struct bfa_ioc *ioc)
{ {
@ -1443,9 +1359,6 @@ bfa_ioc_msgflush(struct bfa_ioc *ioc)
writel(1, ioc->ioc_regs.lpu_mbox_cmd); writel(1, ioc->ioc_regs.lpu_mbox_cmd);
} }
/**
* @img ioc_init_logic.jpg
*/
static void static void
bfa_ioc_hwinit(struct bfa_ioc *ioc, bool force) bfa_ioc_hwinit(struct bfa_ioc *ioc, bool force)
{ {
@ -1603,10 +1516,7 @@ bfa_ioc_hb_stop(struct bfa_ioc *ioc)
del_timer(&ioc->hb_timer); del_timer(&ioc->hb_timer);
} }
/** /* Initiate a full firmware download. */
* @brief
* Initiate a full firmware download.
*/
static void static void
bfa_ioc_download_fw(struct bfa_ioc *ioc, u32 boot_type, bfa_ioc_download_fw(struct bfa_ioc *ioc, u32 boot_type,
u32 boot_env) u32 boot_env)
@ -1672,9 +1582,7 @@ bfa_ioc_reset(struct bfa_ioc *ioc, bool force)
bfa_ioc_hwinit(ioc, force); bfa_ioc_hwinit(ioc, force);
} }
/** /* BFA ioc enable reply by firmware */
* BFA ioc enable reply by firmware
*/
static void static void
bfa_ioc_enable_reply(struct bfa_ioc *ioc, enum bfa_mode port_mode, bfa_ioc_enable_reply(struct bfa_ioc *ioc, enum bfa_mode port_mode,
u8 cap_bm) u8 cap_bm)
@ -1686,10 +1594,7 @@ bfa_ioc_enable_reply(struct bfa_ioc *ioc, enum bfa_mode port_mode,
bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_ENABLE); bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_ENABLE);
} }
/** /* Update BFA configuration from firmware configuration. */
* @brief
* Update BFA configuration from firmware configuration.
*/
static void static void
bfa_ioc_getattr_reply(struct bfa_ioc *ioc) bfa_ioc_getattr_reply(struct bfa_ioc *ioc)
{ {
@ -1702,9 +1607,7 @@ bfa_ioc_getattr_reply(struct bfa_ioc *ioc)
bfa_fsm_send_event(ioc, IOC_E_FWRSP_GETATTR); bfa_fsm_send_event(ioc, IOC_E_FWRSP_GETATTR);
} }
/** /* Attach time initialization of mbox logic. */
* Attach time initialization of mbox logic.
*/
static void static void
bfa_ioc_mbox_attach(struct bfa_ioc *ioc) bfa_ioc_mbox_attach(struct bfa_ioc *ioc)
{ {
@ -1718,9 +1621,7 @@ bfa_ioc_mbox_attach(struct bfa_ioc *ioc)
} }
} }
/** /* Mbox poll timer -- restarts any pending mailbox requests. */
* Mbox poll timer -- restarts any pending mailbox requests.
*/
static void static void
bfa_ioc_mbox_poll(struct bfa_ioc *ioc) bfa_ioc_mbox_poll(struct bfa_ioc *ioc)
{ {
@ -1760,9 +1661,7 @@ bfa_ioc_mbox_poll(struct bfa_ioc *ioc)
} }
} }
/** /* Cleanup any pending requests. */
* Cleanup any pending requests.
*/
static void static void
bfa_ioc_mbox_flush(struct bfa_ioc *ioc) bfa_ioc_mbox_flush(struct bfa_ioc *ioc)
{ {
@ -1774,12 +1673,12 @@ bfa_ioc_mbox_flush(struct bfa_ioc *ioc)
} }
/** /**
* Read data from SMEM to host through PCI memmap * bfa_nw_ioc_smem_read - Read data from SMEM to host through PCI memmap
* *
* @param[in] ioc memory for IOC * @ioc: memory for IOC
* @param[in] tbuf app memory to store data from smem * @tbuf: app memory to store data from smem
* @param[in] soff smem offset * @soff: smem offset
* @param[in] sz size of smem in bytes * @sz: size of smem in bytes
*/ */
static int static int
bfa_nw_ioc_smem_read(struct bfa_ioc *ioc, void *tbuf, u32 soff, u32 sz) bfa_nw_ioc_smem_read(struct bfa_ioc *ioc, void *tbuf, u32 soff, u32 sz)
@ -1826,9 +1725,7 @@ bfa_nw_ioc_smem_read(struct bfa_ioc *ioc, void *tbuf, u32 soff, u32 sz)
return 0; return 0;
} }
/** /* Retrieve saved firmware trace from a prior IOC failure. */
* Retrieve saved firmware trace from a prior IOC failure.
*/
int int
bfa_nw_ioc_debug_fwtrc(struct bfa_ioc *ioc, void *trcdata, int *trclen) bfa_nw_ioc_debug_fwtrc(struct bfa_ioc *ioc, void *trcdata, int *trclen)
{ {
@ -1844,9 +1741,7 @@ bfa_nw_ioc_debug_fwtrc(struct bfa_ioc *ioc, void *trcdata, int *trclen)
return status; return status;
} }
/** /* Save firmware trace if configured. */
* Save firmware trace if configured.
*/
static void static void
bfa_nw_ioc_debug_save_ftrc(struct bfa_ioc *ioc) bfa_nw_ioc_debug_save_ftrc(struct bfa_ioc *ioc)
{ {
@ -1861,9 +1756,7 @@ bfa_nw_ioc_debug_save_ftrc(struct bfa_ioc *ioc)
} }
} }
/** /* Retrieve saved firmware trace from a prior IOC failure. */
* Retrieve saved firmware trace from a prior IOC failure.
*/
int int
bfa_nw_ioc_debug_fwsave(struct bfa_ioc *ioc, void *trcdata, int *trclen) bfa_nw_ioc_debug_fwsave(struct bfa_ioc *ioc, void *trcdata, int *trclen)
{ {
@ -1892,9 +1785,7 @@ bfa_ioc_fail_notify(struct bfa_ioc *ioc)
bfa_nw_ioc_debug_save_ftrc(ioc); bfa_nw_ioc_debug_save_ftrc(ioc);
} }
/** /* IOCPF to IOC interface */
* IOCPF to IOC interface
*/
static void static void
bfa_ioc_pf_enabled(struct bfa_ioc *ioc) bfa_ioc_pf_enabled(struct bfa_ioc *ioc)
{ {
@ -1928,9 +1819,7 @@ bfa_ioc_pf_fwmismatch(struct bfa_ioc *ioc)
ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE); ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
} }
/** /* IOC public */
* IOC public
*/
static enum bfa_status static enum bfa_status
bfa_ioc_pll_init(struct bfa_ioc *ioc) bfa_ioc_pll_init(struct bfa_ioc *ioc)
{ {
@ -1954,8 +1843,7 @@ bfa_ioc_pll_init(struct bfa_ioc *ioc)
return BFA_STATUS_OK; return BFA_STATUS_OK;
} }
/** /* Interface used by diag module to do firmware boot with memory test
* Interface used by diag module to do firmware boot with memory test
* as the entry vector. * as the entry vector.
*/ */
static void static void
@ -1983,9 +1871,7 @@ bfa_ioc_boot(struct bfa_ioc *ioc, enum bfi_fwboot_type boot_type,
bfa_ioc_lpu_start(ioc); bfa_ioc_lpu_start(ioc);
} }
/** /* Enable/disable IOC failure auto recovery. */
* Enable/disable IOC failure auto recovery.
*/
void void
bfa_nw_ioc_auto_recover(bool auto_recover) bfa_nw_ioc_auto_recover(bool auto_recover)
{ {
@ -2056,10 +1942,10 @@ bfa_ioc_isr(struct bfa_ioc *ioc, struct bfi_mbmsg *m)
} }
/** /**
* IOC attach time initialization and setup. * bfa_nw_ioc_attach - IOC attach time initialization and setup.
* *
* @param[in] ioc memory for IOC * @ioc: memory for IOC
* @param[in] bfa driver instance structure * @bfa: driver instance structure
*/ */
void void
bfa_nw_ioc_attach(struct bfa_ioc *ioc, void *bfa, struct bfa_ioc_cbfn *cbfn) bfa_nw_ioc_attach(struct bfa_ioc *ioc, void *bfa, struct bfa_ioc_cbfn *cbfn)
@ -2078,9 +1964,7 @@ bfa_nw_ioc_attach(struct bfa_ioc *ioc, void *bfa, struct bfa_ioc_cbfn *cbfn)
bfa_fsm_send_event(ioc, IOC_E_RESET); bfa_fsm_send_event(ioc, IOC_E_RESET);
} }
/** /* Driver detach time IOC cleanup. */
* Driver detach time IOC cleanup.
*/
void void
bfa_nw_ioc_detach(struct bfa_ioc *ioc) bfa_nw_ioc_detach(struct bfa_ioc *ioc)
{ {
@ -2091,9 +1975,9 @@ bfa_nw_ioc_detach(struct bfa_ioc *ioc)
} }
/** /**
* Setup IOC PCI properties. * bfa_nw_ioc_pci_init - Setup IOC PCI properties.
* *
* @param[in] pcidev PCI device information for this IOC * @pcidev: PCI device information for this IOC
*/ */
void void
bfa_nw_ioc_pci_init(struct bfa_ioc *ioc, struct bfa_pcidev *pcidev, bfa_nw_ioc_pci_init(struct bfa_ioc *ioc, struct bfa_pcidev *pcidev,
@ -2160,10 +2044,10 @@ bfa_nw_ioc_pci_init(struct bfa_ioc *ioc, struct bfa_pcidev *pcidev,
} }
/** /**
* Initialize IOC dma memory * bfa_nw_ioc_mem_claim - Initialize IOC dma memory
* *
* @param[in] dm_kva kernel virtual address of IOC dma memory * @dm_kva: kernel virtual address of IOC dma memory
* @param[in] dm_pa physical address of IOC dma memory * @dm_pa: physical address of IOC dma memory
*/ */
void void
bfa_nw_ioc_mem_claim(struct bfa_ioc *ioc, u8 *dm_kva, u64 dm_pa) bfa_nw_ioc_mem_claim(struct bfa_ioc *ioc, u8 *dm_kva, u64 dm_pa)
@ -2176,9 +2060,7 @@ bfa_nw_ioc_mem_claim(struct bfa_ioc *ioc, u8 *dm_kva, u64 dm_pa)
ioc->attr = (struct bfi_ioc_attr *) dm_kva; ioc->attr = (struct bfi_ioc_attr *) dm_kva;
} }
/** /* Return size of dma memory required. */
* Return size of dma memory required.
*/
u32 u32
bfa_nw_ioc_meminfo(void) bfa_nw_ioc_meminfo(void)
{ {
@ -2201,9 +2083,7 @@ bfa_nw_ioc_disable(struct bfa_ioc *ioc)
bfa_fsm_send_event(ioc, IOC_E_DISABLE); bfa_fsm_send_event(ioc, IOC_E_DISABLE);
} }
/** /* Initialize memory for saving firmware trace. */
* Initialize memory for saving firmware trace.
*/
void void
bfa_nw_ioc_debug_memclaim(struct bfa_ioc *ioc, void *dbg_fwsave) bfa_nw_ioc_debug_memclaim(struct bfa_ioc *ioc, void *dbg_fwsave)
{ {
@ -2217,9 +2097,7 @@ bfa_ioc_smem_pgnum(struct bfa_ioc *ioc, u32 fmaddr)
return PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, fmaddr); return PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, fmaddr);
} }
/** /* Register mailbox message handler function, to be called by common modules */
* Register mailbox message handler function, to be called by common modules
*/
void void
bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc, bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc,
bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg) bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg)
@ -2231,11 +2109,12 @@ bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc,
} }
/** /**
* Queue a mailbox command request to firmware. Waits if mailbox is busy. * bfa_nw_ioc_mbox_queue - Queue a mailbox command request to firmware.
* Responsibility of caller to serialize
* *
* @param[in] ioc IOC instance * @ioc: IOC instance
* @param[i] cmd Mailbox command * @cmd: Mailbox command
*
* Waits if mailbox is busy. Responsibility of caller to serialize
*/ */
bool bool
bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc, struct bfa_mbox_cmd *cmd, bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc, struct bfa_mbox_cmd *cmd,
@ -2272,9 +2151,7 @@ bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc, struct bfa_mbox_cmd *cmd,
return false; return false;
} }
/** /* Handle mailbox interrupts */
* Handle mailbox interrupts
*/
void void
bfa_nw_ioc_mbox_isr(struct bfa_ioc *ioc) bfa_nw_ioc_mbox_isr(struct bfa_ioc *ioc)
{ {
@ -2314,9 +2191,7 @@ bfa_nw_ioc_error_isr(struct bfa_ioc *ioc)
bfa_fsm_send_event(ioc, IOC_E_HWERROR); bfa_fsm_send_event(ioc, IOC_E_HWERROR);
} }
/** /* return true if IOC is disabled */
* return true if IOC is disabled
*/
bool bool
bfa_nw_ioc_is_disabled(struct bfa_ioc *ioc) bfa_nw_ioc_is_disabled(struct bfa_ioc *ioc)
{ {
@ -2324,17 +2199,14 @@ bfa_nw_ioc_is_disabled(struct bfa_ioc *ioc)
bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabled); bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabled);
} }
/** /* return true if IOC is operational */
* return true if IOC is operational
*/
bool bool
bfa_nw_ioc_is_operational(struct bfa_ioc *ioc) bfa_nw_ioc_is_operational(struct bfa_ioc *ioc)
{ {
return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_op); return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_op);
} }
/** /* Add to IOC heartbeat failure notification queue. To be used by common
* Add to IOC heartbeat failure notification queue. To be used by common
* modules such as cee, port, diag. * modules such as cee, port, diag.
*/ */
void void
@ -2518,9 +2390,7 @@ bfa_nw_ioc_get_attr(struct bfa_ioc *ioc, struct bfa_ioc_attr *ioc_attr)
bfa_ioc_get_pci_chip_rev(ioc, ioc_attr->pci_attr.chip_rev); bfa_ioc_get_pci_chip_rev(ioc, ioc_attr->pci_attr.chip_rev);
} }
/** /* WWN public */
* WWN public
*/
static u64 static u64
bfa_ioc_get_pwwn(struct bfa_ioc *ioc) bfa_ioc_get_pwwn(struct bfa_ioc *ioc)
{ {
@ -2533,9 +2403,7 @@ bfa_nw_ioc_get_mac(struct bfa_ioc *ioc)
return ioc->attr->mac; return ioc->attr->mac;
} }
/** /* Firmware failure detected. Start recovery actions. */
* Firmware failure detected. Start recovery actions.
*/
static void static void
bfa_ioc_recover(struct bfa_ioc *ioc) bfa_ioc_recover(struct bfa_ioc *ioc)
{ {
@ -2545,10 +2413,7 @@ bfa_ioc_recover(struct bfa_ioc *ioc)
bfa_fsm_send_event(ioc, IOC_E_HBFAIL); bfa_fsm_send_event(ioc, IOC_E_HBFAIL);
} }
/** /* BFA IOC PF private functions */
* @dg hal_iocpf_pvt BFA IOC PF private functions
* @{
*/
static void static void
bfa_iocpf_enable(struct bfa_ioc *ioc) bfa_iocpf_enable(struct bfa_ioc *ioc)
@ -2669,8 +2534,6 @@ bfa_flash_notify(void *cbarg, enum bfa_ioc_event event)
/* /*
* Send flash write request. * Send flash write request.
*
* @param[in] cbarg - callback argument
*/ */
static void static void
bfa_flash_write_send(struct bfa_flash *flash) bfa_flash_write_send(struct bfa_flash *flash)
@ -2699,10 +2562,10 @@ bfa_flash_write_send(struct bfa_flash *flash)
flash->offset += len; flash->offset += len;
} }
/* /**
* Send flash read request. * bfa_flash_read_send - Send flash read request.
* *
* @param[in] cbarg - callback argument * @cbarg: callback argument
*/ */
static void static void
bfa_flash_read_send(void *cbarg) bfa_flash_read_send(void *cbarg)
@ -2724,11 +2587,11 @@ bfa_flash_read_send(void *cbarg)
bfa_nw_ioc_mbox_queue(flash->ioc, &flash->mb, NULL, NULL); bfa_nw_ioc_mbox_queue(flash->ioc, &flash->mb, NULL, NULL);
} }
/* /**
* Process flash response messages upon receiving interrupts. * bfa_flash_intr - Process flash response messages upon receiving interrupts.
* *
* @param[in] flasharg - flash structure * @flasharg: flash structure
* @param[in] msg - message structure * @msg: message structure
*/ */
static void static void
bfa_flash_intr(void *flasharg, struct bfi_mbmsg *msg) bfa_flash_intr(void *flasharg, struct bfi_mbmsg *msg)
@ -2821,12 +2684,12 @@ bfa_nw_flash_meminfo(void)
return roundup(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ); return roundup(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
} }
/* /**
* Flash attach API. * bfa_nw_flash_attach - Flash attach API.
* *
* @param[in] flash - flash structure * @flash: flash structure
* @param[in] ioc - ioc structure * @ioc: ioc structure
* @param[in] dev - device structure * @dev: device structure
*/ */
void void
bfa_nw_flash_attach(struct bfa_flash *flash, struct bfa_ioc *ioc, void *dev) bfa_nw_flash_attach(struct bfa_flash *flash, struct bfa_ioc *ioc, void *dev)
@ -2842,12 +2705,12 @@ bfa_nw_flash_attach(struct bfa_flash *flash, struct bfa_ioc *ioc, void *dev)
list_add_tail(&flash->ioc_notify.qe, &flash->ioc->notify_q); list_add_tail(&flash->ioc_notify.qe, &flash->ioc->notify_q);
} }
/* /**
* Claim memory for flash * bfa_nw_flash_memclaim - Claim memory for flash
* *
* @param[in] flash - flash structure * @flash: flash structure
* @param[in] dm_kva - pointer to virtual memory address * @dm_kva: pointer to virtual memory address
* @param[in] dm_pa - physical memory address * @dm_pa: physical memory address
*/ */
void void
bfa_nw_flash_memclaim(struct bfa_flash *flash, u8 *dm_kva, u64 dm_pa) bfa_nw_flash_memclaim(struct bfa_flash *flash, u8 *dm_kva, u64 dm_pa)
@ -2859,13 +2722,13 @@ bfa_nw_flash_memclaim(struct bfa_flash *flash, u8 *dm_kva, u64 dm_pa)
dm_pa += roundup(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ); dm_pa += roundup(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
} }
/* /**
* Get flash attribute. * bfa_nw_flash_get_attr - Get flash attribute.
* *
* @param[in] flash - flash structure * @flash: flash structure
* @param[in] attr - flash attribute structure * @attr: flash attribute structure
* @param[in] cbfn - callback function * @cbfn: callback function
* @param[in] cbarg - callback argument * @cbarg: callback argument
* *
* Return status. * Return status.
*/ */
@ -2895,17 +2758,17 @@ bfa_nw_flash_get_attr(struct bfa_flash *flash, struct bfa_flash_attr *attr,
return BFA_STATUS_OK; return BFA_STATUS_OK;
} }
/* /**
* Update flash partition. * bfa_nw_flash_update_part - Update flash partition.
* *
* @param[in] flash - flash structure * @flash: flash structure
* @param[in] type - flash partition type * @type: flash partition type
* @param[in] instance - flash partition instance * @instance: flash partition instance
* @param[in] buf - update data buffer * @buf: update data buffer
* @param[in] len - data buffer length * @len: data buffer length
* @param[in] offset - offset relative to the partition starting address * @offset: offset relative to the partition starting address
* @param[in] cbfn - callback function * @cbfn: callback function
* @param[in] cbarg - callback argument * @cbarg: callback argument
* *
* Return status. * Return status.
*/ */
@ -2944,17 +2807,17 @@ bfa_nw_flash_update_part(struct bfa_flash *flash, u32 type, u8 instance,
return BFA_STATUS_OK; return BFA_STATUS_OK;
} }
/* /**
* Read flash partition. * bfa_nw_flash_read_part - Read flash partition.
* *
* @param[in] flash - flash structure * @flash: flash structure
* @param[in] type - flash partition type * @type: flash partition type
* @param[in] instance - flash partition instance * @instance: flash partition instance
* @param[in] buf - read data buffer * @buf: read data buffer
* @param[in] len - data buffer length * @len: data buffer length
* @param[in] offset - offset relative to the partition starting address * @offset: offset relative to the partition starting address
* @param[in] cbfn - callback function * @cbfn: callback function
* @param[in] cbarg - callback argument * @cbarg: callback argument
* *
* Return status. * Return status.
*/ */

43
drivers/net/ethernet/brocade/bna/bfa_ioc.h
View File

@ -30,9 +30,7 @@
#define BNA_DBG_FWTRC_LEN (BFI_IOC_TRC_ENTS * BFI_IOC_TRC_ENT_SZ + \ #define BNA_DBG_FWTRC_LEN (BFI_IOC_TRC_ENTS * BFI_IOC_TRC_ENT_SZ + \
BFI_IOC_TRC_HDR_SZ) BFI_IOC_TRC_HDR_SZ)
/** /* PCI device information required by IOC */
* PCI device information required by IOC
*/
struct bfa_pcidev { struct bfa_pcidev {
int pci_slot; int pci_slot;
u8 pci_func; u8 pci_func;
@ -41,8 +39,7 @@ struct bfa_pcidev {
void __iomem *pci_bar_kva; void __iomem *pci_bar_kva;
}; };
/** /* Structure used to remember the DMA-able memory block's KVA and Physical
* Structure used to remember the DMA-able memory block's KVA and Physical
* Address * Address
*/ */
struct bfa_dma { struct bfa_dma {
@ -52,15 +49,11 @@ struct bfa_dma {
#define BFA_DMA_ALIGN_SZ 256 #define BFA_DMA_ALIGN_SZ 256
/** /* smem size for Crossbow and Catapult */
* smem size for Crossbow and Catapult
*/
#define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */ #define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */
#define BFI_SMEM_CT_SIZE 0x280000U /* ! 2.5MB for catapult */ #define BFI_SMEM_CT_SIZE 0x280000U /* ! 2.5MB for catapult */
/** /* BFA dma address assignment macro. (big endian format) */
* @brief BFA dma address assignment macro. (big endian format)
*/
#define bfa_dma_be_addr_set(dma_addr, pa) \ #define bfa_dma_be_addr_set(dma_addr, pa) \
__bfa_dma_be_addr_set(&dma_addr, (u64)pa) __bfa_dma_be_addr_set(&dma_addr, (u64)pa)
static inline void static inline void
@ -108,9 +101,7 @@ struct bfa_ioc_regs {
u32 smem_pg0; u32 smem_pg0;
}; };
/** /* IOC Mailbox structures */
* IOC Mailbox structures
*/
typedef void (*bfa_mbox_cmd_cbfn_t)(void *cbarg); typedef void (*bfa_mbox_cmd_cbfn_t)(void *cbarg);
struct bfa_mbox_cmd { struct bfa_mbox_cmd {
struct list_head qe; struct list_head qe;
@ -119,9 +110,7 @@ struct bfa_mbox_cmd {
u32 msg[BFI_IOC_MSGSZ]; u32 msg[BFI_IOC_MSGSZ];
}; };
/** /* IOC mailbox module */
* IOC mailbox module
*/
typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg *m); typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg *m);
struct bfa_ioc_mbox_mod { struct bfa_ioc_mbox_mod {
struct list_head cmd_q; /*!< pending mbox queue */ struct list_head cmd_q; /*!< pending mbox queue */
@ -132,9 +121,7 @@ struct bfa_ioc_mbox_mod {
} mbhdlr[BFI_MC_MAX]; } mbhdlr[BFI_MC_MAX];
}; };
/** /* IOC callback function interfaces */
* IOC callback function interfaces
*/
typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status); typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status);
typedef void (*bfa_ioc_disable_cbfn_t)(void *bfa); typedef void (*bfa_ioc_disable_cbfn_t)(void *bfa);
typedef void (*bfa_ioc_hbfail_cbfn_t)(void *bfa); typedef void (*bfa_ioc_hbfail_cbfn_t)(void *bfa);
@ -146,9 +133,7 @@ struct bfa_ioc_cbfn {
bfa_ioc_reset_cbfn_t reset_cbfn; bfa_ioc_reset_cbfn_t reset_cbfn;
}; };
/** /* IOC event notification mechanism. */
* IOC event notification mechanism.
*/
enum bfa_ioc_event { enum bfa_ioc_event {
BFA_IOC_E_ENABLED = 1, BFA_IOC_E_ENABLED = 1,
BFA_IOC_E_DISABLED = 2, BFA_IOC_E_DISABLED = 2,
@ -163,9 +148,7 @@ struct bfa_ioc_notify {
void *cbarg; void *cbarg;
}; };
/** /* Initialize a IOC event notification structure */
* Initialize a IOC event notification structure
*/
#define bfa_ioc_notify_init(__notify, __cbfn, __cbarg) do { \ #define bfa_ioc_notify_init(__notify, __cbfn, __cbarg) do { \
(__notify)->cbfn = (__cbfn); \ (__notify)->cbfn = (__cbfn); \
(__notify)->cbarg = (__cbarg); \ (__notify)->cbarg = (__cbarg); \
@ -261,9 +244,7 @@ struct bfa_ioc_hwif {
#define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS) #define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS)
#define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS) #define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS)
/** /* IOC mailbox interface */
* IOC mailbox interface
*/
bool bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc, bool bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc,
struct bfa_mbox_cmd *cmd, struct bfa_mbox_cmd *cmd,
bfa_mbox_cmd_cbfn_t cbfn, void *cbarg); bfa_mbox_cmd_cbfn_t cbfn, void *cbarg);
@ -271,9 +252,7 @@ void bfa_nw_ioc_mbox_isr(struct bfa_ioc *ioc);
void bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc, void bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc,
bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg); bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg);
/** /* IOC interfaces */
* IOC interfaces
*/
#define bfa_ioc_pll_init_asic(__ioc) \ #define bfa_ioc_pll_init_asic(__ioc) \
((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \ ((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \

48
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
View File

@ -87,9 +87,7 @@ static const struct bfa_ioc_hwif nw_hwif_ct2 = {
.ioc_sync_complete = bfa_ioc_ct_sync_complete, .ioc_sync_complete = bfa_ioc_ct_sync_complete,
}; };
/** /* Called from bfa_ioc_attach() to map asic specific calls. */
* Called from bfa_ioc_attach() to map asic specific calls.
*/
void void
bfa_nw_ioc_set_ct_hwif(struct bfa_ioc *ioc) bfa_nw_ioc_set_ct_hwif(struct bfa_ioc *ioc)
{ {
@ -102,9 +100,7 @@ bfa_nw_ioc_set_ct2_hwif(struct bfa_ioc *ioc)
ioc->ioc_hwif = &nw_hwif_ct2; ioc->ioc_hwif = &nw_hwif_ct2;
} }
/** /* Return true if firmware of current driver matches the running firmware. */
* Return true if firmware of current driver matches the running firmware.
*/
static bool static bool
bfa_ioc_ct_firmware_lock(struct bfa_ioc *ioc) bfa_ioc_ct_firmware_lock(struct bfa_ioc *ioc)
{ {
@ -182,9 +178,7 @@ bfa_ioc_ct_firmware_unlock(struct bfa_ioc *ioc)
bfa_nw_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg); bfa_nw_ioc_sem_release(ioc->ioc_regs.ioc_usage_sem_reg);
} }
/** /* Notify other functions on HB failure. */
* Notify other functions on HB failure.
*/
static void static void
bfa_ioc_ct_notify_fail(struct bfa_ioc *ioc) bfa_ioc_ct_notify_fail(struct bfa_ioc *ioc)
{ {
@ -195,9 +189,7 @@ bfa_ioc_ct_notify_fail(struct bfa_ioc *ioc)
readl(ioc->ioc_regs.alt_ll_halt); readl(ioc->ioc_regs.alt_ll_halt);
} }
/** /* Host to LPU mailbox message addresses */
* Host to LPU mailbox message addresses
*/
static const struct { static const struct {
u32 hfn_mbox; u32 hfn_mbox;
u32 lpu_mbox; u32 lpu_mbox;
@ -209,9 +201,7 @@ static const struct {
{ HOSTFN3_LPU_MBOX0_8, LPU_HOSTFN3_MBOX0_8, HOST_PAGE_NUM_FN3 } { HOSTFN3_LPU_MBOX0_8, LPU_HOSTFN3_MBOX0_8, HOST_PAGE_NUM_FN3 }
}; };
/** /* Host <-> LPU mailbox command/status registers - port 0 */
* Host <-> LPU mailbox command/status registers - port 0
*/
static const struct { static const struct {
u32 hfn; u32 hfn;
u32 lpu; u32 lpu;
@ -222,9 +212,7 @@ static const struct {
{ HOSTFN3_LPU0_CMD_STAT, LPU0_HOSTFN3_CMD_STAT } { HOSTFN3_LPU0_CMD_STAT, LPU0_HOSTFN3_CMD_STAT }
}; };
/** /* Host <-> LPU mailbox command/status registers - port 1 */
* Host <-> LPU mailbox command/status registers - port 1
*/
static const struct { static const struct {
u32 hfn; u32 hfn;
u32 lpu; u32 lpu;
@ -368,9 +356,7 @@ bfa_ioc_ct2_reg_init(struct bfa_ioc *ioc)
ioc->ioc_regs.err_set = rb + ERR_SET_REG; ioc->ioc_regs.err_set = rb + ERR_SET_REG;
} }
/** /* Initialize IOC to port mapping. */
* Initialize IOC to port mapping.
*/
#define FNC_PERS_FN_SHIFT(__fn) ((__fn) * 8) #define FNC_PERS_FN_SHIFT(__fn) ((__fn) * 8)
static void static void
@ -398,9 +384,7 @@ bfa_ioc_ct2_map_port(struct bfa_ioc *ioc)
ioc->port_id = ((r32 & __FC_LL_PORT_MAP__MK) >> __FC_LL_PORT_MAP__SH); ioc->port_id = ((r32 & __FC_LL_PORT_MAP__MK) >> __FC_LL_PORT_MAP__SH);
} }
/** /* Set interrupt mode for a function: INTX or MSIX */
* Set interrupt mode for a function: INTX or MSIX
*/
static void static void
bfa_ioc_ct_isr_mode_set(struct bfa_ioc *ioc, bool msix) bfa_ioc_ct_isr_mode_set(struct bfa_ioc *ioc, bool msix)
{ {
@ -443,9 +427,7 @@ bfa_ioc_ct2_lpu_read_stat(struct bfa_ioc *ioc)
return false; return false;
} }
/** /* MSI-X resource allocation for 1860 with no asic block */
* MSI-X resource allocation for 1860 with no asic block
*/
#define HOSTFN_MSIX_DEFAULT 64 #define HOSTFN_MSIX_DEFAULT 64
#define HOSTFN_MSIX_VT_INDEX_MBOX_ERR 0x30138 #define HOSTFN_MSIX_VT_INDEX_MBOX_ERR 0x30138
#define HOSTFN_MSIX_VT_OFST_NUMVT 0x3013c #define HOSTFN_MSIX_VT_OFST_NUMVT 0x3013c
@ -473,9 +455,7 @@ bfa_nw_ioc_ct2_poweron(struct bfa_ioc *ioc)
rb + HOSTFN_MSIX_VT_INDEX_MBOX_ERR); rb + HOSTFN_MSIX_VT_INDEX_MBOX_ERR);
} }
/** /* Cleanup hw semaphore and usecnt registers */
* Cleanup hw semaphore and usecnt registers
*/
static void static void
bfa_ioc_ct_ownership_reset(struct bfa_ioc *ioc) bfa_ioc_ct_ownership_reset(struct bfa_ioc *ioc)
{ {
@ -492,9 +472,7 @@ bfa_ioc_ct_ownership_reset(struct bfa_ioc *ioc)
bfa_nw_ioc_hw_sem_release(ioc); bfa_nw_ioc_hw_sem_release(ioc);
} }
/** /* Synchronized IOC failure processing routines */
* Synchronized IOC failure processing routines
*/
static bool static bool
bfa_ioc_ct_sync_start(struct bfa_ioc *ioc) bfa_ioc_ct_sync_start(struct bfa_ioc *ioc)
{ {
@ -518,9 +496,7 @@ bfa_ioc_ct_sync_start(struct bfa_ioc *ioc)
return bfa_ioc_ct_sync_complete(ioc); return bfa_ioc_ct_sync_complete(ioc);
} }
/** /* Synchronized IOC failure processing routines */
* Synchronized IOC failure processing routines
*/
static void static void
bfa_ioc_ct_sync_join(struct bfa_ioc *ioc) bfa_ioc_ct_sync_join(struct bfa_ioc *ioc)
{ {

4
drivers/net/ethernet/brocade/bna/bfa_msgq.c
View File

@ -16,9 +16,7 @@
* www.brocade.com * www.brocade.com
*/ */
/** /* MSGQ module source file. */
* @file bfa_msgq.c MSGQ module source file.
*/
#include "bfi.h" #include "bfi.h"
#include "bfa_msgq.h" #include "bfa_msgq.h"

81
drivers/net/ethernet/brocade/bna/bfi.h
View File

@ -22,15 +22,11 @@
#pragma pack(1) #pragma pack(1)
/** /* BFI FW image type */
* BFI FW image type
*/
#define BFI_FLASH_CHUNK_SZ 256 /*!< Flash chunk size */ #define BFI_FLASH_CHUNK_SZ 256 /*!< Flash chunk size */
#define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32)) #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
/** /* Msg header common to all msgs */
* Msg header common to all msgs
*/
struct bfi_mhdr { struct bfi_mhdr {
u8 msg_class; /*!< @ref enum bfi_mclass */ u8 msg_class; /*!< @ref enum bfi_mclass */
u8 msg_id; /*!< msg opcode with in the class */ u8 msg_id; /*!< msg opcode with in the class */
@ -65,17 +61,14 @@ struct bfi_mhdr {
#define BFI_I2H_OPCODE_BASE 128 #define BFI_I2H_OPCODE_BASE 128
#define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE) #define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
/** /****************************************************************************
****************************************************************************
* *
* Scatter Gather Element and Page definition * Scatter Gather Element and Page definition
* *
**************************************************************************** ****************************************************************************
*/ */
/** /* DMA addresses */
* DMA addresses
*/
union bfi_addr_u { union bfi_addr_u {
struct { struct {
u32 addr_lo; u32 addr_lo;
@ -83,9 +76,7 @@ union bfi_addr_u {
} a32; } a32;
}; };
/** /* Generic DMA addr-len pair. */
* Generic DMA addr-len pair.
*/
struct bfi_alen { struct bfi_alen {
union bfi_addr_u al_addr; /* DMA addr of buffer */ union bfi_addr_u al_addr; /* DMA addr of buffer */
u32 al_len; /* length of buffer */ u32 al_len; /* length of buffer */
@ -98,26 +89,20 @@ struct bfi_alen {
#define BFI_LMSG_PL_WSZ \ #define BFI_LMSG_PL_WSZ \
((BFI_LMSG_SZ - sizeof(struct bfi_mhdr)) / 4) ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr)) / 4)
/** /* Mailbox message structure */
* Mailbox message structure
*/
#define BFI_MBMSG_SZ 7 #define BFI_MBMSG_SZ 7
struct bfi_mbmsg { struct bfi_mbmsg {
struct bfi_mhdr mh; struct bfi_mhdr mh;
u32 pl[BFI_MBMSG_SZ]; u32 pl[BFI_MBMSG_SZ];
}; };
/** /* Supported PCI function class codes (personality) */
* Supported PCI function class codes (personality)
*/
enum bfi_pcifn_class { enum bfi_pcifn_class {
BFI_PCIFN_CLASS_FC = 0x0c04, BFI_PCIFN_CLASS_FC = 0x0c04,
BFI_PCIFN_CLASS_ETH = 0x0200, BFI_PCIFN_CLASS_ETH = 0x0200,
}; };
/** /* Message Classes */
* Message Classes
*/
enum bfi_mclass { enum bfi_mclass {
BFI_MC_IOC = 1, /*!< IO Controller (IOC) */ BFI_MC_IOC = 1, /*!< IO Controller (IOC) */
BFI_MC_DIAG = 2, /*!< Diagnostic Msgs */ BFI_MC_DIAG = 2, /*!< Diagnostic Msgs */
@ -159,15 +144,12 @@ enum bfi_mclass {
#define BFI_FWBOOT_ENV_OS 0 #define BFI_FWBOOT_ENV_OS 0
/** /*----------------------------------------------------------------------
*----------------------------------------------------------------------
* IOC * IOC
*---------------------------------------------------------------------- *----------------------------------------------------------------------
*/ */
/** /* Different asic generations */
* Different asic generations
*/
enum bfi_asic_gen { enum bfi_asic_gen {
BFI_ASIC_GEN_CB = 1, BFI_ASIC_GEN_CB = 1,
BFI_ASIC_GEN_CT = 2, BFI_ASIC_GEN_CT = 2,
@ -196,9 +178,7 @@ enum bfi_ioc_i2h_msgs {
BFI_IOC_I2H_HBEAT = BFA_I2HM(4), BFI_IOC_I2H_HBEAT = BFA_I2HM(4),
}; };
/** /* BFI_IOC_H2I_GETATTR_REQ message */
* BFI_IOC_H2I_GETATTR_REQ message
*/
struct bfi_ioc_getattr_req { struct bfi_ioc_getattr_req {
struct bfi_mhdr mh; struct bfi_mhdr mh;
union bfi_addr_u attr_addr; union bfi_addr_u attr_addr;
@ -231,30 +211,22 @@ struct bfi_ioc_attr {
u32 card_type; /*!< card type */ u32 card_type; /*!< card type */
}; };
/** /* BFI_IOC_I2H_GETATTR_REPLY message */
* BFI_IOC_I2H_GETATTR_REPLY message
*/
struct bfi_ioc_getattr_reply { struct bfi_ioc_getattr_reply {
struct bfi_mhdr mh; /*!< Common msg header */ struct bfi_mhdr mh; /*!< Common msg header */
u8 status; /*!< cfg reply status */ u8 status; /*!< cfg reply status */
u8 rsvd[3]; u8 rsvd[3];
}; };
/** /* Firmware memory page offsets */
* Firmware memory page offsets
*/
#define BFI_IOC_SMEM_PG0_CB (0x40) #define BFI_IOC_SMEM_PG0_CB (0x40)
#define BFI_IOC_SMEM_PG0_CT (0x180) #define BFI_IOC_SMEM_PG0_CT (0x180)
/** /* Firmware statistic offset */
* Firmware statistic offset
*/
#define BFI_IOC_FWSTATS_OFF (0x6B40) #define BFI_IOC_FWSTATS_OFF (0x6B40)
#define BFI_IOC_FWSTATS_SZ (4096) #define BFI_IOC_FWSTATS_SZ (4096)
/** /* Firmware trace offset */
* Firmware trace offset
*/
#define BFI_IOC_TRC_OFF (0x4b00) #define BFI_IOC_TRC_OFF (0x4b00)
#define BFI_IOC_TRC_ENTS 256 #define BFI_IOC_TRC_ENTS 256
#define BFI_IOC_TRC_ENT_SZ 16 #define BFI_IOC_TRC_ENT_SZ 16
@ -299,9 +271,7 @@ struct bfi_ioc_hbeat {
u32 hb_count; /*!< current heart beat count */ u32 hb_count; /*!< current heart beat count */
}; };
/** /* IOC hardware/firmware state */
* IOC hardware/firmware state
*/
enum bfi_ioc_state { enum bfi_ioc_state {
BFI_IOC_UNINIT = 0, /*!< not initialized */ BFI_IOC_UNINIT = 0, /*!< not initialized */
BFI_IOC_INITING = 1, /*!< h/w is being initialized */ BFI_IOC_INITING = 1, /*!< h/w is being initialized */
@ -345,9 +315,7 @@ enum {
((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \ ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
BFI_ADAPTER_UNSUPP)) BFI_ADAPTER_UNSUPP))
/** /* BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages */
* BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
*/
struct bfi_ioc_ctrl_req { struct bfi_ioc_ctrl_req {
struct bfi_mhdr mh; struct bfi_mhdr mh;
u16 clscode; u16 clscode;
@ -355,9 +323,7 @@ struct bfi_ioc_ctrl_req {
u32 tv_sec; u32 tv_sec;
}; };
/** /* BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages */
* BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
*/
struct bfi_ioc_ctrl_reply { struct bfi_ioc_ctrl_reply {
struct bfi_mhdr mh; /*!< Common msg header */ struct bfi_mhdr mh; /*!< Common msg header */
u8 status; /*!< enable/disable status */ u8 status; /*!< enable/disable status */
@ -367,9 +333,7 @@ struct bfi_ioc_ctrl_reply {
}; };
#define BFI_IOC_MSGSZ 8 #define BFI_IOC_MSGSZ 8
/** /* H2I Messages */
* H2I Messages
*/
union bfi_ioc_h2i_msg_u { union bfi_ioc_h2i_msg_u {
struct bfi_mhdr mh; struct bfi_mhdr mh;
struct bfi_ioc_ctrl_req enable_req; struct bfi_ioc_ctrl_req enable_req;
@ -378,17 +342,14 @@ union bfi_ioc_h2i_msg_u {
u32 mboxmsg[BFI_IOC_MSGSZ]; u32 mboxmsg[BFI_IOC_MSGSZ];
}; };
/** /* I2H Messages */
* I2H Messages
*/
union bfi_ioc_i2h_msg_u { union bfi_ioc_i2h_msg_u {
struct bfi_mhdr mh; struct bfi_mhdr mh;
struct bfi_ioc_ctrl_reply fw_event; struct bfi_ioc_ctrl_reply fw_event;
u32 mboxmsg[BFI_IOC_MSGSZ]; u32 mboxmsg[BFI_IOC_MSGSZ];
}; };
/** /*----------------------------------------------------------------------
*----------------------------------------------------------------------
* MSGQ * MSGQ
*---------------------------------------------------------------------- *----------------------------------------------------------------------
*/ */

42
drivers/net/ethernet/brocade/bna/bfi_cna.h
View File

@ -37,18 +37,14 @@ enum bfi_port_i2h {
BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4), BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4),
}; };
/** /* Generic REQ type */
* Generic REQ type
*/
struct bfi_port_generic_req { struct bfi_port_generic_req {
struct bfi_mhdr mh; /*!< msg header */ struct bfi_mhdr mh; /*!< msg header */
u32 msgtag; /*!< msgtag for reply */ u32 msgtag; /*!< msgtag for reply */
u32 rsvd; u32 rsvd;
}; };
/** /* Generic RSP type */
* Generic RSP type
*/
struct bfi_port_generic_rsp { struct bfi_port_generic_rsp {
struct bfi_mhdr mh; /*!< common msg header */ struct bfi_mhdr mh; /*!< common msg header */
u8 status; /*!< port enable status */ u8 status; /*!< port enable status */
@ -56,44 +52,12 @@ struct bfi_port_generic_rsp {
u32 msgtag; /*!< msgtag for reply */ u32 msgtag; /*!< msgtag for reply */
}; };
/** /* BFI_PORT_H2I_GET_STATS_REQ */
* @todo
* BFI_PORT_H2I_ENABLE_REQ
*/
/**
* @todo
* BFI_PORT_I2H_ENABLE_RSP
*/
/**
* BFI_PORT_H2I_DISABLE_REQ
*/
/**
* BFI_PORT_I2H_DISABLE_RSP
*/
/**
* BFI_PORT_H2I_GET_STATS_REQ
*/
struct bfi_port_get_stats_req { struct bfi_port_get_stats_req {
struct bfi_mhdr mh; /*!< common msg header */ struct bfi_mhdr mh; /*!< common msg header */
union bfi_addr_u dma_addr; union bfi_addr_u dma_addr;
}; };
/**
* BFI_PORT_I2H_GET_STATS_RSP
*/
/**
* BFI_PORT_H2I_CLEAR_STATS_REQ
*/
/**
* BFI_PORT_I2H_CLEAR_STATS_RSP
*/
union bfi_port_h2i_msg_u { union bfi_port_h2i_msg_u {
struct bfi_mhdr mh; struct bfi_mhdr mh;
struct bfi_port_generic_req enable_req; struct bfi_port_generic_req enable_req;

107
drivers/net/ethernet/brocade/bna/bfi_enet.h
View File

@ -16,12 +16,9 @@
* www.brocade.com * www.brocade.com
*/ */
/** /* BNA Hardware and Firmware Interface */
* @file bfi_enet.h BNA Hardware and Firmware Interface
*/
/** /* Skipping statistics collection to avoid clutter.
* Skipping statistics collection to avoid clutter.
* Command is no longer needed: * Command is no longer needed:
* MTU * MTU
* TxQ Stop * TxQ Stop
@ -64,9 +61,7 @@ union bfi_addr_be_u {
} a32; } a32;
}; };
/** /* T X Q U E U E D E F I N E S */
* T X Q U E U E D E F I N E S
*/
/* TxQ Vector (a.k.a. Tx-Buffer Descriptor) */ /* TxQ Vector (a.k.a. Tx-Buffer Descriptor) */
/* TxQ Entry Opcodes */ /* TxQ Entry Opcodes */
#define BFI_ENET_TXQ_WI_SEND (0x402) /* Single Frame Transmission */ #define BFI_ENET_TXQ_WI_SEND (0x402) /* Single Frame Transmission */
@ -106,10 +101,7 @@ struct bfi_enet_txq_wi_vector { /* Tx Buffer Descriptor */
union bfi_addr_be_u addr; union bfi_addr_be_u addr;
}; };
/** /* TxQ Entry Structure */
* TxQ Entry Structure
*
*/
struct bfi_enet_txq_entry { struct bfi_enet_txq_entry {
union { union {
struct bfi_enet_txq_wi_base base; struct bfi_enet_txq_wi_base base;
@ -124,16 +116,12 @@ struct bfi_enet_txq_entry {
#define BFI_ENET_TXQ_WI_L4_HDR_N_OFFSET(_hdr_size, _offset) \ #define BFI_ENET_TXQ_WI_L4_HDR_N_OFFSET(_hdr_size, _offset) \
(((_hdr_size) << 10) | ((_offset) & 0x3FF)) (((_hdr_size) << 10) | ((_offset) & 0x3FF))
/** /* R X Q U E U E D E F I N E S */
* R X Q U E U E D E F I N E S
*/
struct bfi_enet_rxq_entry { struct bfi_enet_rxq_entry {
union bfi_addr_be_u rx_buffer; union bfi_addr_be_u rx_buffer;
}; };
/** /* R X C O M P L E T I O N Q U E U E D E F I N E S */
* R X C O M P L E T I O N Q U E U E D E F I N E S
*/
/* CQ Entry Flags */ /* CQ Entry Flags */
#define BFI_ENET_CQ_EF_MAC_ERROR (1 << 0) #define BFI_ENET_CQ_EF_MAC_ERROR (1 << 0)
#define BFI_ENET_CQ_EF_FCS_ERROR (1 << 1) #define BFI_ENET_CQ_EF_FCS_ERROR (1 << 1)
@ -174,9 +162,7 @@ struct bfi_enet_cq_entry {
u8 rxq_id; u8 rxq_id;
}; };
/** /* E N E T C O N T R O L P A T H C O M M A N D S */
* E N E T C O N T R O L P A T H C O M M A N D S
*/
struct bfi_enet_q { struct bfi_enet_q {
union bfi_addr_u pg_tbl; union bfi_addr_u pg_tbl;
union bfi_addr_u first_entry; union bfi_addr_u first_entry;
@ -222,9 +208,7 @@ struct bfi_enet_ib {
u16 rsvd; u16 rsvd;
}; };
/** /* ENET command messages */
* ENET command messages
*/
enum bfi_enet_h2i_msgs { enum bfi_enet_h2i_msgs {
/* Rx Commands */ /* Rx Commands */
BFI_ENET_H2I_RX_CFG_SET_REQ = 1, BFI_ENET_H2I_RX_CFG_SET_REQ = 1,
@ -350,9 +334,7 @@ enum bfi_enet_i2h_msgs {
BFI_ENET_I2H_BW_UPDATE_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 4), BFI_ENET_I2H_BW_UPDATE_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 4),
}; };
/** /* The following error codes can be returned by the enet commands */
* The following error codes can be returned by the enet commands
*/
enum bfi_enet_err { enum bfi_enet_err {
BFI_ENET_CMD_OK = 0, BFI_ENET_CMD_OK = 0,
BFI_ENET_CMD_FAIL = 1, BFI_ENET_CMD_FAIL = 1,
@ -364,8 +346,7 @@ enum bfi_enet_err {
BFI_ENET_CMD_PORT_DISABLED = 7, /* !< port in disabled state */ BFI_ENET_CMD_PORT_DISABLED = 7, /* !< port in disabled state */
}; };
/** /* Generic Request
* Generic Request
* *
* bfi_enet_req is used by: * bfi_enet_req is used by:
* BFI_ENET_H2I_RX_CFG_CLR_REQ * BFI_ENET_H2I_RX_CFG_CLR_REQ
@ -375,8 +356,7 @@ struct bfi_enet_req {
struct bfi_msgq_mhdr mh; struct bfi_msgq_mhdr mh;
}; };
/** /* Enable/Disable Request
* Enable/Disable Request
* *
* bfi_enet_enable_req is used by: * bfi_enet_enable_req is used by:
* BFI_ENET_H2I_RSS_ENABLE_REQ (enet_id must be zero) * BFI_ENET_H2I_RSS_ENABLE_REQ (enet_id must be zero)
@ -391,9 +371,7 @@ struct bfi_enet_enable_req {
u8 rsvd[3]; u8 rsvd[3];
}; };
/** /* Generic Response */
* Generic Response
*/
struct bfi_enet_rsp { struct bfi_enet_rsp {
struct bfi_msgq_mhdr mh; struct bfi_msgq_mhdr mh;
u8 error; /*!< if error see cmd_offset */ u8 error; /*!< if error see cmd_offset */
@ -401,20 +379,16 @@ struct bfi_enet_rsp {
u16 cmd_offset; /*!< offset to invalid parameter */ u16 cmd_offset; /*!< offset to invalid parameter */
}; };
/** /* GLOBAL CONFIGURATION */
* GLOBAL CONFIGURATION
*/
/** /* bfi_enet_attr_req is used by:
* bfi_enet_attr_req is used by:
* BFI_ENET_H2I_GET_ATTR_REQ * BFI_ENET_H2I_GET_ATTR_REQ
*/ */
struct bfi_enet_attr_req { struct bfi_enet_attr_req {
struct bfi_msgq_mhdr mh; struct bfi_msgq_mhdr mh;
}; };
/** /* bfi_enet_attr_rsp is used by:
* bfi_enet_attr_rsp is used by:
* BFI_ENET_I2H_GET_ATTR_RSP * BFI_ENET_I2H_GET_ATTR_RSP
*/ */
struct bfi_enet_attr_rsp { struct bfi_enet_attr_rsp {
@ -427,8 +401,7 @@ struct bfi_enet_attr_rsp {
u32 rit_size; u32 rit_size;
}; };
/** /* Tx Configuration
* Tx Configuration
* *
* bfi_enet_tx_cfg is used by: * bfi_enet_tx_cfg is used by:
* BFI_ENET_H2I_TX_CFG_SET_REQ * BFI_ENET_H2I_TX_CFG_SET_REQ
@ -477,8 +450,7 @@ struct bfi_enet_tx_cfg_rsp {
} q_handles[BFI_ENET_TXQ_PRIO_MAX]; } q_handles[BFI_ENET_TXQ_PRIO_MAX];
}; };
/** /* Rx Configuration
* Rx Configuration
* *
* bfi_enet_rx_cfg is used by: * bfi_enet_rx_cfg is used by:
* BFI_ENET_H2I_RX_CFG_SET_REQ * BFI_ENET_H2I_RX_CFG_SET_REQ
@ -553,8 +525,7 @@ struct bfi_enet_rx_cfg_rsp {
} q_handles[BFI_ENET_RX_QSET_MAX]; } q_handles[BFI_ENET_RX_QSET_MAX];
}; };
/** /* RIT
* RIT
* *
* bfi_enet_rit_req is used by: * bfi_enet_rit_req is used by:
* BFI_ENET_H2I_RIT_CFG_REQ * BFI_ENET_H2I_RIT_CFG_REQ
@ -566,8 +537,7 @@ struct bfi_enet_rit_req {
u8 table[BFI_ENET_RSS_RIT_MAX]; u8 table[BFI_ENET_RSS_RIT_MAX];
}; };
/** /* RSS
* RSS
* *
* bfi_enet_rss_cfg_req is used by: * bfi_enet_rss_cfg_req is used by:
* BFI_ENET_H2I_RSS_CFG_REQ * BFI_ENET_H2I_RSS_CFG_REQ
@ -591,8 +561,7 @@ struct bfi_enet_rss_cfg_req {
struct bfi_enet_rss_cfg cfg; struct bfi_enet_rss_cfg cfg;
}; };
/** /* MAC Unicast
* MAC Unicast
* *
* bfi_enet_rx_vlan_req is used by: * bfi_enet_rx_vlan_req is used by:
* BFI_ENET_H2I_MAC_UCAST_SET_REQ * BFI_ENET_H2I_MAC_UCAST_SET_REQ
@ -606,17 +575,14 @@ struct bfi_enet_ucast_req {
u8 rsvd[2]; u8 rsvd[2];
}; };
/** /* MAC Unicast + VLAN */
* MAC Unicast + VLAN
*/
struct bfi_enet_mac_n_vlan_req { struct bfi_enet_mac_n_vlan_req {
struct bfi_msgq_mhdr mh; struct bfi_msgq_mhdr mh;
u16 vlan_id; u16 vlan_id;
mac_t mac_addr; mac_t mac_addr;
}; };
/** /* MAC Multicast
* MAC Multicast
* *
* bfi_enet_mac_mfilter_add_req is used by: * bfi_enet_mac_mfilter_add_req is used by:
* BFI_ENET_H2I_MAC_MCAST_ADD_REQ * BFI_ENET_H2I_MAC_MCAST_ADD_REQ
@ -627,8 +593,7 @@ struct bfi_enet_mcast_add_req {
u8 rsvd[2]; u8 rsvd[2];
}; };
/** /* bfi_enet_mac_mfilter_add_rsp is used by:
* bfi_enet_mac_mfilter_add_rsp is used by:
* BFI_ENET_I2H_MAC_MCAST_ADD_RSP * BFI_ENET_I2H_MAC_MCAST_ADD_RSP
*/ */
struct bfi_enet_mcast_add_rsp { struct bfi_enet_mcast_add_rsp {
@ -640,8 +605,7 @@ struct bfi_enet_mcast_add_rsp {
u8 rsvd1[2]; u8 rsvd1[2];
}; };
/** /* bfi_enet_mac_mfilter_del_req is used by:
* bfi_enet_mac_mfilter_del_req is used by:
* BFI_ENET_H2I_MAC_MCAST_DEL_REQ * BFI_ENET_H2I_MAC_MCAST_DEL_REQ
*/ */
struct bfi_enet_mcast_del_req { struct bfi_enet_mcast_del_req {
@ -650,8 +614,7 @@ struct bfi_enet_mcast_del_req {
u8 rsvd[2]; u8 rsvd[2];
}; };
/** /* VLAN
* VLAN
* *
* bfi_enet_rx_vlan_req is used by: * bfi_enet_rx_vlan_req is used by:
* BFI_ENET_H2I_RX_VLAN_SET_REQ * BFI_ENET_H2I_RX_VLAN_SET_REQ
@ -663,8 +626,7 @@ struct bfi_enet_rx_vlan_req {
u32 bit_mask[BFI_ENET_VLAN_WORDS_MAX]; u32 bit_mask[BFI_ENET_VLAN_WORDS_MAX];
}; };
/** /* PAUSE
* PAUSE
* *
* bfi_enet_set_pause_req is used by: * bfi_enet_set_pause_req is used by:
* BFI_ENET_H2I_SET_PAUSE_REQ * BFI_ENET_H2I_SET_PAUSE_REQ
@ -676,8 +638,7 @@ struct bfi_enet_set_pause_req {
u8 rx_pause; /* 1 = enable; 0 = disable */ u8 rx_pause; /* 1 = enable; 0 = disable */
}; };
/** /* DIAGNOSTICS
* DIAGNOSTICS
* *
* bfi_enet_diag_lb_req is used by: * bfi_enet_diag_lb_req is used by:
* BFI_ENET_H2I_DIAG_LOOPBACK * BFI_ENET_H2I_DIAG_LOOPBACK
@ -689,16 +650,13 @@ struct bfi_enet_diag_lb_req {
u8 enable; /* 1 = enable; 0 = disable */ u8 enable; /* 1 = enable; 0 = disable */
}; };
/** /* enum for Loopback opmodes */
* enum for Loopback opmodes
*/
enum { enum {
BFI_ENET_DIAG_LB_OPMODE_EXT = 0, BFI_ENET_DIAG_LB_OPMODE_EXT = 0,
BFI_ENET_DIAG_LB_OPMODE_CBL = 1, BFI_ENET_DIAG_LB_OPMODE_CBL = 1,
}; };
/** /* STATISTICS
* STATISTICS
* *
* bfi_enet_stats_req is used by: * bfi_enet_stats_req is used by:
* BFI_ENET_H2I_STATS_GET_REQ * BFI_ENET_H2I_STATS_GET_REQ
@ -713,9 +671,7 @@ struct bfi_enet_stats_req {
union bfi_addr_u host_buffer; union bfi_addr_u host_buffer;
}; };
/** /* defines for "stats_mask" above. */
* defines for "stats_mask" above.
*/
#define BFI_ENET_STATS_MAC (1 << 0) /* !< MAC Statistics */ #define BFI_ENET_STATS_MAC (1 << 0) /* !< MAC Statistics */
#define BFI_ENET_STATS_BPC (1 << 1) /* !< Pause Stats from BPC */ #define BFI_ENET_STATS_BPC (1 << 1) /* !< Pause Stats from BPC */
#define BFI_ENET_STATS_RAD (1 << 2) /* !< Rx Admission Statistics */ #define BFI_ENET_STATS_RAD (1 << 2) /* !< Rx Admission Statistics */
@ -881,8 +837,7 @@ struct bfi_enet_stats_mac {
u64 tx_fragments; u64 tx_fragments;
}; };
/** /* Complete statistics, DMAed from fw to host followed by
* Complete statistics, DMAed from fw to host followed by
* BFI_ENET_I2H_STATS_GET_RSP * BFI_ENET_I2H_STATS_GET_RSP
*/ */
struct bfi_enet_stats { struct bfi_enet_stats {

4
drivers/net/ethernet/brocade/bna/bfi_reg.h
View File

@ -221,9 +221,7 @@ enum {
#define __PMM_1T_RESET_P 0x00000001 #define __PMM_1T_RESET_P 0x00000001
#define PMM_1T_RESET_REG_P1 0x00023c1c #define PMM_1T_RESET_REG_P1 0x00023c1c
/** /* Brocade 1860 Adapter specific defines */
* Brocade 1860 Adapter specific defines
*/
#define CT2_PCI_CPQ_BASE 0x00030000 #define CT2_PCI_CPQ_BASE 0x00030000
#define CT2_PCI_APP_BASE 0x00030100 #define CT2_PCI_APP_BASE 0x00030100
#define CT2_PCI_ETH_BASE 0x00030400 #define CT2_PCI_ETH_BASE 0x00030400

51
drivers/net/ethernet/brocade/bna/bna.h
View File

@ -25,11 +25,7 @@
extern const u32 bna_napi_dim_vector[][BNA_BIAS_T_MAX]; extern const u32 bna_napi_dim_vector[][BNA_BIAS_T_MAX];
/** /* Macros and constants */
*
* Macros and constants
*
*/
#define BNA_IOC_TIMER_FREQ 200 #define BNA_IOC_TIMER_FREQ 200
@ -356,11 +352,7 @@ do { \
} \ } \
} while (0) } while (0)
/** /* Inline functions */
*
* Inline functions
*
*/
static inline struct bna_mac *bna_mac_find(struct list_head *q, u8 *addr) static inline struct bna_mac *bna_mac_find(struct list_head *q, u8 *addr)
{ {
@ -377,15 +369,9 @@ static inline struct bna_mac *bna_mac_find(struct list_head *q, u8 *addr)
#define bna_attr(_bna) (&(_bna)->ioceth.attr) #define bna_attr(_bna) (&(_bna)->ioceth.attr)
/** /* Function prototypes */
*
* Function prototypes
*
*/
/** /* BNA */
* BNA
*/
/* FW response handlers */ /* FW response handlers */
void bna_bfi_stats_clr_rsp(struct bna *bna, struct bfi_msgq_mhdr *msghdr); void bna_bfi_stats_clr_rsp(struct bna *bna, struct bfi_msgq_mhdr *msghdr);
@ -413,24 +399,19 @@ struct bna_mcam_handle *bna_mcam_mod_handle_get(struct bna_mcam_mod *mod);
void bna_mcam_mod_handle_put(struct bna_mcam_mod *mcam_mod, void bna_mcam_mod_handle_put(struct bna_mcam_mod *mcam_mod,
struct bna_mcam_handle *handle); struct bna_mcam_handle *handle);
/** /* MBOX */
* MBOX
*/
/* API for BNAD */ /* API for BNAD */
void bna_mbox_handler(struct bna *bna, u32 intr_status); void bna_mbox_handler(struct bna *bna, u32 intr_status);
/** /* ETHPORT */
* ETHPORT
*/
/* Callbacks for RX */ /* Callbacks for RX */
void bna_ethport_cb_rx_started(struct bna_ethport *ethport); void bna_ethport_cb_rx_started(struct bna_ethport *ethport);
void bna_ethport_cb_rx_stopped(struct bna_ethport *ethport); void bna_ethport_cb_rx_stopped(struct bna_ethport *ethport);
/** /* TX MODULE AND TX */
* TX MODULE AND TX
*/
/* FW response handelrs */ /* FW response handelrs */
void bna_bfi_tx_enet_start_rsp(struct bna_tx *tx, void bna_bfi_tx_enet_start_rsp(struct bna_tx *tx,
struct bfi_msgq_mhdr *msghdr); struct bfi_msgq_mhdr *msghdr);
@ -462,9 +443,7 @@ void bna_tx_disable(struct bna_tx *tx, enum bna_cleanup_type type,
void bna_tx_cleanup_complete(struct bna_tx *tx); void bna_tx_cleanup_complete(struct bna_tx *tx);
void bna_tx_coalescing_timeo_set(struct bna_tx *tx, int coalescing_timeo); void bna_tx_coalescing_timeo_set(struct bna_tx *tx, int coalescing_timeo);
/** /* RX MODULE, RX, RXF */
* RX MODULE, RX, RXF
*/
/* FW response handlers */ /* FW response handlers */
void bna_bfi_rx_enet_start_rsp(struct bna_rx *rx, void bna_bfi_rx_enet_start_rsp(struct bna_rx *rx,
@ -522,9 +501,7 @@ bna_rx_mode_set(struct bna_rx *rx, enum bna_rxmode rxmode,
void bna_rx_vlan_add(struct bna_rx *rx, int vlan_id); void bna_rx_vlan_add(struct bna_rx *rx, int vlan_id);
void bna_rx_vlan_del(struct bna_rx *rx, int vlan_id); void bna_rx_vlan_del(struct bna_rx *rx, int vlan_id);
void bna_rx_vlanfilter_enable(struct bna_rx *rx); void bna_rx_vlanfilter_enable(struct bna_rx *rx);
/** /* ENET */
* ENET
*/
/* API for RX */ /* API for RX */
int bna_enet_mtu_get(struct bna_enet *enet); int bna_enet_mtu_get(struct bna_enet *enet);
@ -544,18 +521,14 @@ void bna_enet_mtu_set(struct bna_enet *enet, int mtu,
void (*cbfn)(struct bnad *)); void (*cbfn)(struct bnad *));
void bna_enet_perm_mac_get(struct bna_enet *enet, mac_t *mac); void bna_enet_perm_mac_get(struct bna_enet *enet, mac_t *mac);
/** /* IOCETH */
* IOCETH
*/
/* APIs for BNAD */ /* APIs for BNAD */
void bna_ioceth_enable(struct bna_ioceth *ioceth); void bna_ioceth_enable(struct bna_ioceth *ioceth);
void bna_ioceth_disable(struct bna_ioceth *ioceth, void bna_ioceth_disable(struct bna_ioceth *ioceth,
enum bna_cleanup_type type); enum bna_cleanup_type type);
/** /* BNAD */
* BNAD
*/
/* Callbacks for ENET */ /* Callbacks for ENET */
void bnad_cb_ethport_link_status(struct bnad *bnad, void bnad_cb_ethport_link_status(struct bnad *bnad,

15
drivers/net/ethernet/brocade/bna/bna_enet.c
View File

@ -378,9 +378,8 @@ bna_msgq_rsp_handler(void *arg, struct bfi_msgq_mhdr *msghdr)
} }
} }
/** /* ETHPORT */
* ETHPORT
*/
#define call_ethport_stop_cbfn(_ethport) \ #define call_ethport_stop_cbfn(_ethport) \
do { \ do { \
if ((_ethport)->stop_cbfn) { \ if ((_ethport)->stop_cbfn) { \
@ -804,9 +803,8 @@ bna_ethport_cb_rx_stopped(struct bna_ethport *ethport)
} }
} }
/** /* ENET */
* ENET
*/
#define bna_enet_chld_start(enet) \ #define bna_enet_chld_start(enet) \
do { \ do { \
enum bna_tx_type tx_type = \ enum bna_tx_type tx_type = \
@ -1328,9 +1326,8 @@ bna_enet_perm_mac_get(struct bna_enet *enet, mac_t *mac)
*mac = bfa_nw_ioc_get_mac(&enet->bna->ioceth.ioc); *mac = bfa_nw_ioc_get_mac(&enet->bna->ioceth.ioc);
} }
/** /* IOCETH */
* IOCETH
*/
#define enable_mbox_intr(_ioceth) \ #define enable_mbox_intr(_ioceth) \
do { \ do { \
u32 intr_status; \ u32 intr_status; \

33
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
View File

@ -16,20 +16,15 @@
* www.brocade.com * www.brocade.com
*/ */
/** /* File for interrupt macros and functions */
* File for interrupt macros and functions
*/
#ifndef __BNA_HW_DEFS_H__ #ifndef __BNA_HW_DEFS_H__
#define __BNA_HW_DEFS_H__ #define __BNA_HW_DEFS_H__
#include "bfi_reg.h" #include "bfi_reg.h"
/** /* SW imposed limits */
*
* SW imposed limits
*
*/
#define BFI_ENET_DEF_TXQ 1 #define BFI_ENET_DEF_TXQ 1
#define BFI_ENET_DEF_RXP 1 #define BFI_ENET_DEF_RXP 1
#define BFI_ENET_DEF_UCAM 1 #define BFI_ENET_DEF_UCAM 1
@ -141,11 +136,8 @@
} }
#define bna_port_id_get(_bna) ((_bna)->ioceth.ioc.port_id) #define bna_port_id_get(_bna) ((_bna)->ioceth.ioc.port_id)
/**
* /* Interrupt related bits, flags and macros */
* Interrupt related bits, flags and macros
*
*/
#define IB_STATUS_BITS 0x0000ffff #define IB_STATUS_BITS 0x0000ffff
@ -280,11 +272,7 @@ do { \
(writel(BNA_DOORBELL_Q_PRD_IDX((_rcb)->producer_index), \ (writel(BNA_DOORBELL_Q_PRD_IDX((_rcb)->producer_index), \
(_rcb)->q_dbell)); (_rcb)->q_dbell));
/** /* TxQ, RxQ, CQ related bits, offsets, macros */
*
* TxQ, RxQ, CQ related bits, offsets, macros
*
*/
/* TxQ Entry Opcodes */ /* TxQ Entry Opcodes */
#define BNA_TXQ_WI_SEND (0x402) /* Single Frame Transmission */ #define BNA_TXQ_WI_SEND (0x402) /* Single Frame Transmission */
@ -334,11 +322,7 @@ do { \
#define BNA_CQ_EF_LOCAL (1 << 20) #define BNA_CQ_EF_LOCAL (1 << 20)
/** /* Data structures */
*
* Data structures
*
*/
struct bna_reg_offset { struct bna_reg_offset {
u32 fn_int_status; u32 fn_int_status;
@ -371,8 +355,7 @@ struct bna_txq_wi_vector {
struct bna_dma_addr host_addr; /* Tx-Buf DMA addr */ struct bna_dma_addr host_addr; /* Tx-Buf DMA addr */
}; };
/** /* TxQ Entry Structure
* TxQ Entry Structure
* *
* BEWARE: Load values into this structure with correct endianess. * BEWARE: Load values into this structure with correct endianess.
*/ */

17
drivers/net/ethernet/brocade/bna/bna_tx_rx.c
View File

@ -18,9 +18,7 @@
#include "bna.h" #include "bna.h"
#include "bfi.h" #include "bfi.h"
/** /* IB */
* IB
*/
static void static void
bna_ib_coalescing_timeo_set(struct bna_ib *ib, u8 coalescing_timeo) bna_ib_coalescing_timeo_set(struct bna_ib *ib, u8 coalescing_timeo)
{ {
@ -29,9 +27,7 @@ bna_ib_coalescing_timeo_set(struct bna_ib *ib, u8 coalescing_timeo)
(u32)ib->coalescing_timeo, 0); (u32)ib->coalescing_timeo, 0);
} }
/** /* RXF */
* RXF
*/
#define bna_rxf_vlan_cfg_soft_reset(rxf) \ #define bna_rxf_vlan_cfg_soft_reset(rxf) \
do { \ do { \
@ -1312,9 +1308,7 @@ bna_rxf_vlan_strip_cfg_apply(struct bna_rxf *rxf)
return 0; return 0;
} }
/** /* RX */
* RX
*/
#define BNA_GET_RXQS(qcfg) (((qcfg)->rxp_type == BNA_RXP_SINGLE) ? \ #define BNA_GET_RXQS(qcfg) (((qcfg)->rxp_type == BNA_RXP_SINGLE) ? \
(qcfg)->num_paths : ((qcfg)->num_paths * 2)) (qcfg)->num_paths : ((qcfg)->num_paths * 2))
@ -2791,9 +2785,8 @@ const u32 bna_napi_dim_vector[BNA_LOAD_T_MAX][BNA_BIAS_T_MAX] = {
{1, 2}, {1, 2},
}; };
/** /* TX */
* TX
*/
#define call_tx_stop_cbfn(tx) \ #define call_tx_stop_cbfn(tx) \
do { \ do { \
if ((tx)->stop_cbfn) { \ if ((tx)->stop_cbfn) { \

66
drivers/net/ethernet/brocade/bna/bna_types.h
View File

@ -23,11 +23,7 @@
#include "bfa_cee.h" #include "bfa_cee.h"
#include "bfa_msgq.h" #include "bfa_msgq.h"
/** /* Forward declarations */
*
* Forward declarations
*
*/
struct bna_mcam_handle; struct bna_mcam_handle;
struct bna_txq; struct bna_txq;
@ -40,11 +36,7 @@ struct bna_enet;
struct bna; struct bna;
struct bnad; struct bnad;
/** /* Enums, primitive data types */
*
* Enums, primitive data types
*
*/
enum bna_status { enum bna_status {
BNA_STATUS_T_DISABLED = 0, BNA_STATUS_T_DISABLED = 0,
@ -331,11 +323,7 @@ struct bna_attr {
int max_rit_size; int max_rit_size;
}; };
/** /* IOCEth */
*
* IOCEth
*
*/
struct bna_ioceth { struct bna_ioceth {
bfa_fsm_t fsm; bfa_fsm_t fsm;
@ -351,11 +339,7 @@ struct bna_ioceth {
struct bna *bna; struct bna *bna;
}; };
/** /* Enet */
*
* Enet
*
*/
/* Pause configuration */ /* Pause configuration */
struct bna_pause_config { struct bna_pause_config {
@ -390,11 +374,7 @@ struct bna_enet {
struct bna *bna; struct bna *bna;
}; };
/** /* Ethport */
*
* Ethport
*
*/
struct bna_ethport { struct bna_ethport {
bfa_fsm_t fsm; bfa_fsm_t fsm;
@ -419,11 +399,7 @@ struct bna_ethport {
struct bna *bna; struct bna *bna;
}; };
/** /* Interrupt Block */
*
* Interrupt Block
*
*/
/* Doorbell structure */ /* Doorbell structure */
struct bna_ib_dbell { struct bna_ib_dbell {
@ -447,11 +423,7 @@ struct bna_ib {
int interpkt_timeo; int interpkt_timeo;
}; };
/** /* Tx object */
*
* Tx object
*
*/
/* Tx datapath control structure */ /* Tx datapath control structure */
#define BNA_Q_NAME_SIZE 16 #define BNA_Q_NAME_SIZE 16
@ -585,11 +557,7 @@ struct bna_tx_mod {
struct bna *bna; struct bna *bna;
}; };
/** /* Rx object */
*
* Rx object
*
*/
/* Rx datapath control structure */ /* Rx datapath control structure */
struct bna_rcb { struct bna_rcb {
@ -898,11 +866,7 @@ struct bna_rx_mod {
u32 rid_mask; u32 rid_mask;
}; };
/** /* CAM */
*
* CAM
*
*/
struct bna_ucam_mod { struct bna_ucam_mod {
struct bna_mac *ucmac; /* BFI_MAX_UCMAC entries */ struct bna_mac *ucmac; /* BFI_MAX_UCMAC entries */
@ -927,11 +891,7 @@ struct bna_mcam_mod {
struct bna *bna; struct bna *bna;
}; };
/** /* Statistics */
*
* Statistics
*
*/
struct bna_stats { struct bna_stats {
struct bna_dma_addr hw_stats_dma; struct bna_dma_addr hw_stats_dma;
@ -949,11 +909,7 @@ struct bna_stats_mod {
struct bfi_enet_stats_req stats_clr; struct bfi_enet_stats_req stats_clr;
}; };
/** /* BNA */
*
* BNA
*
*/
struct bna { struct bna {
struct bna_ident ident; struct bna_ident ident;

12
drivers/net/ethernet/brocade/bna/bnad.c
View File

@ -1302,8 +1302,7 @@ bnad_txrx_irq_alloc(struct bnad *bnad, enum bnad_intr_source src,
return 0; return 0;
} }
/** /* NOTE: Should be called for MSIX only
* NOTE: Should be called for MSIX only
* Unregisters Tx MSIX vector(s) from the kernel * Unregisters Tx MSIX vector(s) from the kernel
*/ */
static void static void
@ -1322,8 +1321,7 @@ bnad_tx_msix_unregister(struct bnad *bnad, struct bnad_tx_info *tx_info,
} }
} }
/** /* NOTE: Should be called for MSIX only
* NOTE: Should be called for MSIX only
* Registers Tx MSIX vector(s) and ISR(s), cookie with the kernel * Registers Tx MSIX vector(s) and ISR(s), cookie with the kernel
*/ */
static int static int
@ -1354,8 +1352,7 @@ bnad_tx_msix_register(struct bnad *bnad, struct bnad_tx_info *tx_info,
return -1; return -1;
} }
/** /* NOTE: Should be called for MSIX only
* NOTE: Should be called for MSIX only
* Unregisters Rx MSIX vector(s) from the kernel * Unregisters Rx MSIX vector(s) from the kernel
*/ */
static void static void
@ -1375,8 +1372,7 @@ bnad_rx_msix_unregister(struct bnad *bnad, struct bnad_rx_info *rx_info,
} }
} }
/** /* NOTE: Should be called for MSIX only
* NOTE: Should be called for MSIX only
* Registers Tx MSIX vector(s) and ISR(s), cookie with the kernel * Registers Tx MSIX vector(s) and ISR(s), cookie with the kernel
*/ */
static int static int

4
drivers/net/ethernet/brocade/bna/bnad.h
View File

@ -389,9 +389,7 @@ extern void bnad_netdev_hwstats_fill(struct bnad *bnad,
void bnad_debugfs_init(struct bnad *bnad); void bnad_debugfs_init(struct bnad *bnad);
void bnad_debugfs_uninit(struct bnad *bnad); void bnad_debugfs_uninit(struct bnad *bnad);
/** /* MACROS */
* MACROS
*/
/* To set & get the stats counters */ /* To set & get the stats counters */
#define BNAD_UPDATE_CTR(_bnad, _ctr) \ #define BNAD_UPDATE_CTR(_bnad, _ctr) \
(((_bnad)->stats.drv_stats._ctr)++) (((_bnad)->stats.drv_stats._ctr)++)

4
drivers/net/ethernet/ibm/ehea/ehea_qmr.c
View File

@ -376,9 +376,7 @@ int ehea_destroy_eq(struct ehea_eq *eq)
return 0; return 0;
} }
/** /* allocates memory for a queue and registers pages in phyp */
* allocates memory for a queue and registers pages in phyp
*/
static int ehea_qp_alloc_register(struct ehea_qp *qp, struct hw_queue *hw_queue, static int ehea_qp_alloc_register(struct ehea_qp *qp, struct hw_queue *hw_queue,
int nr_pages, int wqe_size, int act_nr_sges, int nr_pages, int wqe_size, int act_nr_sges,
struct ehea_adapter *adapter, int h_call_q_selector) struct ehea_adapter *adapter, int h_call_q_selector)

9
drivers/net/ethernet/intel/e1000/e1000_main.c
View File

@ -721,9 +721,7 @@ void e1000_reset(struct e1000_adapter *adapter)
e1000_release_manageability(adapter); e1000_release_manageability(adapter);
} }
/** /* Dump the eeprom for users having checksum issues */
* Dump the eeprom for users having checksum issues
**/
static void e1000_dump_eeprom(struct e1000_adapter *adapter) static void e1000_dump_eeprom(struct e1000_adapter *adapter)
{ {
struct net_device *netdev = adapter->netdev; struct net_device *netdev = adapter->netdev;
@ -3056,14 +3054,13 @@ static void e1000_tx_queue(struct e1000_adapter *adapter,
mmiowb(); mmiowb();
} }
/** /* 82547 workaround to avoid controller hang in half-duplex environment.
* 82547 workaround to avoid controller hang in half-duplex environment.
* The workaround is to avoid queuing a large packet that would span * The workaround is to avoid queuing a large packet that would span
* the internal Tx FIFO ring boundary by notifying the stack to resend * the internal Tx FIFO ring boundary by notifying the stack to resend
* the packet at a later time. This gives the Tx FIFO an opportunity to * the packet at a later time. This gives the Tx FIFO an opportunity to
* flush all packets. When that occurs, we reset the Tx FIFO pointers * flush all packets. When that occurs, we reset the Tx FIFO pointers
* to the beginning of the Tx FIFO. * to the beginning of the Tx FIFO.
**/ */
#define E1000_FIFO_HDR 0x10 #define E1000_FIFO_HDR 0x10
#define E1000_82547_PAD_LEN 0x3E0 #define E1000_82547_PAD_LEN 0x3E0

6
drivers/net/ethernet/micrel/ks8851_mll.c
View File

@ -16,8 +16,7 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/ */
/** /* Supports:
* Supports:
* KS8851 16bit MLL chip from Micrel Inc. * KS8851 16bit MLL chip from Micrel Inc.
*/ */
@ -465,8 +464,7 @@ static int msg_enable;
#define BE1 0x2000 /* Byte Enable 1 */ #define BE1 0x2000 /* Byte Enable 1 */
#define BE0 0x1000 /* Byte Enable 0 */ #define BE0 0x1000 /* Byte Enable 0 */
/** /* register read/write calls.
* register read/write calls.
* *
* All these calls issue transactions to access the chip's registers. They * All these calls issue transactions to access the chip's registers. They
* all require that the necessary lock is held to prevent accesses when the * all require that the necessary lock is held to prevent accesses when the

3
drivers/net/ethernet/neterion/vxge/vxge-main.h
View File

@ -430,8 +430,7 @@ void vxge_initialize_ethtool_ops(struct net_device *ndev);
enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev); enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override); int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override);
/** /* #define VXGE_DEBUG_INIT: debug for initialization functions
* #define VXGE_DEBUG_INIT: debug for initialization functions
* #define VXGE_DEBUG_TX : debug transmit related functions * #define VXGE_DEBUG_TX : debug transmit related functions
* #define VXGE_DEBUG_RX : debug recevice related functions * #define VXGE_DEBUG_RX : debug recevice related functions
* #define VXGE_DEBUG_MEM : debug memory module * #define VXGE_DEBUG_MEM : debug memory module

3
drivers/net/ethernet/nvidia/forcedeth.c
View File

@ -3552,8 +3552,7 @@ static irqreturn_t nv_nic_irq(int foo, void *data)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
/** /* All _optimized functions are used to help increase performance
* All _optimized functions are used to help increase performance
* (reduce CPU and increase throughput). They use descripter version 3, * (reduce CPU and increase throughput). They use descripter version 3,
* compiler directives, and reduce memory accesses. * compiler directives, and reduce memory accesses.
*/ */

3
drivers/net/ethernet/sfc/mcdi_pcol.h
View File

@ -48,8 +48,7 @@
/* Unused commands: 0x23, 0x27, 0x30, 0x31 */ /* Unused commands: 0x23, 0x27, 0x30, 0x31 */
/** /* MCDI version 1
* MCDI version 1
* *
* Each MCDI request starts with an MCDI_HEADER, which is a 32byte * Each MCDI request starts with an MCDI_HEADER, which is a 32byte
* structure, filled in by the client. * structure, filled in by the client.

8
drivers/net/ethernet/ti/davinci_emac.c
View File

@ -614,11 +614,9 @@ static int emac_set_coalesce(struct net_device *ndev,
} }
/** /* ethtool_ops: DaVinci EMAC Ethtool structure
* ethtool_ops: DaVinci EMAC Ethtool structure
* *
* Ethtool support for EMAC adapter * Ethtool support for EMAC adapter
*
*/ */
static const struct ethtool_ops ethtool_ops = { static const struct ethtool_ops ethtool_ops = {
.get_drvinfo = emac_get_drvinfo, .get_drvinfo = emac_get_drvinfo,
@ -2015,9 +2013,7 @@ static const struct dev_pm_ops davinci_emac_pm_ops = {
.resume = davinci_emac_resume, .resume = davinci_emac_resume,
}; };
/** /* davinci_emac_driver: EMAC platform driver structure */
* davinci_emac_driver: EMAC platform driver structure
*/
static struct platform_driver davinci_emac_driver = { static struct platform_driver davinci_emac_driver = {
.driver = { .driver = {
.name = "davinci_emac", .name = "davinci_emac",