mirror of https://gitee.com/openkylin/linux.git
qed: Add configuration information to register dump and debug data
Configuration information is added to the debug data collection, in addition to register dump. Added qed_dbg_nvm_image() that receives an image type, allocates a buffer and reads the image. The images are saved in the buffers and the dump size is updated. Signed-off-by: Denis Bolotin <denis.bolotin@cavium.com> Signed-off-by: Ariel Elior <ariel.elior@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -7778,6 +7778,57 @@ int qed_dbg_igu_fifo_size(struct qed_dev *cdev)
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return qed_dbg_feature_size(cdev, DBG_FEATURE_IGU_FIFO);
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return qed_dbg_feature_size(cdev, DBG_FEATURE_IGU_FIFO);
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}
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}
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int qed_dbg_nvm_image_length(struct qed_hwfn *p_hwfn,
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enum qed_nvm_images image_id, u32 *length)
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{
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struct qed_nvm_image_att image_att;
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int rc;
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*length = 0;
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rc = qed_mcp_get_nvm_image_att(p_hwfn, image_id, &image_att);
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if (rc)
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return rc;
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*length = image_att.length;
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return rc;
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}
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int qed_dbg_nvm_image(struct qed_dev *cdev, void *buffer,
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u32 *num_dumped_bytes, enum qed_nvm_images image_id)
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{
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struct qed_hwfn *p_hwfn =
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&cdev->hwfns[cdev->dbg_params.engine_for_debug];
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u32 len_rounded, i;
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__be32 val;
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int rc;
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*num_dumped_bytes = 0;
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rc = qed_dbg_nvm_image_length(p_hwfn, image_id, &len_rounded);
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if (rc)
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return rc;
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DP_NOTICE(p_hwfn->cdev,
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"Collecting a debug feature [\"nvram image %d\"]\n",
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image_id);
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len_rounded = roundup(len_rounded, sizeof(u32));
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rc = qed_mcp_get_nvm_image(p_hwfn, image_id, buffer, len_rounded);
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if (rc)
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return rc;
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/* QED_NVM_IMAGE_NVM_META image is not swapped like other images */
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if (image_id != QED_NVM_IMAGE_NVM_META)
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for (i = 0; i < len_rounded; i += 4) {
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val = cpu_to_be32(*(u32 *)(buffer + i));
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*(u32 *)(buffer + i) = val;
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}
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*num_dumped_bytes = len_rounded;
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return rc;
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}
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int qed_dbg_protection_override(struct qed_dev *cdev, void *buffer,
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int qed_dbg_protection_override(struct qed_dev *cdev, void *buffer,
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u32 *num_dumped_bytes)
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u32 *num_dumped_bytes)
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{
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{
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@ -7831,6 +7882,9 @@ enum debug_print_features {
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IGU_FIFO = 6,
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IGU_FIFO = 6,
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PHY = 7,
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PHY = 7,
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FW_ASSERTS = 8,
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FW_ASSERTS = 8,
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NVM_CFG1 = 9,
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DEFAULT_CFG = 10,
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NVM_META = 11,
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};
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};
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static u32 qed_calc_regdump_header(enum debug_print_features feature,
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static u32 qed_calc_regdump_header(enum debug_print_features feature,
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@ -7965,13 +8019,61 @@ int qed_dbg_all_data(struct qed_dev *cdev, void *buffer)
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DP_ERR(cdev, "qed_dbg_mcp_trace failed. rc = %d\n", rc);
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DP_ERR(cdev, "qed_dbg_mcp_trace failed. rc = %d\n", rc);
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}
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}
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/* nvm cfg1 */
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rc = qed_dbg_nvm_image(cdev,
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(u8 *)buffer + offset + REGDUMP_HEADER_SIZE,
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&feature_size, QED_NVM_IMAGE_NVM_CFG1);
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if (!rc) {
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*(u32 *)((u8 *)buffer + offset) =
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qed_calc_regdump_header(NVM_CFG1, cur_engine,
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feature_size, omit_engine);
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offset += (feature_size + REGDUMP_HEADER_SIZE);
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} else if (rc != -ENOENT) {
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DP_ERR(cdev,
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"qed_dbg_nvm_image failed for image %d (%s), rc = %d\n",
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QED_NVM_IMAGE_NVM_CFG1, "QED_NVM_IMAGE_NVM_CFG1", rc);
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}
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/* nvm default */
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rc = qed_dbg_nvm_image(cdev,
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(u8 *)buffer + offset + REGDUMP_HEADER_SIZE,
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&feature_size, QED_NVM_IMAGE_DEFAULT_CFG);
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if (!rc) {
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*(u32 *)((u8 *)buffer + offset) =
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qed_calc_regdump_header(DEFAULT_CFG, cur_engine,
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feature_size, omit_engine);
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offset += (feature_size + REGDUMP_HEADER_SIZE);
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} else if (rc != -ENOENT) {
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DP_ERR(cdev,
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"qed_dbg_nvm_image failed for image %d (%s), rc = %d\n",
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QED_NVM_IMAGE_DEFAULT_CFG, "QED_NVM_IMAGE_DEFAULT_CFG",
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rc);
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}
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/* nvm meta */
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rc = qed_dbg_nvm_image(cdev,
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(u8 *)buffer + offset + REGDUMP_HEADER_SIZE,
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&feature_size, QED_NVM_IMAGE_NVM_META);
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if (!rc) {
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*(u32 *)((u8 *)buffer + offset) =
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qed_calc_regdump_header(NVM_META, cur_engine,
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feature_size, omit_engine);
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offset += (feature_size + REGDUMP_HEADER_SIZE);
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} else if (rc != -ENOENT) {
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DP_ERR(cdev,
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"qed_dbg_nvm_image failed for image %d (%s), rc = %d\n",
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QED_NVM_IMAGE_NVM_META, "QED_NVM_IMAGE_NVM_META", rc);
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}
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return 0;
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return 0;
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}
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}
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int qed_dbg_all_data_size(struct qed_dev *cdev)
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int qed_dbg_all_data_size(struct qed_dev *cdev)
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{
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{
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struct qed_hwfn *p_hwfn =
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&cdev->hwfns[cdev->dbg_params.engine_for_debug];
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u32 regs_len = 0, image_len = 0;
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u8 cur_engine, org_engine;
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u8 cur_engine, org_engine;
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u32 regs_len = 0;
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org_engine = qed_get_debug_engine(cdev);
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org_engine = qed_get_debug_engine(cdev);
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for (cur_engine = 0; cur_engine < cdev->num_hwfns; cur_engine++) {
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for (cur_engine = 0; cur_engine < cdev->num_hwfns; cur_engine++) {
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@ -7993,6 +8095,15 @@ int qed_dbg_all_data_size(struct qed_dev *cdev)
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/* Engine common */
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/* Engine common */
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regs_len += REGDUMP_HEADER_SIZE + qed_dbg_mcp_trace_size(cdev);
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regs_len += REGDUMP_HEADER_SIZE + qed_dbg_mcp_trace_size(cdev);
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qed_dbg_nvm_image_length(p_hwfn, QED_NVM_IMAGE_NVM_CFG1, &image_len);
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if (image_len)
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regs_len += REGDUMP_HEADER_SIZE + image_len;
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qed_dbg_nvm_image_length(p_hwfn, QED_NVM_IMAGE_DEFAULT_CFG, &image_len);
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if (image_len)
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regs_len += REGDUMP_HEADER_SIZE + image_len;
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qed_dbg_nvm_image_length(p_hwfn, QED_NVM_IMAGE_NVM_META, &image_len);
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if (image_len)
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regs_len += REGDUMP_HEADER_SIZE + image_len;
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return regs_len;
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return regs_len;
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}
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}
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@ -2529,7 +2529,7 @@ int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn)
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return rc;
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return rc;
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}
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}
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static int
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int
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qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn,
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qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn,
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enum qed_nvm_images image_id,
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enum qed_nvm_images image_id,
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struct qed_nvm_image_att *p_image_att)
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struct qed_nvm_image_att *p_image_att)
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@ -2545,6 +2545,15 @@ qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn,
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case QED_NVM_IMAGE_FCOE_CFG:
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case QED_NVM_IMAGE_FCOE_CFG:
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type = NVM_TYPE_FCOE_CFG;
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type = NVM_TYPE_FCOE_CFG;
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break;
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break;
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case QED_NVM_IMAGE_NVM_CFG1:
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type = NVM_TYPE_NVM_CFG1;
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break;
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case QED_NVM_IMAGE_DEFAULT_CFG:
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type = NVM_TYPE_DEFAULT_CFG;
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break;
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case QED_NVM_IMAGE_NVM_META:
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type = NVM_TYPE_META;
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break;
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default:
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default:
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DP_NOTICE(p_hwfn, "Unknown request of image_id %08x\n",
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DP_NOTICE(p_hwfn, "Unknown request of image_id %08x\n",
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image_id);
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image_id);
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@ -2588,9 +2597,6 @@ int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn,
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return -EINVAL;
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return -EINVAL;
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}
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}
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/* Each NVM image is suffixed by CRC; Upper-layer has no need for it */
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image_att.length -= 4;
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if (image_att.length > buffer_len) {
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if (image_att.length > buffer_len) {
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DP_VERBOSE(p_hwfn,
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DP_VERBOSE(p_hwfn,
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QED_MSG_STORAGE,
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QED_MSG_STORAGE,
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@ -482,6 +482,20 @@ struct qed_nvm_image_att {
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u32 length;
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u32 length;
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};
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};
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/**
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* @brief Allows reading a whole nvram image
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*
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* @param p_hwfn
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* @param image_id - image to get attributes for
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* @param p_image_att - image attributes structure into which to fill data
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*
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* @return int - 0 - operation was successful.
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*/
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int
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qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn,
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enum qed_nvm_images image_id,
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struct qed_nvm_image_att *p_image_att);
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/**
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/**
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* @brief Allows reading a whole nvram image
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* @brief Allows reading a whole nvram image
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*
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*
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@ -159,6 +159,9 @@ struct qed_dcbx_get {
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enum qed_nvm_images {
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enum qed_nvm_images {
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QED_NVM_IMAGE_ISCSI_CFG,
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QED_NVM_IMAGE_ISCSI_CFG,
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QED_NVM_IMAGE_FCOE_CFG,
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QED_NVM_IMAGE_FCOE_CFG,
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QED_NVM_IMAGE_NVM_CFG1,
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QED_NVM_IMAGE_DEFAULT_CFG,
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QED_NVM_IMAGE_NVM_META,
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};
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};
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struct qed_link_eee_params {
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struct qed_link_eee_params {
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