mirror of https://gitee.com/openkylin/linux.git
ASoC: hdac_hdmi: Fix codec power state in S3 during playback
If the system enters S3 during a playback, codec power needs to be turned OFF during suspend and restored during resume. With this patch the AFG node is set to D3 and codec power is turned OFF during controller suspend call. During resume, the codec power is left in ON state if the playback was in progress while suspending. Also setting power state for AFG node is optimized. With this the loop with timeout is removed and codec_read is used instead. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -1420,33 +1420,40 @@ static int hdmi_codec_remove(struct snd_soc_codec *codec)
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}
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#ifdef CONFIG_PM
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static int hdmi_codec_prepare(struct device *dev)
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{
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struct hdac_ext_device *edev = to_hda_ext_device(dev);
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struct hdac_device *hdac = &edev->hdac;
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pm_runtime_get_sync(&edev->hdac.dev);
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/*
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* Power down afg.
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* codec_read is preferred over codec_write to set the power state.
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* This way verb is send to set the power state and response
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* is received. So setting power state is ensured without using loop
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* to read the state.
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*/
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snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
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AC_PWRST_D3);
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return 0;
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}
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static void hdmi_codec_complete(struct device *dev)
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{
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struct hdac_ext_device *edev = to_hda_ext_device(dev);
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struct hdac_hdmi_priv *hdmi = edev->private_data;
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struct hdac_hdmi_pin *pin;
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struct hdac_device *hdac = &edev->hdac;
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struct hdac_bus *bus = hdac->bus;
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int err;
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unsigned long timeout;
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/* Power up afg */
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snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
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AC_PWRST_D0);
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hdac_hdmi_skl_enable_all_pins(&edev->hdac);
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hdac_hdmi_skl_enable_dp12(&edev->hdac);
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/* Power up afg */
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if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0)) {
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snd_hdac_codec_write(hdac, hdac->afg, 0,
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AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
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/* Wait till power state is set to D0 */
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timeout = jiffies + msecs_to_jiffies(1000);
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while (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0)
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&& time_before(jiffies, timeout)) {
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msleep(50);
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}
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}
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/*
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* As the ELD notify callback request is not entertained while the
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* device is in suspend state. Need to manually check detection of
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@ -1455,18 +1462,10 @@ static void hdmi_codec_complete(struct device *dev)
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list_for_each_entry(pin, &hdmi->pin_list, head)
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hdac_hdmi_present_sense(pin, 1);
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/*
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* Codec power is turned ON during controller resume.
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* Turn it OFF here
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*/
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err = snd_hdac_display_power(bus, false);
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if (err < 0) {
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dev_err(bus->dev,
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"Cannot turn OFF display power on i915, err: %d\n",
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err);
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}
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pm_runtime_put_sync(&edev->hdac.dev);
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}
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#else
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#define hdmi_codec_prepare NULL
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#define hdmi_codec_complete NULL
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#endif
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@ -1557,7 +1556,6 @@ static int hdac_hdmi_runtime_suspend(struct device *dev)
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struct hdac_ext_device *edev = to_hda_ext_device(dev);
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struct hdac_device *hdac = &edev->hdac;
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struct hdac_bus *bus = hdac->bus;
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unsigned long timeout;
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int err;
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dev_dbg(dev, "Enter: %s\n", __func__);
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@ -1566,20 +1564,15 @@ static int hdac_hdmi_runtime_suspend(struct device *dev)
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if (!bus)
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return 0;
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/* Power down afg */
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if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D3)) {
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snd_hdac_codec_write(hdac, hdac->afg, 0,
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AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
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/* Wait till power state is set to D3 */
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timeout = jiffies + msecs_to_jiffies(1000);
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while (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D3)
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&& time_before(jiffies, timeout)) {
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msleep(50);
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}
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}
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/*
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* Power down afg.
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* codec_read is preferred over codec_write to set the power state.
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* This way verb is send to set the power state and response
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* is received. So setting power state is ensured without using loop
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* to read the state.
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*/
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snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
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AC_PWRST_D3);
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err = snd_hdac_display_power(bus, false);
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if (err < 0) {
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dev_err(bus->dev, "Cannot turn on display power on i915\n");
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@ -1612,9 +1605,8 @@ static int hdac_hdmi_runtime_resume(struct device *dev)
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hdac_hdmi_skl_enable_dp12(&edev->hdac);
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/* Power up afg */
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if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0))
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snd_hdac_codec_write(hdac, hdac->afg, 0,
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AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
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snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
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AC_PWRST_D0);
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return 0;
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}
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@ -1625,6 +1617,7 @@ static int hdac_hdmi_runtime_resume(struct device *dev)
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static const struct dev_pm_ops hdac_hdmi_pm = {
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SET_RUNTIME_PM_OPS(hdac_hdmi_runtime_suspend, hdac_hdmi_runtime_resume, NULL)
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.prepare = hdmi_codec_prepare,
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.complete = hdmi_codec_complete,
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};
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