mirror of https://gitee.com/openkylin/linux.git
iwlwifi: pcie: allocate and free rx cr's and tr's tails
The hw now refers to two new blocks: * rx tr tail - The Tail index on the free buffers queue TR, which is update by the device after reading the free buffer from the tr. * rx cr tail - Updated by the driver when completing processing a new completion descriptor in the cr. Add these two new struct to the rxq, allocate and free them when needed. In addition, the register for rx write pointer had been changed to HBUS_TARG_WRPTR. The way to differentiate tx from rx is the queue number. TX range is 0-511, and RX's is 512-527. Signed-off-by: Golan Ben Ami <golan.ben.ami@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:
Golan Ben Ami
Luca Coelho
parent
5f01df3f58
commit
1b493e30a1
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@ -3,6 +3,7 @@
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* Copyright(c) 2003 - 2015 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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* Copyright(c) 2018 Intel Corporation
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*
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* Portions of this file are derived from the ipw3945 project, as well
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* as portions of the ieee80211 subsystem header files.
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@ -17,8 +18,7 @@
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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* this program.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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@ -59,6 +59,7 @@
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#define RX_POST_REQ_ALLOC 2
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#define RX_CLAIM_REQ_ALLOC 8
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#define RX_PENDING_WATERMARK 16
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#define FIRST_RX_QUEUE 512
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struct iwl_host_cmd;
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@ -106,6 +107,10 @@ struct isr_statistics {
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* @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
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* @ubd: driver's pointer to buffer of used receive buffer descriptors (rbd)
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* @ubd_dma: physical address of buffer of used receive buffer descriptors (rbd)
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* @tr_tail: driver's pointer to the transmission ring tail buffer
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* @tr_tail_dma: physical address of the buffer for the transmission ring tail
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* @cr_tail: driver's pointer to the completion ring tail buffer
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* @cr_tail_dma: physical address of the buffer for the completion ring tail
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* @read: Shared index to newest available Rx buffer
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* @write: Shared index to oldest written Rx packet
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* @free_count: Number of pre-allocated buffers in rx_free
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@ -127,6 +132,10 @@ struct iwl_rxq {
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dma_addr_t bd_dma;
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__le32 *used_bd;
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dma_addr_t used_bd_dma;
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__le16 *tr_tail;
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dma_addr_t tr_tail_dma;
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__le16 *cr_tail;
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dma_addr_t cr_tail_dma;
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u32 read;
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u32 write;
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u32 free_count;
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@ -209,7 +209,11 @@ static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans,
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}
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rxq->write_actual = round_down(rxq->write, 8);
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if (trans->cfg->mq_rx_supported)
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if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22560)
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iwl_write32(trans, HBUS_TARG_WRPTR,
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(rxq->write_actual |
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((FIRST_RX_QUEUE + rxq->id) << 16)));
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else if (trans->cfg->mq_rx_supported)
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iwl_write32(trans, RFH_Q_FRBDCB_WIDX_TRG(rxq->id),
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rxq->write_actual);
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else
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@ -608,15 +612,126 @@ void iwl_pcie_rx_allocator_work(struct work_struct *data)
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iwl_pcie_rx_allocator(trans_pcie->trans);
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}
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static int iwl_pcie_rx_alloc(struct iwl_trans *trans)
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static void iwl_pcie_free_rxq_dma(struct iwl_trans *trans,
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struct iwl_rxq *rxq)
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{
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struct device *dev = trans->dev;
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int free_size = trans->cfg->mq_rx_supported ? sizeof(__le64) :
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sizeof(__le32);
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if (rxq->bd)
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dma_free_coherent(dev, free_size * rxq->queue_size,
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rxq->bd, rxq->bd_dma);
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rxq->bd_dma = 0;
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rxq->bd = NULL;
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if (rxq->rb_stts)
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dma_free_coherent(trans->dev,
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sizeof(struct iwl_rb_status),
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rxq->rb_stts, rxq->rb_stts_dma);
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rxq->rb_stts_dma = 0;
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rxq->rb_stts = NULL;
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if (rxq->used_bd)
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dma_free_coherent(dev, sizeof(__le32) * rxq->queue_size,
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rxq->used_bd, rxq->used_bd_dma);
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rxq->used_bd_dma = 0;
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rxq->used_bd = NULL;
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if (trans->cfg->device_family < IWL_DEVICE_FAMILY_22560)
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return;
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if (rxq->tr_tail)
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dma_free_coherent(dev, sizeof(__le16),
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rxq->tr_tail, rxq->tr_tail_dma);
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rxq->tr_tail_dma = 0;
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rxq->tr_tail = NULL;
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if (rxq->cr_tail)
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dma_free_coherent(dev, sizeof(__le16),
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rxq->cr_tail, rxq->cr_tail_dma);
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rxq->cr_tail_dma = 0;
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rxq->cr_tail = NULL;
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}
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static int iwl_pcie_alloc_rxq_dma(struct iwl_trans *trans,
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struct iwl_rxq *rxq)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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struct iwl_rb_allocator *rba = &trans_pcie->rba;
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struct device *dev = trans->dev;
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int i;
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int free_size = trans->cfg->mq_rx_supported ? sizeof(__le64) :
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sizeof(__le32);
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spin_lock_init(&rxq->lock);
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if (trans->cfg->mq_rx_supported)
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rxq->queue_size = MQ_RX_TABLE_SIZE;
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else
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rxq->queue_size = RX_QUEUE_SIZE;
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/*
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* Allocate the circular buffer of Read Buffer Descriptors
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* (RBDs)
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*/
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rxq->bd = dma_zalloc_coherent(dev,
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free_size * rxq->queue_size,
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&rxq->bd_dma, GFP_KERNEL);
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if (!rxq->bd)
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goto err;
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if (trans->cfg->mq_rx_supported) {
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rxq->used_bd = dma_zalloc_coherent(dev,
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sizeof(__le32) *
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rxq->queue_size,
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&rxq->used_bd_dma,
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GFP_KERNEL);
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if (!rxq->used_bd)
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goto err;
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}
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/* Allocate the driver's pointer to receive buffer status */
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rxq->rb_stts = dma_zalloc_coherent(dev, sizeof(*rxq->rb_stts),
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&rxq->rb_stts_dma,
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GFP_KERNEL);
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if (!rxq->rb_stts)
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goto err;
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if (trans->cfg->device_family < IWL_DEVICE_FAMILY_22560)
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return 0;
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/* Allocate the driver's pointer to TR tail */
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rxq->tr_tail = dma_zalloc_coherent(dev, sizeof(__le16),
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&rxq->tr_tail_dma,
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GFP_KERNEL);
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if (!rxq->tr_tail)
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goto err;
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/* Allocate the driver's pointer to CR tail */
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rxq->cr_tail = dma_zalloc_coherent(dev, sizeof(__le16),
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&rxq->cr_tail_dma,
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GFP_KERNEL);
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if (!rxq->cr_tail)
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goto err;
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return 0;
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err:
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for (i = 0; i < trans->num_rx_queues; i++) {
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struct iwl_rxq *rxq = &trans_pcie->rxq[i];
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iwl_pcie_free_rxq_dma(trans, rxq);
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}
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kfree(trans_pcie->rxq);
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return -ENOMEM;
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}
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static int iwl_pcie_rx_alloc(struct iwl_trans *trans)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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struct iwl_rb_allocator *rba = &trans_pcie->rba;
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int i, ret;
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if (WARN_ON(trans_pcie->rxq))
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return -EINVAL;
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@ -630,65 +745,11 @@ static int iwl_pcie_rx_alloc(struct iwl_trans *trans)
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for (i = 0; i < trans->num_rx_queues; i++) {
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struct iwl_rxq *rxq = &trans_pcie->rxq[i];
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spin_lock_init(&rxq->lock);
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if (trans->cfg->mq_rx_supported)
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rxq->queue_size = MQ_RX_TABLE_SIZE;
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else
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rxq->queue_size = RX_QUEUE_SIZE;
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/*
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* Allocate the circular buffer of Read Buffer Descriptors
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* (RBDs)
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*/
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rxq->bd = dma_zalloc_coherent(dev,
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free_size * rxq->queue_size,
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&rxq->bd_dma, GFP_KERNEL);
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if (!rxq->bd)
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goto err;
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if (trans->cfg->mq_rx_supported) {
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rxq->used_bd = dma_zalloc_coherent(dev,
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sizeof(__le32) *
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rxq->queue_size,
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&rxq->used_bd_dma,
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GFP_KERNEL);
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if (!rxq->used_bd)
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goto err;
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}
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/*Allocate the driver's pointer to receive buffer status */
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rxq->rb_stts = dma_zalloc_coherent(dev, sizeof(*rxq->rb_stts),
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&rxq->rb_stts_dma,
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GFP_KERNEL);
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if (!rxq->rb_stts)
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goto err;
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ret = iwl_pcie_alloc_rxq_dma(trans, rxq);
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if (ret)
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return ret;
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}
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return 0;
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err:
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for (i = 0; i < trans->num_rx_queues; i++) {
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struct iwl_rxq *rxq = &trans_pcie->rxq[i];
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if (rxq->bd)
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dma_free_coherent(dev, free_size * rxq->queue_size,
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rxq->bd, rxq->bd_dma);
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rxq->bd_dma = 0;
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rxq->bd = NULL;
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if (rxq->rb_stts)
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dma_free_coherent(trans->dev,
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sizeof(struct iwl_rb_status),
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rxq->rb_stts, rxq->rb_stts_dma);
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if (rxq->used_bd)
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dma_free_coherent(dev, sizeof(__le32) * rxq->queue_size,
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rxq->used_bd, rxq->used_bd_dma);
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rxq->used_bd_dma = 0;
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rxq->used_bd = NULL;
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}
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kfree(trans_pcie->rxq);
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return -ENOMEM;
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}
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static void iwl_pcie_rx_hw_init(struct iwl_trans *trans, struct iwl_rxq *rxq)
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@ -1002,8 +1063,6 @@ void iwl_pcie_rx_free(struct iwl_trans *trans)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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struct iwl_rb_allocator *rba = &trans_pcie->rba;
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int free_size = trans->cfg->mq_rx_supported ? sizeof(__le64) :
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sizeof(__le32);
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int i;
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/*
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@ -1022,27 +1081,7 @@ void iwl_pcie_rx_free(struct iwl_trans *trans)
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for (i = 0; i < trans->num_rx_queues; i++) {
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struct iwl_rxq *rxq = &trans_pcie->rxq[i];
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if (rxq->bd)
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dma_free_coherent(trans->dev,
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free_size * rxq->queue_size,
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rxq->bd, rxq->bd_dma);
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rxq->bd_dma = 0;
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rxq->bd = NULL;
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if (rxq->rb_stts)
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dma_free_coherent(trans->dev,
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sizeof(struct iwl_rb_status),
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rxq->rb_stts, rxq->rb_stts_dma);
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else
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IWL_DEBUG_INFO(trans,
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"Free rxq->rb_stts which is NULL\n");
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if (rxq->used_bd)
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dma_free_coherent(trans->dev,
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sizeof(__le32) * rxq->queue_size,
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rxq->used_bd, rxq->used_bd_dma);
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rxq->used_bd_dma = 0;
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rxq->used_bd = NULL;
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iwl_pcie_free_rxq_dma(trans, rxq);
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if (rxq->napi.poll)
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netif_napi_del(&rxq->napi);
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