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stmmac: review private structure fields
recently many new supports have been added in the stmmac driver w/o taking care about where each new field had to be placed inside the private structure for guaranteeing the best cache usage. This is what I wanted in the beginning, so this patch reorganizes all the fields in order to keep adjacent fields for cache effect. I have also tried to optimize them by using pahole. V2: do not abuse with ____cacheline_aligned_in_smp and keep fields that potentially could stay in the same cache-line for better usage in SMP systems. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -35,36 +35,45 @@
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struct stmmac_priv {
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struct stmmac_priv {
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/* Frequently used values are kept adjacent for cache effect */
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/* Frequently used values are kept adjacent for cache effect */
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struct dma_desc *dma_tx ____cacheline_aligned; /* Basic TX desc */
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struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
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struct dma_extended_desc *dma_etx; /* Extended TX descriptor */
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struct dma_desc *dma_tx;
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dma_addr_t dma_tx_phy;
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struct sk_buff **tx_skbuff;
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struct sk_buff **tx_skbuff;
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dma_addr_t *tx_skbuff_dma;
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unsigned int cur_tx;
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unsigned int cur_tx;
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unsigned int dirty_tx;
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unsigned int dirty_tx;
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unsigned int dma_tx_size;
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unsigned int dma_tx_size;
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u32 tx_count_frames;
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u32 tx_coal_frames;
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u32 tx_coal_timer;
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dma_addr_t *tx_skbuff_dma;
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dma_addr_t dma_tx_phy;
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int tx_coalesce;
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int tx_coalesce;
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int hwts_tx_en;
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spinlock_t tx_lock;
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bool tx_path_in_lpi_mode;
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struct timer_list txtimer;
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struct dma_desc *dma_rx; /* Basic RX descriptor */
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struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
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struct dma_extended_desc *dma_erx; /* Extended RX descriptor */
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struct dma_extended_desc *dma_erx;
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struct sk_buff **rx_skbuff;
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unsigned int cur_rx;
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unsigned int cur_rx;
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unsigned int dirty_rx;
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unsigned int dirty_rx;
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struct sk_buff **rx_skbuff;
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dma_addr_t *rx_skbuff_dma;
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struct net_device *dev;
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dma_addr_t dma_rx_phy;
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unsigned int dma_rx_size;
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unsigned int dma_rx_size;
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unsigned int dma_buf_sz;
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unsigned int dma_buf_sz;
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u32 rx_riwt;
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int hwts_rx_en;
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dma_addr_t *rx_skbuff_dma;
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dma_addr_t dma_rx_phy;
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struct napi_struct napi ____cacheline_aligned_in_smp;
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void __iomem *ioaddr;
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struct net_device *dev;
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struct device *device;
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struct device *device;
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struct mac_device_info *hw;
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struct mac_device_info *hw;
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void __iomem *ioaddr;
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struct stmmac_extra_stats xstats;
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struct napi_struct napi;
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int no_csum_insertion;
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int no_csum_insertion;
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spinlock_t lock;
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struct phy_device *phydev;
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struct phy_device *phydev ____cacheline_aligned_in_smp;
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int oldlink;
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int oldlink;
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int speed;
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int speed;
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int oldduplex;
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int oldduplex;
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@ -73,39 +82,30 @@ struct stmmac_priv {
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struct mii_bus *mii;
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struct mii_bus *mii;
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int mii_irq[PHY_MAX_ADDR];
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int mii_irq[PHY_MAX_ADDR];
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struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
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struct plat_stmmacenet_data *plat;
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struct dma_features dma_cap;
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struct stmmac_counters mmc;
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int hw_cap_support;
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int synopsys_id;
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u32 msg_enable;
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u32 msg_enable;
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spinlock_t lock;
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spinlock_t tx_lock;
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int wolopts;
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int wolopts;
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int wol_irq;
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int wol_irq;
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struct plat_stmmacenet_data *plat;
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struct stmmac_counters mmc;
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struct dma_features dma_cap;
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int hw_cap_support;
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struct clk *stmmac_clk;
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struct clk *stmmac_clk;
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int clk_csr;
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int clk_csr;
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int synopsys_id;
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struct timer_list eee_ctrl_timer;
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struct timer_list eee_ctrl_timer;
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bool tx_path_in_lpi_mode;
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int lpi_irq;
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int lpi_irq;
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int eee_enabled;
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int eee_enabled;
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int eee_active;
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int eee_active;
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int tx_lpi_timer;
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int tx_lpi_timer;
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struct timer_list txtimer;
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int pcs;
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u32 tx_count_frames;
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u32 tx_coal_frames;
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u32 tx_coal_timer;
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int use_riwt;
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u32 rx_riwt;
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unsigned int mode;
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unsigned int mode;
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int extend_desc;
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int extend_desc;
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int pcs;
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int hwts_tx_en;
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int hwts_rx_en;
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unsigned int default_addend;
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u32 adv_ts;
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struct ptp_clock *ptp_clock;
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struct ptp_clock *ptp_clock;
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struct ptp_clock_info ptp_clock_ops;
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struct ptp_clock_info ptp_clock_ops;
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unsigned int default_addend;
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u32 adv_ts;
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int use_riwt;
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spinlock_t ptp_lock;
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spinlock_t ptp_lock;
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};
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};
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