mirror of https://gitee.com/openkylin/linux.git
ide: remove ->dma_master field from ide_hwif_t (take 5)
* Convert cmd64x, hpt366 and pdc202xx_old host drivers to use pci_resource_start(hwif->pci_dev, 4) instead of hwif->dma_master. * Remove no longer needed ->dma_master field from ide_hwif_t. v2: * Use the more readable 'hwif->dma_base - (hwif->channel * 8)' instead of pci_resource_start(hwif->pci_dev, 4). v3: * Use hwif->extra_base in hpt366/pdc20xx_old + some cosmetic fixups over v2 (suggested by Sergei). v4: * Correct offsets in hpt3xxn_set_clock(). v5: * Use hwif->extra_base in hpt366 for _real_ this time. (Noticed by Sergei) Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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@ -968,11 +968,6 @@ void ide_setup_dma(ide_hwif_t *hwif, unsigned long base, unsigned num_ports)
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hwif->dma_base = base;
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if (hwif->mate)
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hwif->dma_master = hwif->channel ? hwif->mate->dma_base : base;
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else
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hwif->dma_master = base;
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if (!(hwif->dma_command))
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hwif->dma_command = hwif->dma_base;
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if (!(hwif->dma_vendor1))
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@ -1014,8 +1009,6 @@ void ide_setup_dma(ide_hwif_t *hwif, unsigned long base, unsigned num_ports)
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hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
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}
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printk("\n");
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BUG_ON(!hwif->dma_master);
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}
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EXPORT_SYMBOL_GPL(ide_setup_dma);
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@ -468,7 +468,6 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif)
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#endif
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hwif->dma_base = tmp_hwif->dma_base;
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hwif->dma_master = tmp_hwif->dma_master;
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hwif->dma_command = tmp_hwif->dma_command;
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hwif->dma_vendor1 = tmp_hwif->dma_vendor1;
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hwif->dma_status = tmp_hwif->dma_status;
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@ -602,7 +601,6 @@ void ide_unregister(unsigned int index)
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(void) ide_release_dma(hwif);
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hwif->dma_base = 0;
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hwif->dma_master = 0;
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hwif->dma_command = 0;
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hwif->dma_vendor1 = 0;
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hwif->dma_status = 0;
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@ -333,14 +333,15 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
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static int cmd648_ide_dma_end (ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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unsigned long base = hwif->dma_base - (hwif->channel * 8);
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int err = __ide_dma_end(drive);
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u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 :
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MRDMODE_INTR_CH0;
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u8 mrdmode = inb(hwif->dma_master + 0x01);
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u8 mrdmode = inb(base + 1);
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/* clear the interrupt bit */
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outb((mrdmode & ~(MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1)) | irq_mask,
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hwif->dma_master + 0x01);
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base + 1);
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return err;
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}
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@ -365,10 +366,11 @@ static int cmd64x_ide_dma_end (ide_drive_t *drive)
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static int cmd648_ide_dma_test_irq (ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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unsigned long base = hwif->dma_base - (hwif->channel * 8);
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u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 :
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MRDMODE_INTR_CH0;
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u8 dma_stat = inb(hwif->dma_status);
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u8 mrdmode = inb(hwif->dma_master + 0x01);
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u8 mrdmode = inb(base + 1);
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#ifdef DEBUG
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printk("%s: dma_stat: 0x%02x mrdmode: 0x%02x irq_mask: 0x%02x\n",
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@ -894,32 +894,33 @@ static int hpt374_ide_dma_end(ide_drive_t *drive)
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static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode)
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{
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u8 scr2 = inb(hwif->dma_master + 0x7b);
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unsigned long base = hwif->extra_base;
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u8 scr2 = inb(base + 0x6b);
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if ((scr2 & 0x7f) == mode)
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return;
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/* Tristate the bus */
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outb(0x80, hwif->dma_master + 0x73);
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outb(0x80, hwif->dma_master + 0x77);
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outb(0x80, base + 0x63);
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outb(0x80, base + 0x67);
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/* Switch clock and reset channels */
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outb(mode, hwif->dma_master + 0x7b);
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outb(0xc0, hwif->dma_master + 0x79);
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outb(mode, base + 0x6b);
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outb(0xc0, base + 0x69);
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/*
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* Reset the state machines.
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* NOTE: avoid accidentally enabling the disabled channels.
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*/
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outb(inb(hwif->dma_master + 0x70) | 0x32, hwif->dma_master + 0x70);
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outb(inb(hwif->dma_master + 0x74) | 0x32, hwif->dma_master + 0x74);
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outb(inb(base + 0x60) | 0x32, base + 0x60);
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outb(inb(base + 0x64) | 0x32, base + 0x64);
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/* Complete reset */
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outb(0x00, hwif->dma_master + 0x79);
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outb(0x00, base + 0x69);
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/* Reconnect channels to bus */
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outb(0x00, hwif->dma_master + 0x73);
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outb(0x00, hwif->dma_master + 0x77);
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outb(0x00, base + 0x63);
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outb(0x00, base + 0x67);
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}
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/**
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@ -162,7 +162,7 @@ static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif)
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*/
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static void pdc_old_enable_66MHz_clock(ide_hwif_t *hwif)
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{
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unsigned long clock_reg = hwif->dma_master + 0x11;
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unsigned long clock_reg = hwif->extra_base + 0x01;
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u8 clock = inb(clock_reg);
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outb(clock | (hwif->channel ? 0x08 : 0x02), clock_reg);
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@ -170,7 +170,7 @@ static void pdc_old_enable_66MHz_clock(ide_hwif_t *hwif)
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static void pdc_old_disable_66MHz_clock(ide_hwif_t *hwif)
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{
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unsigned long clock_reg = hwif->dma_master + 0x11;
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unsigned long clock_reg = hwif->extra_base + 0x01;
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u8 clock = inb(clock_reg);
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outb(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg);
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@ -193,7 +193,7 @@ static void pdc202xx_old_ide_dma_start(ide_drive_t *drive)
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if (drive->media != ide_disk || drive->addressing == 1) {
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struct request *rq = HWGROUP(drive)->rq;
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ide_hwif_t *hwif = HWIF(drive);
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unsigned long high_16 = hwif->dma_master;
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unsigned long high_16 = hwif->extra_base - 16;
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unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20);
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u32 word_count = 0;
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u8 clock = inb(high_16 + 0x11);
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@ -212,7 +212,7 @@ static int pdc202xx_old_ide_dma_end(ide_drive_t *drive)
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{
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if (drive->media != ide_disk || drive->addressing == 1) {
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ide_hwif_t *hwif = HWIF(drive);
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unsigned long high_16 = hwif->dma_master;
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unsigned long high_16 = hwif->extra_base - 16;
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unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20);
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u8 clock = 0;
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@ -228,7 +228,7 @@ static int pdc202xx_old_ide_dma_end(ide_drive_t *drive)
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static int pdc202xx_old_ide_dma_test_irq(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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unsigned long high_16 = hwif->dma_master;
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unsigned long high_16 = hwif->extra_base - 16;
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u8 dma_stat = inb(hwif->dma_status);
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u8 sc1d = inb(high_16 + 0x001d);
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@ -271,7 +271,7 @@ static void pdc202xx_dma_timeout(ide_drive_t *drive)
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static void pdc202xx_reset_host (ide_hwif_t *hwif)
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{
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unsigned long high_16 = hwif->dma_master;
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unsigned long high_16 = hwif->extra_base - 16;
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u8 udma_speed_flag = inb(high_16 | 0x001f);
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outb(udma_speed_flag | 0x10, high_16 | 0x001f);
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@ -766,7 +766,6 @@ typedef struct hwif_s {
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int rqsize; /* max sectors per request */
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int irq; /* our irq number */
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unsigned long dma_master; /* reference base addr dmabase */
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unsigned long dma_base; /* base addr for dma ports */
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unsigned long dma_command; /* dma command register */
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unsigned long dma_vendor1; /* dma vendor 1 register */
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