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arm64: dts: qcom: msm8916: Add i2c-qcom-cci node 

The msm8916 CCI controller provides one CCI/I2C bus.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200324155843.10719-2-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Loic Poulain 2020-03-24 16:58:37 +01:00 committed by Bjorn Andersson
parent 75e85d53fa
commit 1c51a4aba5
1 changed files with 27 additions and 0 deletions
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27
arch/arm64/boot/dts/qcom/msm8916.dtsi
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@ -1604,6 +1604,33 @@ ports {
#size-cells = <0>;
};
};
cci: cci@1b0c000 {
compatible = "qcom,msm8916-cci";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1b0c000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
<&gcc GCC_CAMSS_CCI_AHB_CLK>,
<&gcc GCC_CAMSS_CCI_CLK>,
<&gcc GCC_CAMSS_AHB_CLK>;
clock-names = "camss_top_ahb", "cci_ahb",
"cci", "camss_ahb";
assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
<&gcc GCC_CAMSS_CCI_CLK>;
assigned-clock-rates = <80000000>, <19200000>;
pinctrl-names = "default";
pinctrl-0 = <&cci0_default>;
status = "disabled";
cci_i2c0: i2c-bus@0 {
reg = <0>;
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;
};
};
};
smd {