mirror of https://gitee.com/openkylin/linux.git
spi: stm32: Fix comments compilation warnings
Fix all functions and structure descriptions to have the driver warning free when built with W=1. Signed-off-by: Alain Volmat <alain.volmat@st.com> Reviewed-by: Amelie Delaunay <amelie.delaunay@st.com> Link: https://lore.kernel.org/r/1584711857-9162-1-git-send-email-alain.volmat@st.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Alain Volmat
Mark Brown
parent
c528ecfbef
commit
1c52be8bed
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@ -175,7 +175,7 @@
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#define SPI_DMA_MIN_BYTES 16
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/**
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* stm32_spi_reg - stm32 SPI register & bitfield desc
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* struct stm32_spi_reg - stm32 SPI register & bitfield desc
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* @reg: register offset
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* @mask: bitfield mask
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* @shift: left shift
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@ -187,16 +187,16 @@ struct stm32_spi_reg {
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};
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/**
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* stm32_spi_regspec - stm32 registers definition, compatible dependent data
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* en: enable register and SPI enable bit
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* dma_rx_en: SPI DMA RX enable register end SPI DMA RX enable bit
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* dma_tx_en: SPI DMA TX enable register end SPI DMA TX enable bit
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* cpol: clock polarity register and polarity bit
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* cpha: clock phase register and phase bit
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* lsb_first: LSB transmitted first register and bit
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* br: baud rate register and bitfields
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* rx: SPI RX data register
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* tx: SPI TX data register
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* struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
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* @en: enable register and SPI enable bit
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* @dma_rx_en: SPI DMA RX enable register end SPI DMA RX enable bit
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* @dma_tx_en: SPI DMA TX enable register end SPI DMA TX enable bit
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* @cpol: clock polarity register and polarity bit
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* @cpha: clock phase register and phase bit
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* @lsb_first: LSB transmitted first register and bit
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* @br: baud rate register and bitfields
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* @rx: SPI RX data register
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* @tx: SPI TX data register
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*/
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struct stm32_spi_regspec {
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const struct stm32_spi_reg en;
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@ -213,7 +213,7 @@ struct stm32_spi_regspec {
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struct stm32_spi;
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/**
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* stm32_spi_cfg - stm32 compatible configuration data
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* struct stm32_spi_cfg - stm32 compatible configuration data
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* @regs: registers descriptions
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* @get_fifo_size: routine to get fifo size
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* @get_bpw_mask: routine to get bits per word mask
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@ -223,13 +223,13 @@ struct stm32_spi;
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* @set_mode: routine to configure registers to desired mode
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* @set_data_idleness: optional routine to configure registers to desired idle
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* time between frames (if driver has this functionality)
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* set_number_of_data: optional routine to configure registers to desired
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* @set_number_of_data: optional routine to configure registers to desired
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* number of data (if driver has this functionality)
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* @can_dma: routine to determine if the transfer is eligible for DMA use
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* @transfer_one_dma_start: routine to start transfer a single spi_transfer
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* using DMA
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* @dma_rx cb: routine to call after DMA RX channel operation is complete
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* @dma_tx cb: routine to call after DMA TX channel operation is complete
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* @dma_rx_cb: routine to call after DMA RX channel operation is complete
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* @dma_tx_cb: routine to call after DMA TX channel operation is complete
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* @transfer_one_irq: routine to configure interrupts for driver
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* @irq_handler_event: Interrupt handler for SPI controller events
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* @irq_handler_thread: thread of interrupt handler for SPI controller
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@ -587,6 +587,7 @@ static void stm32f4_spi_read_rx(struct stm32_spi *spi)
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/**
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* stm32h7_spi_read_rxfifo - Read bytes in Receive Data Register
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* @spi: pointer to the spi controller data structure
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* @flush: boolean indicating that FIFO should be flushed
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*
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* Write in rx_buf depends on remaining bytes to avoid to write beyond
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* rx_buf end.
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@ -756,6 +757,9 @@ static void stm32h7_spi_disable(struct stm32_spi *spi)
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/**
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* stm32_spi_can_dma - Determine if the transfer is eligible for DMA use
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* @master: controller master interface
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* @spi_dev: pointer to the spi device
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* @transfer: pointer to spi transfer
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*
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* If driver has fifo and the current transfer size is greater than fifo size,
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* use DMA. Otherwise use DMA for transfer longer than defined DMA min bytes.
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@ -974,6 +978,8 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id)
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/**
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* stm32_spi_prepare_msg - set up the controller to transfer a single message
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* @master: controller master interface
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* @msg: pointer to spi message
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*/
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static int stm32_spi_prepare_msg(struct spi_master *master,
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struct spi_message *msg)
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@ -1026,6 +1032,7 @@ static int stm32_spi_prepare_msg(struct spi_master *master,
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/**
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* stm32f4_spi_dma_tx_cb - dma callback
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* @data: pointer to the spi controller data structure
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*
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* DMA callback is called when the transfer is complete for DMA TX channel.
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*/
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@ -1041,6 +1048,7 @@ static void stm32f4_spi_dma_tx_cb(void *data)
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/**
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* stm32f4_spi_dma_rx_cb - dma callback
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* @data: pointer to the spi controller data structure
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*
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* DMA callback is called when the transfer is complete for DMA RX channel.
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*/
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@ -1054,6 +1062,7 @@ static void stm32f4_spi_dma_rx_cb(void *data)
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/**
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* stm32h7_spi_dma_cb - dma callback
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* @data: pointer to the spi controller data structure
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*
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* DMA callback is called when the transfer is complete or when an error
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* occurs. If the transfer is complete, EOT flag is raised.
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@ -1079,6 +1088,9 @@ static void stm32h7_spi_dma_cb(void *data)
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/**
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* stm32_spi_dma_config - configure dma slave channel depending on current
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* transfer bits_per_word.
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* @spi: pointer to the spi controller data structure
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* @dma_conf: pointer to the dma_slave_config structure
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* @dir: direction of the dma transfer
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*/
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static void stm32_spi_dma_config(struct stm32_spi *spi,
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struct dma_slave_config *dma_conf,
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@ -1126,6 +1138,7 @@ static void stm32_spi_dma_config(struct stm32_spi *spi,
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/**
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* stm32f4_spi_transfer_one_irq - transfer a single spi_transfer using
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* interrupts
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* @spi: pointer to the spi controller data structure
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*
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* It must returns 0 if the transfer is finished or 1 if the transfer is still
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* in progress.
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@ -1166,6 +1179,7 @@ static int stm32f4_spi_transfer_one_irq(struct stm32_spi *spi)
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/**
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* stm32h7_spi_transfer_one_irq - transfer a single spi_transfer using
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* interrupts
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* @spi: pointer to the spi controller data structure
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*
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* It must returns 0 if the transfer is finished or 1 if the transfer is still
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* in progress.
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@ -1207,6 +1221,7 @@ static int stm32h7_spi_transfer_one_irq(struct stm32_spi *spi)
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/**
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* stm32f4_spi_transfer_one_dma_start - Set SPI driver registers to start
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* transfer using DMA
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* @spi: pointer to the spi controller data structure
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*/
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static void stm32f4_spi_transfer_one_dma_start(struct stm32_spi *spi)
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{
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@ -1227,6 +1242,7 @@ static void stm32f4_spi_transfer_one_dma_start(struct stm32_spi *spi)
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/**
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* stm32h7_spi_transfer_one_dma_start - Set SPI driver registers to start
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* transfer using DMA
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* @spi: pointer to the spi controller data structure
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*/
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static void stm32h7_spi_transfer_one_dma_start(struct stm32_spi *spi)
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{
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@ -1243,6 +1259,8 @@ static void stm32h7_spi_transfer_one_dma_start(struct stm32_spi *spi)
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/**
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* stm32_spi_transfer_one_dma - transfer a single spi_transfer using DMA
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* @spi: pointer to the spi controller data structure
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* @xfer: pointer to the spi_transfer structure
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*
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* It must returns 0 if the transfer is finished or 1 if the transfer is still
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* in progress.
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@ -1405,7 +1423,7 @@ static void stm32_spi_set_mbr(struct stm32_spi *spi, u32 mbrdiv)
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/**
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* stm32_spi_communication_type - return transfer communication type
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* @spi_dev: pointer to the spi device
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* transfer: pointer to spi transfer
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* @transfer: pointer to spi transfer
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*/
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static unsigned int stm32_spi_communication_type(struct spi_device *spi_dev,
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struct spi_transfer *transfer)
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@ -1522,7 +1540,7 @@ static void stm32h7_spi_data_idleness(struct stm32_spi *spi, u32 len)
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/**
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* stm32h7_spi_number_of_data - configure number of data at current transfer
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* @spi: pointer to the spi controller data structure
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* @len: transfer length
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* @nb_words: transfer length (in words)
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*/
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static int stm32h7_spi_number_of_data(struct stm32_spi *spi, u32 nb_words)
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{
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@ -1546,6 +1564,9 @@ static int stm32h7_spi_number_of_data(struct stm32_spi *spi, u32 nb_words)
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* stm32_spi_transfer_one_setup - common setup to transfer a single
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* spi_transfer either using DMA or
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* interrupts.
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* @spi: pointer to the spi controller data structure
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* @spi_dev: pointer to the spi device
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* @transfer: pointer to spi transfer
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*/
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static int stm32_spi_transfer_one_setup(struct stm32_spi *spi,
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struct spi_device *spi_dev,
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@ -1625,6 +1646,9 @@ static int stm32_spi_transfer_one_setup(struct stm32_spi *spi,
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/**
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* stm32_spi_transfer_one - transfer a single spi_transfer
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* @master: controller master interface
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* @spi_dev: pointer to the spi device
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* @transfer: pointer to spi transfer
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*
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* It must return 0 if the transfer is finished or 1 if the transfer is still
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* in progress.
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@ -1658,6 +1682,8 @@ static int stm32_spi_transfer_one(struct spi_master *master,
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/**
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* stm32_spi_unprepare_msg - relax the hardware
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* @master: controller master interface
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* @msg: pointer to the spi message
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*/
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static int stm32_spi_unprepare_msg(struct spi_master *master,
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struct spi_message *msg)
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@ -1671,6 +1697,7 @@ static int stm32_spi_unprepare_msg(struct spi_master *master,
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/**
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* stm32f4_spi_config - Configure SPI controller as SPI master
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* @spi: pointer to the spi controller data structure
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*/
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static int stm32f4_spi_config(struct stm32_spi *spi)
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{
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@ -1701,6 +1728,7 @@ static int stm32f4_spi_config(struct stm32_spi *spi)
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/**
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* stm32h7_spi_config - Configure SPI controller as SPI master
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* @spi: pointer to the spi controller data structure
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*/
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static int stm32h7_spi_config(struct stm32_spi *spi)
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{
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