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pinctrl: sh-pfc: r8a77970: Rename IOCTRLx registers
The R-Car Gen3 HardWare Manual Errata for Rev. 1.00 (Jul 2, 2018) renamed the various miscellaneous I/O control registers (IOCTRLx) on R-Car V3M, to reflect better their actual purposes, and matching other SoCs. Update the code to match this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
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@ -2406,15 +2406,15 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
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};
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enum ioctrl_regs {
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IOCTRL30,
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IOCTRL31,
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IOCTRL32,
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POCCTRL0,
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POCCTRL1,
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POCCTRL2,
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};
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static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
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[IOCTRL30] = { 0xe6060380 },
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[IOCTRL31] = { 0xe6060384 },
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[IOCTRL32] = { 0xe6060388 },
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[POCCTRL0] = { 0xe6060380 },
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[POCCTRL1] = { 0xe6060384 },
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[POCCTRL2] = { 0xe6060388 },
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{ /* sentinel */ },
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};
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@ -2423,13 +2423,13 @@ static int r8a77970_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
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{
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int bit = pin & 0x1f;
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*pocctrl = pinmux_ioctrl_regs[IOCTRL30].reg;
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*pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;
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if (pin >= RCAR_GP_PIN(0, 0) && pin <= RCAR_GP_PIN(0, 21))
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return bit;
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if (pin >= RCAR_GP_PIN(2, 0) && pin <= RCAR_GP_PIN(2, 9))
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return bit + 22;
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*pocctrl = pinmux_ioctrl_regs[IOCTRL31].reg;
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*pocctrl = pinmux_ioctrl_regs[POCCTRL1].reg;
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if (pin >= RCAR_GP_PIN(2, 10) && pin <= RCAR_GP_PIN(2, 16))
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return bit - 10;
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if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 16))
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