mirror of https://gitee.com/openkylin/linux.git
drm/amdgpu/dce6: add dce_v6_0_disable_dce
Needed for virtual dce support Reviewed-By: Emily Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -617,6 +617,49 @@ static void dce_v6_0_set_vga_render_state(struct amdgpu_device *adev,
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}
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static int dce_v6_0_get_num_crtc(struct amdgpu_device *adev)
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{
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int num_crtc = 0;
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switch (adev->asic_type) {
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case CHIP_TAHITI:
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case CHIP_PITCAIRN:
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case CHIP_VERDE:
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num_crtc = 6;
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break;
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case CHIP_OLAND:
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num_crtc = 2;
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break;
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default:
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num_crtc = 0;
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}
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return num_crtc;
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}
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void dce_v6_0_disable_dce(struct amdgpu_device *adev)
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{
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/*Disable VGA render and enabled crtc, if has DCE engine*/
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if (amdgpu_atombios_has_dce_engine_info(adev)) {
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u32 tmp;
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int crtc_enabled, i;
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dce_v6_0_set_vga_render_state(adev, false);
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/*Disable crtc*/
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for (i = 0; i < dce_v6_0_get_num_crtc(adev); i++) {
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crtc_enabled = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]) &
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EVERGREEN_CRTC_MASTER_EN;
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if (crtc_enabled) {
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WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
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tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);
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tmp &= ~EVERGREEN_CRTC_MASTER_EN;
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WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);
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WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
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}
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}
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}
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}
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static void dce_v6_0_program_fmt(struct drm_encoder *encoder)
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{
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@ -2338,21 +2381,20 @@ static int dce_v6_0_early_init(void *handle)
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dce_v6_0_set_display_funcs(adev);
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dce_v6_0_set_irq_funcs(adev);
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adev->mode_info.num_crtc = dce_v6_0_get_num_crtc(adev);
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switch (adev->asic_type) {
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case CHIP_TAHITI:
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case CHIP_PITCAIRN:
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case CHIP_VERDE:
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adev->mode_info.num_crtc = 6;
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adev->mode_info.num_hpd = 6;
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adev->mode_info.num_dig = 6;
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break;
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case CHIP_OLAND:
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adev->mode_info.num_crtc = 2;
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adev->mode_info.num_hpd = 2;
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adev->mode_info.num_dig = 2;
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break;
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default:
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/* FIXME: not supported yet */
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return -EINVAL;
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}
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@ -26,4 +26,6 @@
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extern const struct amd_ip_funcs dce_v6_0_ip_funcs;
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void dce_v6_0_disable_dce(struct amdgpu_device *adev);
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#endif
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