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ARM: dts: keystone: Add "ti,da830-uart" compatible string 

The TI Keystone SoCs have extra UART registers beyond the standard 8250
registers, so we need a new compatible string to indicate this. Also, at
least one of these registers uses the full 32 bits, so we need to specify
reg-io-width in addition to reg-shift.

"ns16550a" is left in the compatible specification since it does work as
long as the bootloader configures the SoC UART power management registers.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
This commit is contained in:
David Lechner 2017-01-06 11:07:01 -08:00 committed by Santosh Shilimkar
parent 7ce7d89f48
commit 1dd5581354
3 changed files with 5 additions and 5 deletions
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2
arch/arm/boot/dts/keystone-k2g.dtsi
View File

@ -90,7 +90,7 @@ devctrl: device-state-control@02620000 {
};
uart0: serial@02530c00 {
compatible = "ns16550a";
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;

4
arch/arm/boot/dts/keystone-k2l.dtsi
View File

@ -35,7 +35,7 @@ soc {
/include/ "keystone-k2l-clocks.dtsi"
uart2: serial@02348400 {
compatible = "ns16550a";
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
@ -45,7 +45,7 @@ uart2: serial@02348400 {
};
uart3: serial@02348800 {
compatible = "ns16550a";
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;

4
arch/arm/boot/dts/keystone.dtsi
View File

@ -98,7 +98,7 @@ rstctrl: reset-controller {
/include/ "keystone-clocks.dtsi"
uart0: serial@02530c00 {
compatible = "ns16550a";
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
@ -108,7 +108,7 @@ uart0: serial@02530c00 {
};
uart1: serial@02531000 {
compatible = "ns16550a";
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;