drm/amdgpu: Added ASIC specific check in gmc v9.0 ECC interrupt programming sequence

Devices newer then VEGA10/12 shall have these programming sequences performed by PSP BL

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
John Clements 2019-12-20 16:21:32 +08:00 committed by Alex Deucher
parent 56ca8628ac
commit 1e2c6d5582
1 changed files with 5 additions and 0 deletions

View File

@ -207,6 +207,11 @@ static int gmc_v9_0_ecc_interrupt_state(struct amdgpu_device *adev,
{
u32 bits, i, tmp, reg;
/* Devices newer then VEGA10/12 shall have these programming
sequences performed by PSP BL */
if (adev->asic_type >= CHIP_VEGA20)
return 0;
bits = 0x7f;
switch (state) {