mirror of https://gitee.com/openkylin/linux.git
drm/i915/gtt: Prefer i915_vm_is_48bit() over macro
If we setup the vm size early, we can use the newly introduced i915_vm_is_48bit() in majority of callsites wanting to know the vm size. As we operate either with 3lvl or 4lvl page table structure, wrap the vm size query inside a function which tells us if 4lvl setup is needed for particular vm, as the following code uses the function names where level is noted. v2: use_4lvl (Chris) Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1488295691-9404-3-git-send-email-mika.kuoppala@intel.com
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@ -548,13 +548,18 @@ static void __pdp_fini(struct i915_page_directory_pointer *pdp)
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pdp->page_directory = NULL;
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}
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static inline bool use_4lvl(const struct i915_address_space *vm)
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{
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return i915_vm_is_48bit(vm);
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}
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static struct i915_page_directory_pointer *
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alloc_pdp(struct i915_address_space *vm)
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{
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struct i915_page_directory_pointer *pdp;
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int ret = -ENOMEM;
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WARN_ON(!USES_FULL_48BIT_PPGTT(vm->i915));
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WARN_ON(!use_4lvl(vm));
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pdp = kzalloc(sizeof(*pdp), GFP_KERNEL);
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if (!pdp)
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@ -582,10 +587,12 @@ static void free_pdp(struct i915_address_space *vm,
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struct i915_page_directory_pointer *pdp)
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{
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__pdp_fini(pdp);
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if (USES_FULL_48BIT_PPGTT(vm->i915)) {
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cleanup_px(vm, pdp);
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kfree(pdp);
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}
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if (!use_4lvl(vm))
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return;
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cleanup_px(vm, pdp);
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kfree(pdp);
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}
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static void gen8_initialize_pdp(struct i915_address_space *vm,
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@ -739,7 +746,7 @@ static void gen8_ppgtt_set_pdpe(struct i915_address_space *vm,
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gen8_ppgtt_pdpe_t *vaddr;
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pdp->page_directory[pdpe] = pd;
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if (!USES_FULL_48BIT_PPGTT(vm->i915))
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if (!use_4lvl(vm))
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return;
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vaddr = kmap_atomic_px(pdp);
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@ -804,7 +811,7 @@ static void gen8_ppgtt_clear_4lvl(struct i915_address_space *vm,
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struct i915_page_directory_pointer *pdp;
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unsigned int pml4e;
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GEM_BUG_ON(!USES_FULL_48BIT_PPGTT(vm->i915));
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GEM_BUG_ON(!use_4lvl(vm));
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gen8_for_each_pml4e(pdp, pml4, start, length, pml4e) {
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GEM_BUG_ON(pdp == vm->scratch_pdp);
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@ -968,7 +975,7 @@ static int gen8_init_scratch(struct i915_address_space *vm)
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goto free_pt;
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}
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if (USES_FULL_48BIT_PPGTT(dev)) {
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if (use_4lvl(vm)) {
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vm->scratch_pdp = alloc_pdp(vm);
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if (IS_ERR(vm->scratch_pdp)) {
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ret = PTR_ERR(vm->scratch_pdp);
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@ -978,7 +985,7 @@ static int gen8_init_scratch(struct i915_address_space *vm)
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gen8_initialize_pt(vm, vm->scratch_pt);
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gen8_initialize_pd(vm, vm->scratch_pd);
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if (USES_FULL_48BIT_PPGTT(dev_priv))
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if (use_4lvl(vm))
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gen8_initialize_pdp(vm, vm->scratch_pdp);
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return 0;
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@ -995,12 +1002,13 @@ static int gen8_init_scratch(struct i915_address_space *vm)
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static int gen8_ppgtt_notify_vgt(struct i915_hw_ppgtt *ppgtt, bool create)
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{
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struct i915_address_space *vm = &ppgtt->base;
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struct drm_i915_private *dev_priv = vm->i915;
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enum vgt_g2v_type msg;
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struct drm_i915_private *dev_priv = ppgtt->base.i915;
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int i;
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if (USES_FULL_48BIT_PPGTT(dev_priv)) {
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u64 daddr = px_dma(&ppgtt->pml4);
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if (use_4lvl(vm)) {
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const u64 daddr = px_dma(&ppgtt->pml4);
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I915_WRITE(vgtif_reg(pdp[0].lo), lower_32_bits(daddr));
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I915_WRITE(vgtif_reg(pdp[0].hi), upper_32_bits(daddr));
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@ -1009,7 +1017,7 @@ static int gen8_ppgtt_notify_vgt(struct i915_hw_ppgtt *ppgtt, bool create)
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VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY);
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} else {
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for (i = 0; i < GEN8_LEGACY_PDPES; i++) {
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u64 daddr = i915_page_dir_dma_addr(ppgtt, i);
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const u64 daddr = i915_page_dir_dma_addr(ppgtt, i);
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I915_WRITE(vgtif_reg(pdp[i].lo), lower_32_bits(daddr));
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I915_WRITE(vgtif_reg(pdp[i].hi), upper_32_bits(daddr));
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@ -1026,7 +1034,7 @@ static int gen8_ppgtt_notify_vgt(struct i915_hw_ppgtt *ppgtt, bool create)
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static void gen8_free_scratch(struct i915_address_space *vm)
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{
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if (USES_FULL_48BIT_PPGTT(vm->i915))
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if (use_4lvl(vm))
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free_pdp(vm, vm->scratch_pdp);
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free_pd(vm, vm->scratch_pd);
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free_pt(vm, vm->scratch_pt);
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@ -1072,10 +1080,10 @@ static void gen8_ppgtt_cleanup(struct i915_address_space *vm)
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if (intel_vgpu_active(dev_priv))
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gen8_ppgtt_notify_vgt(ppgtt, false);
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if (!USES_FULL_48BIT_PPGTT(vm->i915))
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gen8_ppgtt_cleanup_3lvl(&ppgtt->base, &ppgtt->pdp);
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else
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if (use_4lvl(vm))
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gen8_ppgtt_cleanup_4lvl(ppgtt);
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else
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gen8_ppgtt_cleanup_3lvl(&ppgtt->base, &ppgtt->pdp);
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gen8_free_scratch(vm);
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}
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@ -1258,9 +1266,7 @@ static void gen8_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
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gen8_pte_encode(vm->scratch_page.daddr, I915_CACHE_LLC);
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u64 start = 0, length = ppgtt->base.total;
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if (!USES_FULL_48BIT_PPGTT(vm->i915)) {
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gen8_dump_pdp(ppgtt, &ppgtt->pdp, start, length, scratch_pte, m);
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} else {
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if (use_4lvl(vm)) {
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u64 pml4e;
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struct i915_pml4 *pml4 = &ppgtt->pml4;
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struct i915_page_directory_pointer *pdp;
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@ -1272,6 +1278,8 @@ static void gen8_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
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seq_printf(m, " PML4E #%llu\n", pml4e);
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gen8_dump_pdp(ppgtt, pdp, start, length, scratch_pte, m);
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}
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} else {
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gen8_dump_pdp(ppgtt, &ppgtt->pdp, start, length, scratch_pte, m);
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}
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}
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@ -1316,12 +1324,19 @@ static int gen8_preallocate_top_level_pdp(struct i915_hw_ppgtt *ppgtt)
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*/
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static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
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{
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struct drm_i915_private *dev_priv = ppgtt->base.i915;
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struct i915_address_space *vm = &ppgtt->base;
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struct drm_i915_private *dev_priv = vm->i915;
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int ret;
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ppgtt->base.total = USES_FULL_48BIT_PPGTT(dev_priv) ?
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1ULL << 48 :
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1ULL << 32;
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ret = gen8_init_scratch(&ppgtt->base);
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if (ret)
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if (ret) {
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ppgtt->base.total = 0;
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return ret;
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}
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ppgtt->base.cleanup = gen8_ppgtt_cleanup;
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ppgtt->base.unbind_vma = ppgtt_unbind_vma;
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@ -1334,14 +1349,13 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
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if (IS_CHERRYVIEW(dev_priv) || IS_BROXTON(dev_priv))
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ppgtt->base.pt_kmap_wc = true;
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if (USES_FULL_48BIT_PPGTT(dev_priv)) {
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if (use_4lvl(vm)) {
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ret = setup_px(&ppgtt->base, &ppgtt->pml4);
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if (ret)
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goto free_scratch;
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gen8_initialize_pml4(&ppgtt->base, &ppgtt->pml4);
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ppgtt->base.total = 1ULL << 48;
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ppgtt->switch_mm = gen8_48b_mm_switch;
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ppgtt->base.allocate_va_range = gen8_ppgtt_alloc_4lvl;
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@ -1352,7 +1366,6 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
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if (ret)
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goto free_scratch;
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ppgtt->base.total = 1ULL << 32;
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ppgtt->switch_mm = gen8_legacy_mm_switch;
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if (intel_vgpu_active(dev_priv)) {
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