ARM: outer cache: add WARN_ON() to outer_disable()

Add WARN_ON() conditions to outer_disable() to ensure that its
requirements aren't violated.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2014-03-16 13:14:38 +00:00
parent bc4f94d85c
commit 1f1d5b745a
3 changed files with 22 additions and 5 deletions

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@ -96,11 +96,7 @@ static inline void outer_flush_all(void)
* cache is pushed out to lower levels of system memory. The note and * cache is pushed out to lower levels of system memory. The note and
* conditions above concerning outer_flush_all() applies here. * conditions above concerning outer_flush_all() applies here.
*/ */
static inline void outer_disable(void) extern void outer_disable(void);
{
if (outer_cache.disable)
outer_cache.disable();
}
/** /**
* outer_resume - restore the cache configuration and re-enable outer cache * outer_resume - restore the cache configuration and re-enable outer cache

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@ -95,6 +95,7 @@ obj-$(CONFIG_CPU_V7M) += proc-v7m.o
AFLAGS_proc-v6.o :=-Wa,-march=armv6 AFLAGS_proc-v6.o :=-Wa,-march=armv6
AFLAGS_proc-v7.o :=-Wa,-march=armv7-a AFLAGS_proc-v7.o :=-Wa,-march=armv7-a
obj-$(CONFIG_OUTER_CACHE) += l2c-common.o
obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o
obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o

20
arch/arm/mm/l2c-common.c Normal file
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@ -0,0 +1,20 @@
/*
* Copyright (C) 2010 ARM Ltd.
* Written by Catalin Marinas <catalin.marinas@arm.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/bug.h>
#include <linux/smp.h>
#include <asm/outercache.h>
void outer_disable(void)
{
WARN_ON(!irqs_disabled());
WARN_ON(num_online_cpus() > 1);
if (outer_cache.disable)
outer_cache.disable();
}