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mlxsw: reg: Add Switch Virtual-Port Enabling register definition 

In order for a port to support {Port, VID} to FID mapping it needs to be
configured to a virtual port mode (as opposed to VLAN mode).

Add the SVPE register, which enables port virtualization.

Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ido Schimmel 2015-10-16 14:01:34 +02:00 committed by David S. Miller
parent 6479023976
commit 1f65da742d
1 changed files with 38 additions and 0 deletions
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38
drivers/net/ethernet/mellanox/mlxsw/reg.h
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@ -976,6 +976,42 @@ static inline void mlxsw_reg_svfa_pack(char *payload, u8 local_port,
mlxsw_reg_svfa_vid_set(payload, vid); mlxsw_reg_svfa_vid_set(payload, vid);
} }
/* SVPE - Switch Virtual-Port Enabling Register
* --------------------------------------------
* Enables port virtualization.
*/
#define MLXSW_REG_SVPE_ID 0x201E
#define MLXSW_REG_SVPE_LEN 0x4
static const struct mlxsw_reg_info mlxsw_reg_svpe = {
.id = MLXSW_REG_SVPE_ID,
.len = MLXSW_REG_SVPE_LEN,
};
/* reg_svpe_local_port
* Local port number
* Access: Index
*
* Note: CPU port is not supported (uses VLAN mode only).
*/
MLXSW_ITEM32(reg, svpe, local_port, 0x00, 16, 8);
/* reg_svpe_vp_en
* Virtual port enable.
* 0 - Disable, VLAN mode (VID to FID).
* 1 - Enable, Virtual port mode ({Port, VID} to FID).
* Access: RW
*/
MLXSW_ITEM32(reg, svpe, vp_en, 0x00, 8, 1);
static inline void mlxsw_reg_svpe_pack(char *payload, u8 local_port,
bool enable)
{
MLXSW_REG_ZERO(svpe, payload);
mlxsw_reg_svpe_local_port_set(payload, local_port);
mlxsw_reg_svpe_vp_en_set(payload, enable);
}
/* SFMR - Switch FID Management Register /* SFMR - Switch FID Management Register
* ------------------------------------- * -------------------------------------
* Creates and configures FIDs. * Creates and configures FIDs.
@ -2241,6 +2277,8 @@ static inline const char *mlxsw_reg_id_str(u16 reg_id)
return "SPMLR"; return "SPMLR";
case MLXSW_REG_SVFA_ID: case MLXSW_REG_SVFA_ID:
return "SVFA"; return "SVFA";
case MLXSW_REG_SVPE_ID:
return "SVPE";
case MLXSW_REG_SFMR_ID: case MLXSW_REG_SFMR_ID:
return "SFMR"; return "SFMR";
case MLXSW_REG_PMLP_ID: case MLXSW_REG_PMLP_ID: