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ARM: dts: keystone: Fix control register range for clktsip 

The control register range for clktsio interferes with clkaemifspi clock.
And it causes issues for NAND/AEMIF. So fix it.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This commit is contained in:
Ivan Khoronzhuk 2014-03-18 15:59:26 -04:00 committed by Santosh Shilimkar
parent 754f67cdfe
commit 1f9f5201a3
1 changed files with 1 additions and 1 deletions
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arch/arm/boot/dts/k2hk-clocks.dtsi
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@ -59,7 +59,7 @@ clktsip: clktsip {
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
clock-output-names = "tsip";
reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
reg = <0x02350000 0xb00>, <0x02350000 0x400>;
reg-names = "control", "domain";
domain-id = <0>;
};