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usb: mtu3: clear SOFTCONN when clear USB3_EN if work as HS mode 

When the controller supports SS mode, but works as HS mode, the
SOFTCONN will not be cleared automatically when clear USB3_EN
by default, this cause an issue that can't disconnect from host,
so clear SOFTCONN when clear USB3_EN when the class driver want
to disable the D+ pullup.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Chunfeng Yun 2018-11-29 10:34:36 +08:00 committed by Greg Kroah-Hartman
parent 94552090cd
commit 1fab219e65
2 changed files with 7 additions and 0 deletions
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2
drivers/usb/mtu3/mtu3_core.c
View File

@ -586,6 +586,8 @@ static void mtu3_regs_init(struct mtu3 *mtu)
mtu3_clrbits(mbase, U3D_LTSSM_CTRL, SOFT_U3_EXIT_EN); mtu3_clrbits(mbase, U3D_LTSSM_CTRL, SOFT_U3_EXIT_EN);
/* automatically build U2 link when U3 detect fail */ /* automatically build U2 link when U3 detect fail */
mtu3_setbits(mbase, U3D_USB2_TEST_MODE, U2U3_AUTO_SWITCH); mtu3_setbits(mbase, U3D_USB2_TEST_MODE, U2U3_AUTO_SWITCH);
/* auto clear SOFT_CONN when clear USB3_EN if work as HS */
mtu3_setbits(mbase, U3D_U3U2_SWITCH_CTRL, SOFTCON_CLR_AUTO_EN);
} }
mtu3_set_speed(mtu); mtu3_set_speed(mtu);

5
drivers/usb/mtu3/mtu3_hw_regs.h
View File

@ -268,6 +268,8 @@
#define U3D_LTSSM_INTR_ENABLE (SSUSB_USB3_MAC_CSR_BASE + 0x013C) #define U3D_LTSSM_INTR_ENABLE (SSUSB_USB3_MAC_CSR_BASE + 0x013C)
#define U3D_LTSSM_INTR (SSUSB_USB3_MAC_CSR_BASE + 0x0140) #define U3D_LTSSM_INTR (SSUSB_USB3_MAC_CSR_BASE + 0x0140)
#define U3D_U3U2_SWITCH_CTRL (SSUSB_USB3_MAC_CSR_BASE + 0x0170)
/*---------------- SSUSB_USB3_MAC_CSR FIELD DEFINITION ----------------*/ /*---------------- SSUSB_USB3_MAC_CSR FIELD DEFINITION ----------------*/
/* U3D_LTSSM_CTRL */ /* U3D_LTSSM_CTRL */
@ -302,6 +304,9 @@
#define SS_DISABLE_INTR BIT(1) #define SS_DISABLE_INTR BIT(1)
#define SS_INACTIVE_INTR BIT(0) #define SS_INACTIVE_INTR BIT(0)
/* U3D_U3U2_SWITCH_CTRL */
#define SOFTCON_CLR_AUTO_EN BIT(0)
/*---------------- SSUSB_USB3_SYS_CSR REGISTER DEFINITION ----------------*/ /*---------------- SSUSB_USB3_SYS_CSR REGISTER DEFINITION ----------------*/
#define U3D_LINK_UX_INACT_TIMER (SSUSB_USB3_SYS_CSR_BASE + 0x020C) #define U3D_LINK_UX_INACT_TIMER (SSUSB_USB3_SYS_CSR_BASE + 0x020C)