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clk: tegra: pll: Update warning message 

Swap out the generic WARN_ON with a WARN which gives more information
about what is happening.

Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Rhyland Klein 2015-06-18 17:28:21 -04:00 committed by Thierry Reding
parent 7db864c9de
commit 204c85d124
1 changed files with 2 additions and 1 deletions
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3
drivers/clk/tegra/clk-pll.c
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@ -692,7 +692,8 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
pdiv = _hw_to_p_div(hw, cfg.p);
if (pdiv < 0) {
WARN_ON(1);
WARN(1, "Clock %s has invalid pdiv value : 0x%x\n",
__clk_get_name(hw->clk), cfg.p);
pdiv = 1;
}