mirror of https://gitee.com/openkylin/linux.git
This finally removes the CLK_IS_ROOT flag by picking up the last few
stragglers that didn't get merged by anyone this time around. Better to do it now than wait for another one to pop up. There's also a minor maintainers update and a Kconfig fix. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJXVoIpAAoJEK0CiJfG5JUlk/wP/Ro3dPTTJW8tf1kabMWwYRym PRsKeBNUbiAbbiDdYFcDVgVrxMpkeRQX+qoTPT37FypMbyDnu+rIEeWqHyyNCdzR 4+di548c8XzStBMPNGaKG+WWVDOU/rRWGrun1vc2NR8JohgWFBx8ciV9Kht4g+Ss 5ggm0E/ZKV5Hj7SuiBVbzMsZ/jufDM/V9NeIHy5Gnz6dPuRBkzrvwu9obJ/QLCWE mh7eRug4C+6xYaQrPbXzgxTXqRJQkk/M27ArodVhvZy16gPr70HC+oNGUJwHk+Fs yiqx9wicQuxNQqibgOC087RjUTDfFcGLdV71ouIQQhWuZFdQlHr9RfKaq+v1g/DB s3n8whjHJAukU4i34btG3Mq1UcoLTL4vkOYMW+2yjvUfdUdY5BtKGphrkPO5xKMP 4hpAKkNW3ViTLn3cJQMuk5OgzPr0XrVjd++GtU7XjczzDKx8j9vTbhyZL0mRl+6s jx8GU4hGuEkuhBIfWENNe2W2rf4TBrfQeiLsJt9nLFY4yqJRNByplkMmL75in/cD PzbF647286PJYJdhjP0n70E2jyZbfyGYaUdZ9rbuwbEtA3XpOq4ZiWG0ZqPi7aOf UickP3QW0AoY4Y0QhZ+thTcNxAZPPq6IfEzFNvzGXArR6msQLYzF9Y1dQ/HuXmZP +tyYKKBCZbKObv463cM3 =JewH -----END PGP SIGNATURE----- Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk fixes from Stephen Boyd: "This finally removes the CLK_IS_ROOT flag by picking up the last few stragglers that didn't get merged by anyone this time around. Better to do it now than wait for another one to pop up. There's also a minor maintainers update and a Kconfig fix" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: nxp: Select MFD_SYSCON for creg driver MAINTAINERS: Add file patterns for clock device tree bindings clk: Remove CLK_IS_ROOT flag clk: microchip: Remove CLK_IS_ROOT powerpc/512x: clk: Remove CLK_IS_ROOT vexpress/spc: Remove CLK_IS_ROOT
This commit is contained in:
commit
2051877c4c
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@ -3086,6 +3086,7 @@ M: Stephen Boyd <sboyd@codeaurora.org>
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L: linux-clk@vger.kernel.org
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
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S: Maintained
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F: Documentation/devicetree/bindings/clock/
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F: drivers/clk/
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X: drivers/clk/clkdev.c
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F: include/linux/clk-pr*
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@ -547,7 +547,7 @@ static struct clk *ve_spc_clk_register(struct device *cpu_dev)
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init.name = dev_name(cpu_dev);
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init.ops = &clk_spc_ops;
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init.flags = CLK_IS_ROOT | CLK_GET_RATE_NOCACHE;
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init.flags = CLK_GET_RATE_NOCACHE;
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init.num_parents = 0;
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return devm_clk_register(cpu_dev, &spc->hw);
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@ -221,7 +221,7 @@ static bool soc_has_mclk_mux0_canin(void)
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/* convenience wrappers around the common clk API */
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static inline struct clk *mpc512x_clk_fixed(const char *name, int rate)
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{
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return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
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return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
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}
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static inline struct clk *mpc512x_clk_factor(
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@ -175,6 +175,7 @@ config COMMON_CLK_KEYSTONE
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config COMMON_CLK_NXP
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def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
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select REGMAP_MMIO if ARCH_LPC32XX
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select MFD_SYSCON if ARCH_LPC18XX
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---help---
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Support for clock providers on NXP platforms.
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@ -180,15 +180,15 @@ static int pic32mzda_clk_probe(struct platform_device *pdev)
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/* register fixed rate clocks */
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clks[POSCCLK] = clk_register_fixed_rate(&pdev->dev, "posc_clk", NULL,
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CLK_IS_ROOT, 24000000);
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0, 24000000);
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clks[FRCCLK] = clk_register_fixed_rate(&pdev->dev, "frc_clk", NULL,
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CLK_IS_ROOT, 8000000);
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0, 8000000);
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clks[BFRCCLK] = clk_register_fixed_rate(&pdev->dev, "bfrc_clk", NULL,
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CLK_IS_ROOT, 8000000);
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0, 8000000);
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clks[LPRCCLK] = clk_register_fixed_rate(&pdev->dev, "lprc_clk", NULL,
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CLK_IS_ROOT, 32000);
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0, 32000);
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clks[UPLLCLK] = clk_register_fixed_rate(&pdev->dev, "usbphy_clk", NULL,
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CLK_IS_ROOT, 24000000);
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0, 24000000);
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/* fixed rate (optional) clock */
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if (of_find_property(np, "microchip,pic32mzda-sosc", NULL)) {
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pr_info("pic32-clk: dt requests SOSC.\n");
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@ -25,7 +25,7 @@
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#define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */
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#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */
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#define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */
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#define CLK_IS_ROOT BIT(4) /* Deprecated: Don't use */
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/* unused */
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#define CLK_IS_BASIC BIT(5) /* Basic clk, can't do a to_clk_foo() */
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#define CLK_GET_RATE_NOCACHE BIT(6) /* do not use the cached clk rate */
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#define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
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