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ARM: dts: imx6q: add PMU
Add ARM Cortex A9 Performance Monitor Unit (PMU) support. On i.MX6 a combined interrupt on hardware line #126 is used (i.MX6 TRM: Performance Unit interrupt). For more details see Documentation/devicetree/bindings/arm/pmu.txt Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -101,6 +101,11 @@ L2: l2-cache@00a02000 {
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cache-level = <2>;
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};
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pmu {
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compatible = "arm,cortex-a9-pmu";
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interrupts = <0 94 0x04>;
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};
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aips-bus@02000000 { /* AIPS1 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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