usb: renesas_usbhs: add support for CNEN bit

For some SoC, CNEN must be set for USB Device mode operation.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Chris Brandt 2019-05-15 10:20:42 -05:00 committed by Greg Kroah-Hartman
parent 97a7968448
commit 2195e3af90
3 changed files with 8 additions and 0 deletions

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@ -114,6 +114,12 @@ void usbhs_sys_function_ctrl(struct usbhs_priv *priv, int enable)
u16 mask = DCFM | DRPD | DPRPU | HSE | USBE; u16 mask = DCFM | DRPD | DPRPU | HSE | USBE;
u16 val = HSE | USBE; u16 val = HSE | USBE;
/* CNEN bit is required for function operation */
if (usbhs_get_dparam(priv, has_cnen)) {
mask |= CNEN;
val |= CNEN;
}
/* /*
* if enable * if enable
* *

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@ -104,6 +104,7 @@ struct usbhs_priv;
/* SYSCFG */ /* SYSCFG */
#define SCKE (1 << 10) /* USB Module Clock Enable */ #define SCKE (1 << 10) /* USB Module Clock Enable */
#define CNEN (1 << 8) /* Single-ended receiver operation Enable */
#define HSE (1 << 7) /* High-Speed Operation Enable */ #define HSE (1 << 7) /* High-Speed Operation Enable */
#define DCFM (1 << 6) /* Controller Function Select */ #define DCFM (1 << 6) /* Controller Function Select */
#define DRPD (1 << 5) /* D+ Line/D- Line Resistance Control */ #define DRPD (1 << 5) /* D+ Line/D- Line Resistance Control */

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@ -190,6 +190,7 @@ struct renesas_usbhs_driver_param {
u32 has_sudmac:1; /* for SUDMAC */ u32 has_sudmac:1; /* for SUDMAC */
u32 has_usb_dmac:1; /* for USB-DMAC */ u32 has_usb_dmac:1; /* for USB-DMAC */
u32 runtime_pwctrl:1; u32 runtime_pwctrl:1;
u32 has_cnen:1;
#define USBHS_USB_DMAC_XFER_SIZE 32 /* hardcode the xfer size */ #define USBHS_USB_DMAC_XFER_SIZE 32 /* hardcode the xfer size */
}; };