mirror of https://gitee.com/openkylin/linux.git
drm/i915: Clarify irq_lock locking, irq handlers
irq handlers always run with interrupts locally disabled, so plain spinlocks is all we need. I've also reviewed again that they all follow the _irq_handler postfix convention. Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -4063,7 +4063,6 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
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struct drm_i915_private *dev_priv = dev->dev_private;
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u16 iir, new_iir;
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u32 pipe_stats[2];
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unsigned long irqflags;
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int pipe;
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u16 flip_mask =
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I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
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@ -4079,7 +4078,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
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* It doesn't set the bit in iir again, but it still produces
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* interrupts (for non-MSI).
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*/
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spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
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spin_lock(&dev_priv->irq_lock);
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if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
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i915_handle_error(dev, false,
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"Command parser error, iir 0x%08x",
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@ -4095,7 +4094,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
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if (pipe_stats[pipe] & 0x8000ffff)
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I915_WRITE(reg, pipe_stats[pipe]);
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}
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spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
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spin_unlock(&dev_priv->irq_lock);
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I915_WRITE16(IIR, iir & ~flip_mask);
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new_iir = I915_READ16(IIR); /* Flush posted writes */
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@ -4249,7 +4248,6 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
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struct drm_device *dev = arg;
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 iir, new_iir, pipe_stats[I915_MAX_PIPES];
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unsigned long irqflags;
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u32 flip_mask =
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I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
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I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;
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@ -4265,7 +4263,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
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* It doesn't set the bit in iir again, but it still produces
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* interrupts (for non-MSI).
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*/
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spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
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spin_lock(&dev_priv->irq_lock);
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if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
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i915_handle_error(dev, false,
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"Command parser error, iir 0x%08x",
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@ -4281,7 +4279,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
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irq_received = true;
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}
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}
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spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
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spin_unlock(&dev_priv->irq_lock);
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if (!irq_received)
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break;
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@ -4476,7 +4474,6 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 iir, new_iir;
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u32 pipe_stats[I915_MAX_PIPES];
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unsigned long irqflags;
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int ret = IRQ_NONE, pipe;
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u32 flip_mask =
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I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
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@ -4493,7 +4490,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
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* It doesn't set the bit in iir again, but it still produces
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* interrupts (for non-MSI).
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*/
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spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
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spin_lock(&dev_priv->irq_lock);
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if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
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i915_handle_error(dev, false,
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"Command parser error, iir 0x%08x",
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@ -4511,7 +4508,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
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irq_received = true;
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}
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}
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spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
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spin_unlock(&dev_priv->irq_lock);
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if (!irq_received)
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break;
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