mirror of https://gitee.com/openkylin/linux.git
R-Car DU miscellaneous changes for v5.2
-----BEGIN PGP SIGNATURE----- iQJWBAABCgBAFiEEvZRkio5H7O2/GZsYYiVdKZ4oCyQFAlycSn4iHGxhdXJlbnQu cGluY2hhcnRAaWRlYXNvbmJvYXJkLmNvbQAKCRBiJV0pnigLJGRKD/47Z/np+m3c FaGafzqCMbOg7UlwQUhFRidDqUpCT+6kx86nw5h7/QJS/sL6TAfbl72fgoYeYqdh XCfhloR7y68RlyBrZYnIlx8O30vLUtoVFlJ136TbydLb76kWCM7lyF36dmcmYg3T XY+UQINmQ7N02MOWlcj+EEvwXy1yw+fpy1gyPJGH6RmyDNsdlLEQJ1856S7I/T2v +8jDG7pECBIvQG84Z/VXmE/lE5Vs6X5toVUgaJrpQg1WmCM+4g307B6xg0+hGGFP +9sNP1zAnzfPwdI24i1NzKWjUyxWwO+Z7vsJGWioRKkQfMXsL9cFMN+G5SjHJWw+ l+RRc9E1KgE1GJy1T1zN1F78LYRMR0FgB7g5UhDnXP/wU2g0ZcrKwZNzOiEK4U5p E8RJoC2lr17TFpj1aJSxAWkh+axirEQZ+nV89Ei6IH06OpDTJWemlg7mwnh/BtFb rbI+aUxv8Y3ow+CL8g+981TEBgfA9Czhz21RU6GepbmMU3ssgI1iq9gn8HGK3eM+ CVWDxvo2NUnzF6iGT1bMtGwTyLgryQBNGwmbpG5tH0y4urmPnrxVqg5ky1/kqwQ0 CyCS5nvZN36JDV2jAqe6FOyk30bfhZ7wP1GOsCq8+EIddL6KxFMZZ4zb3nV9AQDy zMfOzWyhxq5lmEKAwjw17R3Q4zrgxBNK2w== =+jzO -----END PGP SIGNATURE----- Merge tag 'du-next-20190328' of git://linuxtv.org/pinchartl/media into drm-next R-Car DU miscellaneous changes for v5.2 Signed-off-by: Dave Airlie <airlied@redhat.com> From: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190328042035.GA4846@pendragon.ideasonboard.com
This commit is contained in:
commit
233709186c
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@ -32,21 +32,21 @@
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static u32 rcar_du_crtc_read(struct rcar_du_crtc *rcrtc, u32 reg)
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{
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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return rcar_du_read(rcdu, rcrtc->mmio_offset + reg);
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}
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static void rcar_du_crtc_write(struct rcar_du_crtc *rcrtc, u32 reg, u32 data)
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{
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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rcar_du_write(rcdu, rcrtc->mmio_offset + reg, data);
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}
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static void rcar_du_crtc_clr(struct rcar_du_crtc *rcrtc, u32 reg, u32 clr)
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{
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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rcar_du_write(rcdu, rcrtc->mmio_offset + reg,
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rcar_du_read(rcdu, rcrtc->mmio_offset + reg) & ~clr);
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@ -54,7 +54,7 @@ static void rcar_du_crtc_clr(struct rcar_du_crtc *rcrtc, u32 reg, u32 clr)
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static void rcar_du_crtc_set(struct rcar_du_crtc *rcrtc, u32 reg, u32 set)
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{
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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rcar_du_write(rcdu, rcrtc->mmio_offset + reg,
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rcar_du_read(rcdu, rcrtc->mmio_offset + reg) | set);
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@ -62,7 +62,7 @@ static void rcar_du_crtc_set(struct rcar_du_crtc *rcrtc, u32 reg, u32 set)
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void rcar_du_crtc_dsysr_clr_set(struct rcar_du_crtc *rcrtc, u32 clr, u32 set)
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{
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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rcrtc->dsysr = (rcrtc->dsysr & ~clr) | set;
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rcar_du_write(rcdu, rcrtc->mmio_offset + DSYSR, rcrtc->dsysr);
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@ -157,10 +157,9 @@ static void rcar_du_dpll_divider(struct rcar_du_crtc *rcrtc,
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}
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done:
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dev_dbg(rcrtc->group->dev->dev,
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dev_dbg(rcrtc->dev->dev,
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"output:%u, fdpll:%u, n:%u, m:%u, diff:%lu\n",
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dpll->output, dpll->fdpll, dpll->n, dpll->m,
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best_diff);
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dpll->output, dpll->fdpll, dpll->n, dpll->m, best_diff);
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}
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struct du_clk_params {
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@ -212,7 +211,7 @@ static const struct soc_device_attribute rcar_du_r8a7795_es1[] = {
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static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
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{
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const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode;
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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unsigned long mode_clock = mode->clock * 1000;
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u32 dsmr;
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u32 escr;
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@ -277,7 +276,7 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
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rcar_du_escr_divider(rcrtc->extclock, mode_clock,
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ESCR_DCLKSEL_DCLKIN, ¶ms);
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dev_dbg(rcrtc->group->dev->dev, "mode clock %lu %s rate %lu\n",
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dev_dbg(rcrtc->dev->dev, "mode clock %lu %s rate %lu\n",
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mode_clock, params.clk == rcrtc->clock ? "cpg" : "ext",
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params.rate);
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@ -285,7 +284,7 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
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escr = params.escr;
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}
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dev_dbg(rcrtc->group->dev->dev, "%s: ESCR 0x%08x\n", __func__, escr);
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dev_dbg(rcrtc->dev->dev, "%s: ESCR 0x%08x\n", __func__, escr);
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rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? ESCR13 : ESCR02, escr);
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rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? OTAR13 : OTAR02, 0);
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@ -333,7 +332,7 @@ plane_format(struct rcar_du_plane *plane)
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static void rcar_du_crtc_update_planes(struct rcar_du_crtc *rcrtc)
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{
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struct rcar_du_plane *planes[RCAR_DU_NUM_HW_PLANES];
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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unsigned int num_planes = 0;
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unsigned int dptsr_planes;
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unsigned int hwplanes = 0;
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@ -463,7 +462,7 @@ static bool rcar_du_crtc_page_flip_pending(struct rcar_du_crtc *rcrtc)
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static void rcar_du_crtc_wait_page_flip(struct rcar_du_crtc *rcrtc)
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{
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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if (wait_event_timeout(rcrtc->flip_wait,
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!rcar_du_crtc_page_flip_pending(rcrtc),
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@ -493,7 +492,7 @@ static void rcar_du_crtc_setup(struct rcar_du_crtc *rcrtc)
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rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR, 0);
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/* Enable the VSP compositor. */
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if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
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if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
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rcar_du_vsp_enable(rcrtc);
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/* Turn vertical blanking interrupt reporting on. */
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@ -564,7 +563,7 @@ static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc)
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static void rcar_du_crtc_disable_planes(struct rcar_du_crtc *rcrtc)
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{
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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struct drm_crtc *crtc = &rcrtc->crtc;
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u32 status;
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@ -617,7 +616,7 @@ static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc)
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drm_crtc_vblank_off(crtc);
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/* Disable the VSP compositor. */
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if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
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if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
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rcar_du_vsp_disable(rcrtc);
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/*
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@ -627,7 +626,7 @@ static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc)
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* TODO: Find another way to stop the display for DUs that don't support
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* TVM sync.
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*/
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if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_TVM_SYNC))
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if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_TVM_SYNC))
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rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_TVM_MASK,
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DSYSR_TVM_SWITCH);
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@ -666,7 +665,7 @@ static void rcar_du_crtc_atomic_enable(struct drm_crtc *crtc,
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{
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struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
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struct rcar_du_crtc_state *rstate = to_rcar_crtc_state(crtc->state);
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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rcar_du_crtc_get(rcrtc);
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@ -694,7 +693,7 @@ static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc,
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{
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struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
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struct rcar_du_crtc_state *rstate = to_rcar_crtc_state(old_state);
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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rcar_du_crtc_stop(rcrtc);
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rcar_du_crtc_put(rcrtc);
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@ -740,7 +739,7 @@ static void rcar_du_crtc_atomic_begin(struct drm_crtc *crtc,
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*/
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rcar_du_crtc_get(rcrtc);
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if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
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if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
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rcar_du_vsp_atomic_begin(rcrtc);
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}
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@ -762,15 +761,16 @@ static void rcar_du_crtc_atomic_flush(struct drm_crtc *crtc,
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spin_unlock_irqrestore(&dev->event_lock, flags);
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}
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if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
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if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
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rcar_du_vsp_atomic_flush(rcrtc);
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}
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enum drm_mode_status rcar_du_crtc_mode_valid(struct drm_crtc *crtc,
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const struct drm_display_mode *mode)
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static enum drm_mode_status
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rcar_du_crtc_mode_valid(struct drm_crtc *crtc,
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const struct drm_display_mode *mode)
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{
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struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
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unsigned int vbp;
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@ -802,7 +802,7 @@ static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
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static void rcar_du_crtc_crc_init(struct rcar_du_crtc *rcrtc)
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{
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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const char **sources;
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unsigned int count;
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int i = -1;
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@ -986,8 +986,8 @@ static int rcar_du_crtc_verify_crc_source(struct drm_crtc *crtc,
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return 0;
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}
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const char *const *rcar_du_crtc_get_crc_sources(struct drm_crtc *crtc,
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size_t *count)
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static const char *const *
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rcar_du_crtc_get_crc_sources(struct drm_crtc *crtc, size_t *count)
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{
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struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
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@ -1084,7 +1084,7 @@ static const struct drm_crtc_funcs crtc_funcs_gen3 = {
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static irqreturn_t rcar_du_crtc_irq(int irq, void *arg)
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{
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struct rcar_du_crtc *rcrtc = arg;
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struct rcar_du_device *rcdu = rcrtc->group->dev;
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struct rcar_du_device *rcdu = rcrtc->dev;
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irqreturn_t ret = IRQ_NONE;
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u32 status;
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@ -1176,6 +1176,7 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex,
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init_waitqueue_head(&rcrtc->vblank_wait);
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spin_lock_init(&rcrtc->vblank_lock);
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rcrtc->dev = rcdu;
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rcrtc->group = rgrp;
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rcrtc->mmio_offset = mmio_offsets[hwindex];
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rcrtc->index = hwindex;
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@ -25,6 +25,7 @@ struct rcar_du_vsp;
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/**
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* struct rcar_du_crtc - the CRTC, representing a DU superposition processor
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* @crtc: base DRM CRTC
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* @dev: the DU device
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* @clock: the CRTC functional clock
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* @extclock: external pixel dot clock (optional)
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* @mmio_offset: offset of the CRTC registers in the DU MMIO block
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@ -45,6 +46,7 @@ struct rcar_du_vsp;
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struct rcar_du_crtc {
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struct drm_crtc crtc;
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struct rcar_du_device *dev;
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struct clk *clock;
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struct clk *extclock;
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unsigned int mmio_offset;
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@ -102,8 +104,6 @@ enum rcar_du_output {
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int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex,
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unsigned int hwindex);
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void rcar_du_crtc_suspend(struct rcar_du_crtc *rcrtc);
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void rcar_du_crtc_resume(struct rcar_du_crtc *rcrtc);
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void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc);
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|
|
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@ -28,13 +28,33 @@ static const struct drm_encoder_funcs encoder_funcs = {
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.destroy = drm_encoder_cleanup,
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};
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static unsigned int rcar_du_encoder_count_ports(struct device_node *node)
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{
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struct device_node *ports;
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struct device_node *port;
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unsigned int num_ports = 0;
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ports = of_get_child_by_name(node, "ports");
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if (!ports)
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ports = of_node_get(node);
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for_each_child_of_node(ports, port) {
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if (of_node_name_eq(port, "port"))
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num_ports++;
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}
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of_node_put(ports);
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return num_ports;
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}
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int rcar_du_encoder_init(struct rcar_du_device *rcdu,
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enum rcar_du_output output,
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struct device_node *enc_node)
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{
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struct rcar_du_encoder *renc;
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struct drm_encoder *encoder;
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struct drm_bridge *bridge = NULL;
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struct drm_bridge *bridge;
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int ret;
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renc = devm_kzalloc(rcdu->dev, sizeof(*renc), GFP_KERNEL);
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|
@ -48,11 +68,33 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
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dev_dbg(rcdu->dev, "initializing encoder %pOF for output %u\n",
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enc_node, output);
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/* Locate the DRM bridge from the encoder DT node. */
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bridge = of_drm_find_bridge(enc_node);
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if (!bridge) {
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ret = -EPROBE_DEFER;
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goto done;
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/*
|
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* Locate the DRM bridge from the DT node. For the DPAD outputs, if the
|
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* DT node has a single port, assume that it describes a panel and
|
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* create a panel bridge.
|
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*/
|
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if ((output == RCAR_DU_OUTPUT_DPAD0 ||
|
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output == RCAR_DU_OUTPUT_DPAD1) &&
|
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rcar_du_encoder_count_ports(enc_node) == 1) {
|
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struct drm_panel *panel = of_drm_find_panel(enc_node);
|
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|
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if (IS_ERR(panel)) {
|
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ret = PTR_ERR(panel);
|
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goto done;
|
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}
|
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|
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bridge = devm_drm_panel_bridge_add(rcdu->dev, panel,
|
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DRM_MODE_CONNECTOR_DPI);
|
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if (IS_ERR(bridge)) {
|
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ret = PTR_ERR(bridge);
|
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goto done;
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}
|
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} else {
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bridge = of_drm_find_bridge(enc_node);
|
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if (!bridge) {
|
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ret = -EPROBE_DEFER;
|
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goto done;
|
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}
|
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}
|
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|
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ret = drm_encoder_init(rcdu->ddev, encoder, &encoder_funcs,
|
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|
|
|
@ -47,7 +47,7 @@ static void rcar_du_vsp_complete(void *private, unsigned int status, u32 crc)
|
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void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
|
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{
|
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const struct drm_display_mode *mode = &crtc->crtc.state->adjusted_mode;
|
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struct rcar_du_device *rcdu = crtc->group->dev;
|
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struct rcar_du_device *rcdu = crtc->dev;
|
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struct vsp1_du_lif_config cfg = {
|
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.width = mode->hdisplay,
|
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.height = mode->vdisplay,
|
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|
|
|
@ -283,7 +283,7 @@ static void rcar_lvds_d3_e3_pll_calc(struct rcar_lvds *lvds, struct clk *clk,
|
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* divider.
|
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*/
|
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fout = fvco / (1 << e) / div7;
|
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div = DIV_ROUND_CLOSEST(fout, target);
|
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div = max(1UL, DIV_ROUND_CLOSEST(fout, target));
|
||||
diff = abs(fout / div - target);
|
||||
|
||||
if (diff < pll->diff) {
|
||||
|
@ -485,9 +485,13 @@ static void rcar_lvds_enable(struct drm_bridge *bridge)
|
|||
}
|
||||
|
||||
if (lvds->info->quirks & RCAR_LVDS_QUIRK_GEN3_LVEN) {
|
||||
/* Turn on the LVDS PHY. */
|
||||
/*
|
||||
* Turn on the LVDS PHY. On D3, the LVEN and LVRES bit must be
|
||||
* set at the same time, so don't write the register yet.
|
||||
*/
|
||||
lvdcr0 |= LVDCR0_LVEN;
|
||||
rcar_lvds_write(lvds, LVDCR0, lvdcr0);
|
||||
if (!(lvds->info->quirks & RCAR_LVDS_QUIRK_PWD))
|
||||
rcar_lvds_write(lvds, LVDCR0, lvdcr0);
|
||||
}
|
||||
|
||||
if (!(lvds->info->quirks & RCAR_LVDS_QUIRK_EXT_PLL)) {
|
||||
|
@ -531,11 +535,16 @@ static bool rcar_lvds_mode_fixup(struct drm_bridge *bridge,
|
|||
const struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
{
|
||||
struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge);
|
||||
int min_freq;
|
||||
|
||||
/*
|
||||
* The internal LVDS encoder has a restricted clock frequency operating
|
||||
* range (31MHz to 148.5MHz). Clamp the clock accordingly.
|
||||
* range, from 5MHz to 148.5MHz on D3 and E3, and from 31MHz to
|
||||
* 148.5MHz on all other platforms. Clamp the clock accordingly.
|
||||
*/
|
||||
adjusted_mode->clock = clamp(adjusted_mode->clock, 31000, 148500);
|
||||
min_freq = lvds->info->quirks & RCAR_LVDS_QUIRK_EXT_PLL ? 5000 : 31000;
|
||||
adjusted_mode->clock = clamp(adjusted_mode->clock, min_freq, 148500);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
|
|
@ -78,7 +78,7 @@ struct drm_plane_helper_funcs;
|
|||
/**
|
||||
* struct drm_crtc_state - mutable CRTC state
|
||||
*
|
||||
* Note that the distinction between @enable and @active is rather subtile:
|
||||
* Note that the distinction between @enable and @active is rather subtle:
|
||||
* Flipping @active while @enable is set without changing anything else may
|
||||
* never return in a failure from the &drm_mode_config_funcs.atomic_check
|
||||
* callback. Userspace assumes that a DPMS On will always succeed. In other
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
struct drm_clip_rect;
|
||||
struct drm_device;
|
||||
struct drm_file;
|
||||
struct drm_format_info;
|
||||
struct drm_framebuffer;
|
||||
struct drm_gem_object;
|
||||
|
||||
|
|
Loading…
Reference in New Issue