mirror of https://gitee.com/openkylin/linux.git
bnxt_en: Modify bnxt_ring_alloc_send_msg() to support 57500 chips.
Firmware ring allocation semantics are slightly different for most ring types on 57500 chips. Allocation/deallocation for NQ rings are also added for the new chips. A CP ring handle is also added so that from the NQ interrupt event, we can locate the CP ring. Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -4543,14 +4543,53 @@ static int hwrm_ring_alloc_send_msg(struct bnxt *bp,
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case HWRM_RING_ALLOC_RX:
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req.ring_type = RING_ALLOC_REQ_RING_TYPE_RX;
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req.length = cpu_to_le32(bp->rx_ring_mask + 1);
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if (bp->flags & BNXT_FLAG_CHIP_P5) {
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u16 flags = 0;
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/* Association of rx ring with stats context */
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grp_info = &bp->grp_info[ring->grp_idx];
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req.rx_buf_size = cpu_to_le16(bp->rx_buf_use_size);
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req.stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx);
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req.enables |= cpu_to_le32(
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RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID);
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if (NET_IP_ALIGN == 2)
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flags = RING_ALLOC_REQ_FLAGS_RX_SOP_PAD;
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req.flags = cpu_to_le16(flags);
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}
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break;
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case HWRM_RING_ALLOC_AGG:
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req.ring_type = RING_ALLOC_REQ_RING_TYPE_RX;
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if (bp->flags & BNXT_FLAG_CHIP_P5) {
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req.ring_type = RING_ALLOC_REQ_RING_TYPE_RX_AGG;
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/* Association of agg ring with rx ring */
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grp_info = &bp->grp_info[ring->grp_idx];
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req.rx_ring_id = cpu_to_le16(grp_info->rx_fw_ring_id);
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req.rx_buf_size = cpu_to_le16(BNXT_RX_PAGE_SIZE);
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req.stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx);
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req.enables |= cpu_to_le32(
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RING_ALLOC_REQ_ENABLES_RX_RING_ID_VALID |
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RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID);
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} else {
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req.ring_type = RING_ALLOC_REQ_RING_TYPE_RX;
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}
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req.length = cpu_to_le32(bp->rx_agg_ring_mask + 1);
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break;
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case HWRM_RING_ALLOC_CMPL:
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req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;
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req.length = cpu_to_le32(bp->cp_ring_mask + 1);
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if (bp->flags & BNXT_FLAG_CHIP_P5) {
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/* Association of cp ring with nq */
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grp_info = &bp->grp_info[map_index];
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req.nq_ring_id = cpu_to_le16(grp_info->cp_fw_ring_id);
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req.cq_handle = cpu_to_le64(ring->handle);
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req.enables |= cpu_to_le32(
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RING_ALLOC_REQ_ENABLES_NQ_RING_ID_VALID);
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} else if (bp->flags & BNXT_FLAG_USING_MSIX) {
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req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX;
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}
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break;
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case HWRM_RING_ALLOC_NQ:
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req.ring_type = RING_ALLOC_REQ_RING_TYPE_NQ;
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req.length = cpu_to_le32(bp->cp_ring_mask + 1);
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if (bp->flags & BNXT_FLAG_USING_MSIX)
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req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX;
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break;
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@ -4645,7 +4684,10 @@ static int bnxt_hwrm_ring_alloc(struct bnxt *bp)
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int i, rc = 0;
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u32 type;
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type = HWRM_RING_ALLOC_CMPL;
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if (bp->flags & BNXT_FLAG_CHIP_P5)
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type = HWRM_RING_ALLOC_NQ;
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else
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type = HWRM_RING_ALLOC_CMPL;
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for (i = 0; i < bp->cp_nr_rings; i++) {
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struct bnxt_napi *bnapi = bp->bnapi[i];
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struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
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@ -4743,6 +4785,7 @@ static int hwrm_ring_free_send_msg(struct bnxt *bp,
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static void bnxt_hwrm_ring_free(struct bnxt *bp, bool close_path)
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{
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u32 type;
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int i;
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if (!bp->bnapi)
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@ -4781,6 +4824,10 @@ static void bnxt_hwrm_ring_free(struct bnxt *bp, bool close_path)
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}
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}
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if (bp->flags & BNXT_FLAG_CHIP_P5)
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type = RING_FREE_REQ_RING_TYPE_RX_AGG;
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else
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type = RING_FREE_REQ_RING_TYPE_RX;
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for (i = 0; i < bp->rx_nr_rings; i++) {
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struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];
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struct bnxt_ring_struct *ring = &rxr->rx_agg_ring_struct;
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@ -4789,8 +4836,7 @@ static void bnxt_hwrm_ring_free(struct bnxt *bp, bool close_path)
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cmpl_ring_id = bnxt_cp_ring_for_rx(bp, rxr);
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if (ring->fw_ring_id != INVALID_HW_RING_ID) {
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hwrm_ring_free_send_msg(bp, ring,
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RING_FREE_REQ_RING_TYPE_RX,
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hwrm_ring_free_send_msg(bp, ring, type,
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close_path ? cmpl_ring_id :
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INVALID_HW_RING_ID);
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ring->fw_ring_id = INVALID_HW_RING_ID;
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@ -4805,14 +4851,17 @@ static void bnxt_hwrm_ring_free(struct bnxt *bp, bool close_path)
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*/
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bnxt_disable_int_sync(bp);
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if (bp->flags & BNXT_FLAG_CHIP_P5)
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type = RING_FREE_REQ_RING_TYPE_NQ;
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else
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type = RING_FREE_REQ_RING_TYPE_L2_CMPL;
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for (i = 0; i < bp->cp_nr_rings; i++) {
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struct bnxt_napi *bnapi = bp->bnapi[i];
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struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
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struct bnxt_ring_struct *ring = &cpr->cp_ring_struct;
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if (ring->fw_ring_id != INVALID_HW_RING_ID) {
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hwrm_ring_free_send_msg(bp, ring,
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RING_FREE_REQ_RING_TYPE_L2_CMPL,
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hwrm_ring_free_send_msg(bp, ring, type,
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INVALID_HW_RING_ID);
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ring->fw_ring_id = INVALID_HW_RING_ID;
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bp->grp_info[i].cp_fw_ring_id = INVALID_HW_RING_ID;
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@ -634,6 +634,7 @@ struct bnxt_ring_struct {
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u16 grp_idx;
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u16 map_idx; /* Used by cmpl rings */
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};
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u32 handle;
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u8 queue_id;
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};
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