mirror of https://gitee.com/openkylin/linux.git
drm/i915: Add port A HPD support for IVB/HSW
As with ILK/SNB wire up the port A HPD on IVB/HSW. This might be more important on HSW with PSR. BSpec tells us that if the automagic link training performed by the hardware fails for some reason, we're going to get a short HPD and are supposed to re-train the link manyally. v2: 0 initialize pin_mask/long_mask due to intel_get_hpd_pins() changes Add a comment about the pulse duration bits being reserved on HSW+ like we have for LPT+ in ibx_hpd_irq_setup() Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -49,6 +49,10 @@ static const u32 hpd_ilk[HPD_NUM_PINS] = {
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[HPD_PORT_A] = DE_DP_A_HOTPLUG,
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};
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static const u32 hpd_ivb[HPD_NUM_PINS] = {
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[HPD_PORT_A] = DE_DP_A_HOTPLUG_IVB,
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};
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static const u32 hpd_ibx[HPD_NUM_PINS] = {
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[HPD_CRT] = SDE_CRT_HOTPLUG,
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[HPD_SDVO_B] = SDE_SDVOB_HOTPLUG,
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@ -1946,6 +1950,19 @@ static void ivb_display_irq_handler(struct drm_device *dev, u32 de_iir)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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enum pipe pipe;
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u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG_IVB;
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if (hotplug_trigger) {
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u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
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dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
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I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
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intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
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dig_hotplug_reg, hpd_ivb,
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ilk_port_hotplug_long_detect);
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intel_hpd_irq_handler(dev, pin_mask, long_mask);
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}
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if (de_iir & DE_ERR_INT_IVB)
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ivb_err_int_handler(dev);
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@ -3143,14 +3160,20 @@ static void ilk_hpd_irq_setup(struct drm_device *dev)
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 hotplug_irqs, hotplug, enabled_irqs;
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hotplug_irqs = DE_DP_A_HOTPLUG;
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enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ilk);
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if (INTEL_INFO(dev)->gen >= 7) {
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hotplug_irqs = DE_DP_A_HOTPLUG_IVB;
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enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ivb);
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} else {
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hotplug_irqs = DE_DP_A_HOTPLUG;
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enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ilk);
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}
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ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
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/*
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* Enable digital hotplug on the CPU, and configure the DP short pulse
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* duration to 2ms (which is the minimum in the Display Port spec)
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* The pulse duration bits are reserved on HSW+.
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*/
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hotplug = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
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hotplug &= ~DIGITAL_PORTA_PULSE_DURATION_MASK;
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@ -3251,7 +3274,8 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
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DE_PLANEB_FLIP_DONE_IVB |
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DE_PLANEA_FLIP_DONE_IVB | DE_AUX_CHANNEL_A_IVB);
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extra_mask = (DE_PIPEC_VBLANK_IVB | DE_PIPEB_VBLANK_IVB |
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DE_PIPEA_VBLANK_IVB | DE_ERR_INT_IVB);
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DE_PIPEA_VBLANK_IVB | DE_ERR_INT_IVB |
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DE_DP_A_HOTPLUG_IVB);
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} else {
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display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
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DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
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@ -4276,10 +4300,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
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dev->driver->irq_uninstall = ironlake_irq_uninstall;
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dev->driver->enable_vblank = ironlake_enable_vblank;
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dev->driver->disable_vblank = ironlake_disable_vblank;
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if (INTEL_INFO(dev)->gen >= 7)
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dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
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else
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dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
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dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
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} else {
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if (INTEL_INFO(dev_priv)->gen == 2) {
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dev->driver->irq_preinstall = i8xx_irq_preinstall;
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