mirror of https://gitee.com/openkylin/linux.git
powerpc/powernv: Simplify pnv_ioda_setup_pe_seg()
pnv_ioda_setup_pe_seg() associates the IO and M32 segments with the owner PE. The code mapping segments should be fixed and immune from logic changes introduced to pnv_ioda_setup_pe_seg(). This moves the code mapping segments to helper pnv_ioda_setup_pe_res(). The data type for @rc is changed to "int64_t". Also, argument @hose is removed from pnv_ioda_setup_pe() as it can be got from @pe. No functional changes introduced. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-By: Alistair Popple <alistair@popple.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -2929,19 +2929,72 @@ static void pnv_pci_ioda_fixup_iov_resources(struct pci_dev *pdev)
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}
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#endif /* CONFIG_PCI_IOV */
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static void pnv_ioda_setup_pe_res(struct pnv_ioda_pe *pe,
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struct resource *res)
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{
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struct pnv_phb *phb = pe->phb;
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struct pci_bus_region region;
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int index;
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int64_t rc;
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if (!res || !res->flags || res->start > res->end)
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return;
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if (res->flags & IORESOURCE_IO) {
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region.start = res->start - phb->ioda.io_pci_base;
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region.end = res->end - phb->ioda.io_pci_base;
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index = region.start / phb->ioda.io_segsize;
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while (index < phb->ioda.total_pe_num &&
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region.start <= region.end) {
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phb->ioda.io_segmap[index] = pe->pe_number;
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rc = opal_pci_map_pe_mmio_window(phb->opal_id,
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pe->pe_number, OPAL_IO_WINDOW_TYPE, 0, index);
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if (rc != OPAL_SUCCESS) {
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pr_err("%s: Error %lld mapping IO segment#%d to PE#%d\n",
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__func__, rc, index, pe->pe_number);
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break;
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}
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region.start += phb->ioda.io_segsize;
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index++;
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}
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} else if ((res->flags & IORESOURCE_MEM) &&
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!pnv_pci_is_mem_pref_64(res->flags)) {
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region.start = res->start -
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phb->hose->mem_offset[0] -
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phb->ioda.m32_pci_base;
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region.end = res->end -
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phb->hose->mem_offset[0] -
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phb->ioda.m32_pci_base;
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index = region.start / phb->ioda.m32_segsize;
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while (index < phb->ioda.total_pe_num &&
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region.start <= region.end) {
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phb->ioda.m32_segmap[index] = pe->pe_number;
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rc = opal_pci_map_pe_mmio_window(phb->opal_id,
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pe->pe_number, OPAL_M32_WINDOW_TYPE, 0, index);
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if (rc != OPAL_SUCCESS) {
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pr_err("%s: Error %lld mapping M32 segment#%d to PE#%d",
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__func__, rc, index, pe->pe_number);
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break;
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}
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region.start += phb->ioda.m32_segsize;
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index++;
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}
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}
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}
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/*
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* This function is supposed to be called on basis of PE from top
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* to bottom style. So the the I/O or MMIO segment assigned to
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* parent PE could be overrided by its child PEs if necessary.
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*/
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static void pnv_ioda_setup_pe_seg(struct pci_controller *hose,
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struct pnv_ioda_pe *pe)
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static void pnv_ioda_setup_pe_seg(struct pnv_ioda_pe *pe)
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{
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struct pnv_phb *phb = hose->private_data;
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struct pci_bus_region region;
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struct resource *res;
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int i, index;
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int rc;
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int i;
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/*
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* NOTE: We only care PCI bus based PE for now. For PCI
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@ -2950,58 +3003,8 @@ static void pnv_ioda_setup_pe_seg(struct pci_controller *hose,
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*/
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BUG_ON(!(pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)));
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pci_bus_for_each_resource(pe->pbus, res, i) {
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if (!res || !res->flags ||
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res->start > res->end)
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continue;
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if (res->flags & IORESOURCE_IO) {
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region.start = res->start - phb->ioda.io_pci_base;
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region.end = res->end - phb->ioda.io_pci_base;
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index = region.start / phb->ioda.io_segsize;
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while (index < phb->ioda.total_pe_num &&
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region.start <= region.end) {
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phb->ioda.io_segmap[index] = pe->pe_number;
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rc = opal_pci_map_pe_mmio_window(phb->opal_id,
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pe->pe_number, OPAL_IO_WINDOW_TYPE, 0, index);
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if (rc != OPAL_SUCCESS) {
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pr_err("%s: OPAL error %d when mapping IO "
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"segment #%d to PE#%d\n",
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__func__, rc, index, pe->pe_number);
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break;
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}
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region.start += phb->ioda.io_segsize;
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index++;
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}
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} else if ((res->flags & IORESOURCE_MEM) &&
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!pnv_pci_is_mem_pref_64(res->flags)) {
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region.start = res->start -
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hose->mem_offset[0] -
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phb->ioda.m32_pci_base;
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region.end = res->end -
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hose->mem_offset[0] -
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phb->ioda.m32_pci_base;
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index = region.start / phb->ioda.m32_segsize;
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while (index < phb->ioda.total_pe_num &&
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region.start <= region.end) {
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phb->ioda.m32_segmap[index] = pe->pe_number;
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rc = opal_pci_map_pe_mmio_window(phb->opal_id,
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pe->pe_number, OPAL_M32_WINDOW_TYPE, 0, index);
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if (rc != OPAL_SUCCESS) {
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pr_err("%s: OPAL error %d when mapping M32 "
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"segment#%d to PE#%d",
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__func__, rc, index, pe->pe_number);
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break;
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}
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region.start += phb->ioda.m32_segsize;
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index++;
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}
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}
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}
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pci_bus_for_each_resource(pe->pbus, res, i)
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pnv_ioda_setup_pe_res(pe, res);
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}
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static void pnv_pci_ioda_setup_seg(void)
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@ -3018,7 +3021,7 @@ static void pnv_pci_ioda_setup_seg(void)
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continue;
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list_for_each_entry(pe, &phb->ioda.pe_list, list) {
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pnv_ioda_setup_pe_seg(hose, pe);
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pnv_ioda_setup_pe_seg(pe);
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}
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}
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}
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