ARMv7 Vexpress updates/cleanups for v4.18

1. Syntactic restructuring of motherboard include file so that it can be
    included at the top of any other DTS file as it should be rather than
    existing include in the middle of the file at a specific location
 
 2. Use of standard GPIO controller bindings for few sysreg components
    like LED, MMC Write Protect/Card Detect and Flash Write Protect
    to fix some of the new DTC warnings
 
 3. Cleanup to replace all underscores('_') with hyphens('-') in the
    device node names
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Merge tag 'vexpress-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt

ARMv7 Vexpress updates/cleanups for v4.18

1. Syntactic restructuring of motherboard include file so that it can be
   included at the top of any other DTS file as it should be rather than
   existing include in the middle of the file at a specific location

2. Use of standard GPIO controller bindings for few sysreg components
   like LED, MMC Write Protect/Card Detect and Flash Write Protect
   to fix some of the new DTC warnings

3. Cleanup to replace all underscores('_') with hyphens('-') in the
   device node names

* tag 'vexpress-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  ARM: dts: vexpress: replace '_' with '-' in node names
  ARM: dts: vexpress: use standard gpio bindings for sys_{led,mci,flash}
  ARM: dts: vexpress: Restructure motherboard includes

Signed-off-by: Olof Johansson <olof@lixom.net>

arch/arm/boot/dts/vexpress-v2m-rs1.dtsi

@@ -17,6 +17,8 @@
  * CHANGES TO vexpress-v2m.dtsi!
  */
 
+/ {
+	smb@8000000 {
 		motherboard {
 			model = "V2M-P1";
 			arm,hbi = <0x190>;
@@ -74,21 +76,27 @@ iofpga@3,00000000 {
 				v2m_sysreg: sysreg@10000 {
 					compatible = "arm,vexpress-sysreg";
 					reg = <0x010000 0x1000>;
+					#address-cells = <1>;
+					#size-cells = <1>;
+					ranges = <0 0x10000 0x1000>;
 
-				v2m_led_gpios: sys_led {
+					v2m_led_gpios: gpio@8 {
 						compatible = "arm,vexpress-sysreg,sys_led";
+						reg = <0x008 4>;
 						gpio-controller;
 						#gpio-cells = <2>;
 					};
 
-				v2m_mmc_gpios: sys_mci {
+					v2m_mmc_gpios: gpio@48 {
 						compatible = "arm,vexpress-sysreg,sys_mci";
+						reg = <0x048 4>;
 						gpio-controller;
 						#gpio-cells = <2>;
 					};
 
-				v2m_flash_gpios: sys_flash {
+					v2m_flash_gpios: gpio@4c {
 						compatible = "arm,vexpress-sysreg,sys_flash";
+						reg = <0x04c 4>;
 						gpio-controller;
 						#gpio-cells = <2>;
 					};
@@ -440,3 +448,5 @@ dvimode {
 				};
 			};
 		};
+	};
+};

arch/arm/boot/dts/vexpress-v2m.dtsi

@@ -18,6 +18,8 @@
  * CHANGES TO vexpress-v2m-rs1.dtsi!
  */
 
+/ {
+	smb@4000000 {
 		motherboard {
 			model = "V2M-P1";
 			arm,hbi = <0x190>;
@@ -74,21 +76,27 @@ iofpga@7,00000000 {
 				v2m_sysreg: sysreg@0 {
 					compatible = "arm,vexpress-sysreg";
 					reg = <0x00000 0x1000>;
+					#address-cells = <1>;
+					#size-cells = <1>;
+					ranges = <0 0 0x1000>;
 
-				v2m_led_gpios: sys_led {
+					v2m_led_gpios: gpio@8 {
 						compatible = "arm,vexpress-sysreg,sys_led";
+						reg = <0x008 4>;
 						gpio-controller;
 						#gpio-cells = <2>;
 					};
 
-				v2m_mmc_gpios: sys_mci {
+					v2m_mmc_gpios: gpio@48 {
 						compatible = "arm,vexpress-sysreg,sys_mci";
+						reg = <0x048 4>;
 						gpio-controller;
 						#gpio-cells = <2>;
 					};
 
-				v2m_flash_gpios: sys_flash {
+					v2m_flash_gpios: gpio@4c {
 						compatible = "arm,vexpress-sysreg,sys_flash";
+						reg = <0x04c 4>;
 						gpio-controller;
 						#gpio-cells = <2>;
 					};
@@ -440,3 +448,5 @@ dvimode {
 				};
 			};
 		};
+	};
+};

arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts

@@ -9,6 +9,7 @@
  */
 
 /dts-v1/;
+#include "vexpress-v2m-rs1.dtsi"
 
 / {
 	model = "V2P-CA15";
@@ -278,8 +279,6 @@ smb@8000000 {
 				<0 0 40 &gic 0 40 4>,
 				<0 0 41 &gic 0 41 4>,
 				<0 0 42 &gic 0 42 4>;
-
-		/include/ "vexpress-v2m-rs1.dtsi"
 	};
 
 	site2: hsb@40000000 {

arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts

@@ -9,6 +9,7 @@
  */
 
 /dts-v1/;
+#include "vexpress-v2m-rs1.dtsi"
 
 / {
 	model = "V2P-CA15_CA7";
@@ -203,7 +204,7 @@ timer {
 			     <1 10 0xf08>;
 	};
 
-	pmu_a15 {
+	pmu-a15 {
 		compatible = "arm,cortex-a15-pmu";
 		interrupts = <0 68 4>,
 			     <0 69 4>;
@@ -211,7 +212,7 @@ pmu_a15 {
 				     <&cpu1>;
 	};
 
-	pmu_a7 {
+	pmu-a7 {
 		compatible = "arm,cortex-a7-pmu";
 		interrupts = <0 128 4>,
 			     <0 129 4>,
@@ -584,7 +585,7 @@ etm2_out_port: endpoint {
 		};
 	};
 
-	smb@8000000 {
+	smb: smb@8000000 {
 		compatible = "simple-bus";
 
 		#address-cells = <2>;
@@ -641,8 +642,6 @@ smb@8000000 {
 				<0 0 40 &gic 0 40 4>,
 				<0 0 41 &gic 0 41 4>,
 				<0 0 42 &gic 0 42 4>;
-
-		/include/ "vexpress-v2m-rs1.dtsi"
 	};
 
 	site2: hsb@40000000 {

arch/arm/boot/dts/vexpress-v2p-ca5s.dts

@@ -9,6 +9,7 @@
  */
 
 /dts-v1/;
+#include "vexpress-v2m-rs1.dtsi"
 
 / {
 	model = "V2P-CA5s";
@@ -191,7 +192,7 @@ temp-dcc {
 		};
 	};
 
-	smb@8000000 {
+	smb: smb@8000000 {
 		compatible = "simple-bus";
 
 		#address-cells = <2>;
@@ -248,8 +249,6 @@ smb@8000000 {
 				<0 0 40 &gic 0 40 4>,
 				<0 0 41 &gic 0 41 4>,
 				<0 0 42 &gic 0 42 4>;
-
-		/include/ "vexpress-v2m-rs1.dtsi"
 	};
 
 	site2: hsb@40000000 {

arch/arm/boot/dts/vexpress-v2p-ca9.dts

@@ -9,6 +9,7 @@
  */
 
 /dts-v1/;
+#include "vexpress-v2m.dtsi"
 
 / {
 	model = "V2P-CA9";
@@ -301,7 +302,7 @@ power-vd10-s3 {
 		};
 	};
 
-	smb@4000000 {
+	smb: smb@4000000 {
 		compatible = "simple-bus";
 
 		#address-cells = <2>;
@@ -357,8 +358,6 @@ smb@4000000 {
 				<0 0 40 &gic 0 40 4>,
 				<0 0 41 &gic 0 41 4>,
 				<0 0 42 &gic 0 42 4>;
-
-		/include/ "vexpress-v2m.dtsi"
 	};
 
 	site2: hsb@e0000000 {

arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts

@@ -13,6 +13,7 @@
 /dts-v1/;
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "vexpress-v2m-rs1.dtsi"
 
 / {
 	model = "V2F-1XV7 Cortex-A53x2 SMM";
@@ -129,7 +130,7 @@ temp-fpga {
 		};
 	};
 
-	smb@8000000 {
+	smb: smb@8000000 {
 		compatible = "simple-bus";
 
 		#address-cells = <2>;
@@ -186,7 +187,5 @@ smb@8000000 {
 				<0 0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 				<0 0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 				<0 0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
-
-		/include/ "vexpress-v2m-rs1.dtsi"
 	};
 };