mirror of https://gitee.com/openkylin/linux.git
net/mlx5: Introduce general notification event
When delay drop timeout is expired, the firmware raises general notification event of DELAY_DROP_TIMEOUT subtype. In addition the feature is disable so the driver have to reactivate the timeout. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Reviewed-by: Yishai Hadas <yishaih@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -161,6 +161,8 @@ static const char *eqe_type_str(u8 type)
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return "MLX5_EVENT_TYPE_NIC_VPORT_CHANGE";
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case MLX5_EVENT_TYPE_FPGA_ERROR:
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return "MLX5_EVENT_TYPE_FPGA_ERROR";
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case MLX5_EVENT_TYPE_GENERAL_EVENT:
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return "MLX5_EVENT_TYPE_GENERAL_EVENT";
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default:
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return "Unrecognized event";
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}
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@ -378,6 +380,20 @@ int mlx5_core_page_fault_resume(struct mlx5_core_dev *dev, u32 token,
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EXPORT_SYMBOL_GPL(mlx5_core_page_fault_resume);
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#endif
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static void general_event_handler(struct mlx5_core_dev *dev,
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struct mlx5_eqe *eqe)
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{
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switch (eqe->sub_type) {
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case MLX5_GENERAL_SUBTYPE_DELAY_DROP_TIMEOUT:
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if (dev->event)
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dev->event(dev, MLX5_DEV_EVENT_DELAY_DROP_TIMEOUT, 0);
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break;
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default:
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mlx5_core_dbg(dev, "General event with unrecognized subtype: sub_type %d\n",
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eqe->sub_type);
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}
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}
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static irqreturn_t mlx5_eq_int(int irq, void *eq_ptr)
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{
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struct mlx5_eq *eq = eq_ptr;
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@ -486,6 +502,9 @@ static irqreturn_t mlx5_eq_int(int irq, void *eq_ptr)
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mlx5_fpga_event(dev, eqe->type, &eqe->data.raw);
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break;
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case MLX5_EVENT_TYPE_GENERAL_EVENT:
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general_event_handler(dev, eqe);
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break;
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default:
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mlx5_core_warn(dev, "Unhandled event 0x%x on EQ 0x%x\n",
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eqe->type, eq->eqn);
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@ -693,6 +712,10 @@ int mlx5_start_eqs(struct mlx5_core_dev *dev)
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mlx5_core_is_pf(dev))
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async_event_mask |= (1ull << MLX5_EVENT_TYPE_NIC_VPORT_CHANGE);
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if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH &&
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MLX5_CAP_GEN(dev, general_notification_event))
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async_event_mask |= (1ull << MLX5_EVENT_TYPE_GENERAL_EVENT);
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if (MLX5_CAP_GEN(dev, port_module_event))
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async_event_mask |= (1ull << MLX5_EVENT_TYPE_PORT_MODULE_EVENT);
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else
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@ -290,6 +290,7 @@ enum mlx5_event {
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MLX5_EVENT_TYPE_GPIO_EVENT = 0x15,
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MLX5_EVENT_TYPE_PORT_MODULE_EVENT = 0x16,
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MLX5_EVENT_TYPE_REMOTE_CONFIG = 0x19,
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MLX5_EVENT_TYPE_GENERAL_EVENT = 0x22,
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MLX5_EVENT_TYPE_PPS_EVENT = 0x25,
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MLX5_EVENT_TYPE_DB_BF_CONGESTION = 0x1a,
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@ -304,6 +305,10 @@ enum mlx5_event {
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MLX5_EVENT_TYPE_FPGA_ERROR = 0x20,
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};
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enum {
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MLX5_GENERAL_SUBTYPE_DELAY_DROP_TIMEOUT = 0x1,
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};
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enum {
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MLX5_PORT_CHANGE_SUBTYPE_DOWN = 1,
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MLX5_PORT_CHANGE_SUBTYPE_ACTIVE = 4,
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@ -192,6 +192,7 @@ enum mlx5_dev_event {
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MLX5_DEV_EVENT_GUID_CHANGE,
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MLX5_DEV_EVENT_CLIENT_REREG,
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MLX5_DEV_EVENT_PPS,
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MLX5_DEV_EVENT_DELAY_DROP_TIMEOUT,
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};
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enum mlx5_port_status {
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@ -874,7 +874,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
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u8 max_tc[0x4];
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u8 reserved_at_1d0[0x1];
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u8 dcbx[0x1];
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u8 reserved_at_1d2[0x3];
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u8 general_notification_event[0x1];
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u8 reserved_at_1d3[0x2];
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u8 fpga[0x1];
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u8 rol_s[0x1];
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u8 rol_g[0x1];
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