mirror of https://gitee.com/openkylin/linux.git
x86/bugs: Add AMD's variant of SSB_NO
The AMD document outlining the SSBD handling 124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf mentions that the CPUID 8000_0008.EBX[26] will mean that the speculative store bypass disable is no longer needed. A copy of this document is available at: https://bugzilla.kernel.org/show_bug.cgi?id=199889 Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> Cc: kvm@vger.kernel.org Cc: andrew.cooper3@citrix.com Cc: Andy Lutomirski <luto@kernel.org> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Borislav Petkov <bp@suse.de> Cc: David Woodhouse <dwmw@amazon.co.uk> Link: https://lkml.kernel.org/r/20180601145921.9500-2-konrad.wilk@oracle.com
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@ -283,6 +283,7 @@
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#define X86_FEATURE_AMD_IBRS (13*32+14) /* "" Indirect Branch Restricted Speculation */
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#define X86_FEATURE_AMD_STIBP (13*32+15) /* "" Single Thread Indirect Branch Predictors */
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#define X86_FEATURE_VIRT_SSBD (13*32+25) /* Virtualized Speculative Store Bypass Disable */
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#define X86_FEATURE_AMD_SSB_NO (13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */
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/* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */
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#define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */
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@ -992,7 +992,8 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
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rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
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if (!x86_match_cpu(cpu_no_spec_store_bypass) &&
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!(ia32_cap & ARCH_CAP_SSB_NO))
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!(ia32_cap & ARCH_CAP_SSB_NO) &&
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!cpu_has(c, X86_FEATURE_AMD_SSB_NO))
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setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS);
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if (x86_match_cpu(cpu_no_meltdown))
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@ -379,7 +379,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
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/* cpuid 0x80000008.ebx */
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const u32 kvm_cpuid_8000_0008_ebx_x86_features =
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F(AMD_IBPB) | F(AMD_IBRS) | F(VIRT_SSBD);
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F(AMD_IBPB) | F(AMD_IBRS) | F(VIRT_SSBD) | F(AMD_SSB_NO);
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/* cpuid 0xC0000001.edx */
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const u32 kvm_cpuid_C000_0001_edx_x86_features =
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