mirror of https://gitee.com/openkylin/linux.git
sh: Split out pgtable.h in to _32 and _64 variants.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
parent
2b6a8d455b
commit
249cfea914
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@ -1,23 +1,24 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* arch/sh64/mm/ioremap.c
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* arch/sh/mm/ioremap_64.c
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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* Copyright (C) 2003, 2004 Paul Mundt
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* Copyright (C) 2003 - 2007 Paul Mundt
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*
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* Mostly derived from arch/sh/mm/ioremap.c which, in turn is mostly
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* derived from arch/i386/mm/ioremap.c .
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*
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* (C) Copyright 1995 1996 Linus Torvalds
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/vmalloc.h>
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#include <linux/ioport.h>
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/io.h>
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#include <linux/bootmem.h>
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#include <linux/proc_fs.h>
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#include <asm/page.h>
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#include <asm/pgalloc.h>
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@ -42,7 +43,8 @@ static unsigned long shmedia_ioremap(struct resource *, u32, int);
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* have to convert them into an offset in a page-aligned mapping, but the
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* caller shouldn't need to know that small detail.
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*/
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void * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags)
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void *__ioremap(unsigned long phys_addr, unsigned long size,
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unsigned long flags)
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{
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void * addr;
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struct vm_struct * area;
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@ -83,7 +85,7 @@ void * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flag
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}
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EXPORT_SYMBOL(__ioremap);
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void iounmap(void *addr)
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void __iounmap(void *addr)
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{
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struct vm_struct *area;
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@ -96,7 +98,7 @@ void iounmap(void *addr)
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kfree(area);
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}
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EXPORT_SYMBOL(iounmap);
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EXPORT_SYMBOL(__iounmap);
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static struct resource shmedia_iomap = {
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.name = "shmedia_iomap",
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@ -265,6 +267,7 @@ static __init_refok void *sh64_get_page(void)
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static void shmedia_mapioaddr(unsigned long pa, unsigned long va)
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{
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pgd_t *pgdp;
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pud_t *pudp;
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pmd_t *pmdp;
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pte_t *ptep, pte;
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pgprot_t prot;
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@ -274,11 +277,17 @@ static void shmedia_mapioaddr(unsigned long pa, unsigned long va)
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pgdp = pgd_offset_k(va);
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if (pgd_none(*pgdp) || !pgd_present(*pgdp)) {
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pmdp = (pmd_t *)sh64_get_page();
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set_pgd(pgdp, __pgd((unsigned long)pmdp | _KERNPG_TABLE));
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pudp = (pud_t *)sh64_get_page();
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set_pgd(pgdp, __pgd((unsigned long)pudp | _KERNPG_TABLE));
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}
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pmdp = pmd_offset(pgdp, va);
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pudp = pud_offset(pgdp, va);
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if (pud_none(*pudp) || !pud_present(*pudp)) {
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pmdp = (pmd_t *)sh64_get_page();
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set_pud(pudp, __pud((unsigned long)pmdp | _KERNPG_TABLE));
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}
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pmdp = pmd_offset(pudp, va);
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if (pmd_none(*pmdp) || !pmd_present(*pmdp) ) {
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ptep = (pte_t *)sh64_get_page();
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set_pmd(pmdp, __pmd((unsigned long)ptep + _PAGE_TABLE));
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@ -302,12 +311,19 @@ static void shmedia_mapioaddr(unsigned long pa, unsigned long va)
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static void shmedia_unmapioaddr(unsigned long vaddr)
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{
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pgd_t *pgdp;
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pud_t *pudp;
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pmd_t *pmdp;
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pte_t *ptep;
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pgdp = pgd_offset_k(vaddr);
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pmdp = pmd_offset(pgdp, vaddr);
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if (pgd_none(*pgdp) || pgd_bad(*pgdp))
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return;
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pudp = pud_offset(pgdp, vaddr);
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if (pud_none(*pudp) || pud_bad(*pudp))
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return;
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pmdp = pmd_offset(pudp, vaddr);
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if (pmd_none(*pmdp) || pmd_bad(*pmdp))
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return;
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@ -96,12 +96,18 @@ typedef struct { unsigned long long pgd; } pgd_t;
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((x).pte_low | ((unsigned long long)(x).pte_high << 32))
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#define __pte(x) \
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({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; })
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#else
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#elif defined(CONFIG_SUPERH32)
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typedef struct { unsigned long pte_low; } pte_t;
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typedef struct { unsigned long pgprot; } pgprot_t;
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typedef struct { unsigned long pgd; } pgd_t;
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#define pte_val(x) ((x).pte_low)
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#define __pte(x) ((pte_t) { (x) } )
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#define __pte(x) ((pte_t) { (x) } )
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#else
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typedef struct { unsigned long long pte_low; } pte_t;
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typedef struct { unsigned long pgprot; } pgprot_t;
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typedef struct { unsigned long pgd; } pgd_t;
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#define pte_val(x) ((x).pte_low)
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#define __pte(x) ((pte_t) { (x) } )
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#endif
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#define pgd_val(x) ((x).pgd)
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@ -3,7 +3,7 @@
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* use the SuperH page table tree.
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*
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* Copyright (C) 1999 Niibe Yutaka
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* Copyright (C) 2002 - 2005 Paul Mundt
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* Copyright (C) 2002 - 2007 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file "COPYING" in the main directory of this
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@ -78,278 +78,12 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
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#endif
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#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
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/*
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* Linux PTEL encoding.
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*
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* Hardware and software bit definitions for the PTEL value (see below for
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* notes on SH-X2 MMUs and 64-bit PTEs):
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*
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* - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4).
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*
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* - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the
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* hardware PTEL value can't have the SH-bit set when MMUCR.IX is set,
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* which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT).
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*
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* In order to keep this relatively clean, do not use these for defining
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* SH-3 specific flags until all of the other unused bits have been
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* exhausted.
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*
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* - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE.
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*
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* - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages.
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* Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused.
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*
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* - Bits 31, 30, and 29 remain unused by everyone and can be used for future
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* software flags, although care must be taken to update _PAGE_CLEAR_FLAGS.
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*
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* XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day.
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*
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* SH-X2 MMUs and extended PTEs
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*
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* SH-X2 supports an extended mode TLB with split data arrays due to the
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* number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and
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* SZ bit placeholders still exist in data array 1, but are implemented as
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* reserved bits, with the real logic existing in data array 2.
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*
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* The downside to this is that we can no longer fit everything in to a 32-bit
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* PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus
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* side, this gives us quite a few spare bits to play with for future usage.
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*/
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/* Legacy and compat mode bits */
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#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */
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#define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */
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#define _PAGE_DIRTY 0x004 /* D-bit : page changed */
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#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */
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#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */
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#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */
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#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/
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#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */
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#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */
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#define _PAGE_PROTNONE 0x200 /* software: if not present */
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#define _PAGE_ACCESSED 0x400 /* software: page referenced */
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#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */
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#define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1)
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#define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER)
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/* Extended mode bits */
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#define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */
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#define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */
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#define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */
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#define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */
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#define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */
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#define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */
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#define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */
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#define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */
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#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */
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#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */
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/* Wrapper for extended mode pgprot twiddling */
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#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
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/* software: moves to PTEA.TC (Timing Control) */
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#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
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#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */
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/* software: moves to PTEA.SA[2:0] (Space Attributes) */
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#define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */
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#define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */
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#define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */
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#define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */
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#define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */
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#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
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#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
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/* Mask which drops unused bits from the PTEL value */
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#if defined(CONFIG_CPU_SH3)
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#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \
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_PAGE_FILE | _PAGE_SZ1 | \
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_PAGE_HW_SHARED)
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#elif defined(CONFIG_X2TLB)
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/* Get rid of the legacy PR/SZ bits when using extended mode */
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#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \
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_PAGE_FILE | _PAGE_PR_MASK | _PAGE_SZ_MASK)
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#if defined(CONFIG_SUPERH32)
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#include <asm/pgtable_32.h>
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#else
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#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE)
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#include <asm/pgtable_64.h>
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#endif
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#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS))
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/* Hardware flags, page size encoding */
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#if defined(CONFIG_X2TLB)
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# if defined(CONFIG_PAGE_SIZE_4KB)
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# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0)
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# elif defined(CONFIG_PAGE_SIZE_8KB)
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# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1)
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# elif defined(CONFIG_PAGE_SIZE_64KB)
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# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2)
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# endif
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#else
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# if defined(CONFIG_PAGE_SIZE_4KB)
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# define _PAGE_FLAGS_HARD _PAGE_SZ0
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# elif defined(CONFIG_PAGE_SIZE_64KB)
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# define _PAGE_FLAGS_HARD _PAGE_SZ1
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# endif
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#endif
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#if defined(CONFIG_X2TLB)
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# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
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# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2)
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# elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
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# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2)
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# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
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# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2)
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# elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
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# define _PAGE_SZHUGE (_PAGE_EXT_ESZ3)
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# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
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# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3)
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# endif
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#else
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# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
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# define _PAGE_SZHUGE (_PAGE_SZ1)
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# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
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# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1)
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# endif
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#endif
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/*
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* Stub out _PAGE_SZHUGE if we don't have a good definition for it,
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* to make pte_mkhuge() happy.
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*/
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#ifndef _PAGE_SZHUGE
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# define _PAGE_SZHUGE (_PAGE_FLAGS_HARD)
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#endif
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#define _PAGE_CHG_MASK \
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(PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY)
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#ifndef __ASSEMBLY__
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#if defined(CONFIG_X2TLB) /* SH-X2 TLB */
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#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
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_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
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#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
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_PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
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_PAGE_EXT(_PAGE_EXT_KERN_READ | \
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_PAGE_EXT_KERN_WRITE | \
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_PAGE_EXT_USER_READ | \
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_PAGE_EXT_USER_WRITE))
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#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
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_PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
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_PAGE_EXT(_PAGE_EXT_KERN_EXEC | \
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_PAGE_EXT_KERN_READ | \
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_PAGE_EXT_USER_EXEC | \
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_PAGE_EXT_USER_READ))
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#define PAGE_COPY PAGE_EXECREAD
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#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
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_PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
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_PAGE_EXT(_PAGE_EXT_KERN_READ | \
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_PAGE_EXT_USER_READ))
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#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
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_PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
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_PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
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_PAGE_EXT_USER_WRITE))
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#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
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_PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
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_PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
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_PAGE_EXT_KERN_READ | \
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_PAGE_EXT_KERN_EXEC | \
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_PAGE_EXT_USER_WRITE | \
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_PAGE_EXT_USER_READ | \
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_PAGE_EXT_USER_EXEC))
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#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
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_PAGE_DIRTY | _PAGE_ACCESSED | \
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_PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
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_PAGE_EXT(_PAGE_EXT_KERN_READ | \
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_PAGE_EXT_KERN_WRITE | \
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_PAGE_EXT_KERN_EXEC))
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#define PAGE_KERNEL_NOCACHE \
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__pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
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_PAGE_ACCESSED | _PAGE_HW_SHARED | \
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_PAGE_FLAGS_HARD | \
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_PAGE_EXT(_PAGE_EXT_KERN_READ | \
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_PAGE_EXT_KERN_WRITE | \
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_PAGE_EXT_KERN_EXEC))
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#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
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_PAGE_DIRTY | _PAGE_ACCESSED | \
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_PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
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_PAGE_EXT(_PAGE_EXT_KERN_READ | \
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_PAGE_EXT_KERN_EXEC))
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#define PAGE_KERNEL_PCC(slot, type) \
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__pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
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_PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
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_PAGE_EXT(_PAGE_EXT_KERN_READ | \
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_PAGE_EXT_KERN_WRITE | \
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_PAGE_EXT_KERN_EXEC) \
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(slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
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(type))
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#elif defined(CONFIG_MMU) /* SH-X TLB */
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#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
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_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
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#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
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_PAGE_CACHABLE | _PAGE_ACCESSED | \
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_PAGE_FLAGS_HARD)
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#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
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_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
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#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
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_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
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#define PAGE_EXECREAD PAGE_READONLY
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#define PAGE_RWX PAGE_SHARED
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#define PAGE_WRITEONLY PAGE_SHARED
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|
||||
#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \
|
||||
_PAGE_DIRTY | _PAGE_ACCESSED | \
|
||||
_PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
|
||||
|
||||
#define PAGE_KERNEL_NOCACHE \
|
||||
__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
|
||||
_PAGE_ACCESSED | _PAGE_HW_SHARED | \
|
||||
_PAGE_FLAGS_HARD)
|
||||
|
||||
#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
|
||||
_PAGE_DIRTY | _PAGE_ACCESSED | \
|
||||
_PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
|
||||
|
||||
#define PAGE_KERNEL_PCC(slot, type) \
|
||||
__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
|
||||
_PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
|
||||
(slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
|
||||
(type))
|
||||
#else /* no mmu */
|
||||
#define PAGE_NONE __pgprot(0)
|
||||
#define PAGE_SHARED __pgprot(0)
|
||||
#define PAGE_COPY __pgprot(0)
|
||||
#define PAGE_EXECREAD __pgprot(0)
|
||||
#define PAGE_RWX __pgprot(0)
|
||||
#define PAGE_READONLY __pgprot(0)
|
||||
#define PAGE_WRITEONLY __pgprot(0)
|
||||
#define PAGE_KERNEL __pgprot(0)
|
||||
#define PAGE_KERNEL_NOCACHE __pgprot(0)
|
||||
#define PAGE_KERNEL_RO __pgprot(0)
|
||||
|
||||
#define PAGE_KERNEL_PCC(slot, type) \
|
||||
__pgprot(0)
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
* SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page
|
||||
* protection for execute, and considers it the same as a read. Also, write
|
||||
|
|
@ -378,208 +112,6 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
|
|||
#define __S110 PAGE_RWX
|
||||
#define __S111 PAGE_RWX
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
* Certain architectures need to do special things when PTEs
|
||||
* within a page table are directly modified. Thus, the following
|
||||
* hook is made available.
|
||||
*/
|
||||
#ifdef CONFIG_X2TLB
|
||||
static inline void set_pte(pte_t *ptep, pte_t pte)
|
||||
{
|
||||
ptep->pte_high = pte.pte_high;
|
||||
smp_wmb();
|
||||
ptep->pte_low = pte.pte_low;
|
||||
}
|
||||
#else
|
||||
#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
|
||||
#endif
|
||||
|
||||
#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
|
||||
|
||||
/*
|
||||
* (pmds are folded into pgds so this doesn't get actually called,
|
||||
* but the define is needed for a generic inline function.)
|
||||
*/
|
||||
#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
|
||||
|
||||
#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
|
||||
|
||||
#define pfn_pte(pfn, prot) \
|
||||
__pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
|
||||
#define pfn_pmd(pfn, prot) \
|
||||
__pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
|
||||
|
||||
#define pte_none(x) (!pte_val(x))
|
||||
#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
|
||||
|
||||
#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
|
||||
|
||||
#define pmd_none(x) (!pmd_val(x))
|
||||
#define pmd_present(x) (pmd_val(x))
|
||||
#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
|
||||
#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
|
||||
|
||||
#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
|
||||
#define pte_page(x) pfn_to_page(pte_pfn(x))
|
||||
|
||||
/*
|
||||
* The following only work if pte_present() is true.
|
||||
* Undefined behaviour if not..
|
||||
*/
|
||||
#define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT))
|
||||
#define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY)
|
||||
#define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED)
|
||||
#define pte_file(pte) ((pte).pte_low & _PAGE_FILE)
|
||||
|
||||
#ifdef CONFIG_X2TLB
|
||||
#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE)
|
||||
#else
|
||||
#define pte_write(pte) ((pte).pte_low & _PAGE_RW)
|
||||
#endif
|
||||
|
||||
#define PTE_BIT_FUNC(h,fn,op) \
|
||||
static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; }
|
||||
|
||||
#ifdef CONFIG_X2TLB
|
||||
/*
|
||||
* We cheat a bit in the SH-X2 TLB case. As the permission bits are
|
||||
* individually toggled (and user permissions are entirely decoupled from
|
||||
* kernel permissions), we attempt to couple them a bit more sanely here.
|
||||
*/
|
||||
PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE);
|
||||
PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE);
|
||||
PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE);
|
||||
#else
|
||||
PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW);
|
||||
PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW);
|
||||
PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE);
|
||||
#endif
|
||||
|
||||
PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY);
|
||||
PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY);
|
||||
PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
|
||||
PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
|
||||
|
||||
/*
|
||||
* Macro and implementation to make a page protection as uncachable.
|
||||
*/
|
||||
#define pgprot_writecombine(prot) \
|
||||
__pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
|
||||
|
||||
#define pgprot_noncached pgprot_writecombine
|
||||
|
||||
/*
|
||||
* Conversion functions: convert a page and protection to a page entry,
|
||||
* and a page entry and page directory to the page they refer to.
|
||||
*
|
||||
* extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
|
||||
*/
|
||||
#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
|
||||
|
||||
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
||||
{
|
||||
pte.pte_low &= _PAGE_CHG_MASK;
|
||||
pte.pte_low |= pgprot_val(newprot);
|
||||
|
||||
#ifdef CONFIG_X2TLB
|
||||
pte.pte_high |= pgprot_val(newprot) >> 32;
|
||||
#endif
|
||||
|
||||
return pte;
|
||||
}
|
||||
|
||||
#define pmd_page_vaddr(pmd) ((unsigned long)pmd_val(pmd))
|
||||
#define pmd_page(pmd) (virt_to_page(pmd_val(pmd)))
|
||||
|
||||
/* to find an entry in a page-table-directory. */
|
||||
#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
|
||||
#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
|
||||
|
||||
/* to find an entry in a kernel page-table-directory */
|
||||
#define pgd_offset_k(address) pgd_offset(&init_mm, address)
|
||||
|
||||
/* Find an entry in the third-level page table.. */
|
||||
#define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
|
||||
#define pte_offset_kernel(dir, address) \
|
||||
((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
|
||||
#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
|
||||
#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
|
||||
|
||||
#define pte_unmap(pte) do { } while (0)
|
||||
#define pte_unmap_nested(pte) do { } while (0)
|
||||
|
||||
#ifdef CONFIG_X2TLB
|
||||
#define pte_ERROR(e) \
|
||||
printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \
|
||||
&(e), (e).pte_high, (e).pte_low)
|
||||
#define pgd_ERROR(e) \
|
||||
printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e))
|
||||
#else
|
||||
#define pte_ERROR(e) \
|
||||
printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
|
||||
#define pgd_ERROR(e) \
|
||||
printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
|
||||
#endif
|
||||
|
||||
struct vm_area_struct;
|
||||
extern void update_mmu_cache(struct vm_area_struct * vma,
|
||||
unsigned long address, pte_t pte);
|
||||
|
||||
/*
|
||||
* Encode and de-code a swap entry
|
||||
*
|
||||
* Constraints:
|
||||
* _PAGE_FILE at bit 0
|
||||
* _PAGE_PRESENT at bit 8
|
||||
* _PAGE_PROTNONE at bit 9
|
||||
*
|
||||
* For the normal case, we encode the swap type into bits 0:7 and the
|
||||
* swap offset into bits 10:30. For the 64-bit PTE case, we keep the
|
||||
* preserved bits in the low 32-bits and use the upper 32 as the swap
|
||||
* offset (along with a 5-bit type), following the same approach as x86
|
||||
* PAE. This keeps the logic quite simple, and allows for a full 32
|
||||
* PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with
|
||||
* in the pte_low case.
|
||||
*
|
||||
* As is evident by the Alpha code, if we ever get a 64-bit unsigned
|
||||
* long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes
|
||||
* much cleaner..
|
||||
*
|
||||
* NOTE: We should set ZEROs at the position of _PAGE_PRESENT
|
||||
* and _PAGE_PROTNONE bits
|
||||
*/
|
||||
#ifdef CONFIG_X2TLB
|
||||
#define __swp_type(x) ((x).val & 0x1f)
|
||||
#define __swp_offset(x) ((x).val >> 5)
|
||||
#define __swp_entry(type, offset) ((swp_entry_t){ (type) | (offset) << 5})
|
||||
#define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high })
|
||||
#define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val })
|
||||
|
||||
/*
|
||||
* Encode and decode a nonlinear file mapping entry
|
||||
*/
|
||||
#define pte_to_pgoff(pte) ((pte).pte_high)
|
||||
#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) })
|
||||
|
||||
#define PTE_FILE_MAX_BITS 32
|
||||
#else
|
||||
#define __swp_type(x) ((x).val & 0xff)
|
||||
#define __swp_offset(x) ((x).val >> 10)
|
||||
#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) <<10})
|
||||
|
||||
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 })
|
||||
#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 })
|
||||
|
||||
/*
|
||||
* Encode and decode a nonlinear file mapping entry
|
||||
*/
|
||||
#define PTE_FILE_MAX_BITS 29
|
||||
#define pte_to_pgoff(pte) (pte_val(pte) >> 1)
|
||||
#define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE })
|
||||
#endif
|
||||
|
||||
typedef pte_t *pte_addr_t;
|
||||
|
||||
#define kern_addr_valid(addr) (1)
|
||||
|
|
@ -587,27 +119,26 @@ typedef pte_t *pte_addr_t;
|
|||
#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
|
||||
remap_pfn_range(vma, vaddr, pfn, size, prot)
|
||||
|
||||
struct mm_struct;
|
||||
#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
|
||||
|
||||
/*
|
||||
* No page table caches to initialise
|
||||
*/
|
||||
#define pgtable_cache_init() do { } while (0)
|
||||
|
||||
#ifndef CONFIG_MMU
|
||||
extern unsigned int kobjsize(const void *objp);
|
||||
#endif /* !CONFIG_MMU */
|
||||
|
||||
#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \
|
||||
defined(CONFIG_SH7705_CACHE_32KB))
|
||||
struct mm_struct;
|
||||
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
|
||||
extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
|
||||
pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
|
||||
#endif
|
||||
|
||||
struct vm_area_struct;
|
||||
extern void update_mmu_cache(struct vm_area_struct * vma,
|
||||
unsigned long address, pte_t pte);
|
||||
extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
|
||||
extern void paging_init(void);
|
||||
|
||||
#include <asm-generic/pgtable.h>
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
#endif /* __ASM_SH_PAGE_H */
|
||||
#endif /* __ASM_SH_PGTABLE_H */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,473 @@
|
|||
#ifndef __ASM_SH_PGTABLE_32_H
|
||||
#define __ASM_SH_PGTABLE_32_H
|
||||
|
||||
/*
|
||||
* Linux PTEL encoding.
|
||||
*
|
||||
* Hardware and software bit definitions for the PTEL value (see below for
|
||||
* notes on SH-X2 MMUs and 64-bit PTEs):
|
||||
*
|
||||
* - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4).
|
||||
*
|
||||
* - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the
|
||||
* hardware PTEL value can't have the SH-bit set when MMUCR.IX is set,
|
||||
* which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT).
|
||||
*
|
||||
* In order to keep this relatively clean, do not use these for defining
|
||||
* SH-3 specific flags until all of the other unused bits have been
|
||||
* exhausted.
|
||||
*
|
||||
* - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE.
|
||||
*
|
||||
* - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages.
|
||||
* Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused.
|
||||
*
|
||||
* - Bits 31, 30, and 29 remain unused by everyone and can be used for future
|
||||
* software flags, although care must be taken to update _PAGE_CLEAR_FLAGS.
|
||||
*
|
||||
* XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day.
|
||||
*
|
||||
* SH-X2 MMUs and extended PTEs
|
||||
*
|
||||
* SH-X2 supports an extended mode TLB with split data arrays due to the
|
||||
* number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and
|
||||
* SZ bit placeholders still exist in data array 1, but are implemented as
|
||||
* reserved bits, with the real logic existing in data array 2.
|
||||
*
|
||||
* The downside to this is that we can no longer fit everything in to a 32-bit
|
||||
* PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus
|
||||
* side, this gives us quite a few spare bits to play with for future usage.
|
||||
*/
|
||||
/* Legacy and compat mode bits */
|
||||
#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */
|
||||
#define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */
|
||||
#define _PAGE_DIRTY 0x004 /* D-bit : page changed */
|
||||
#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */
|
||||
#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */
|
||||
#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */
|
||||
#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/
|
||||
#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */
|
||||
#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */
|
||||
#define _PAGE_PROTNONE 0x200 /* software: if not present */
|
||||
#define _PAGE_ACCESSED 0x400 /* software: page referenced */
|
||||
#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */
|
||||
|
||||
#define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1)
|
||||
#define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER)
|
||||
|
||||
/* Extended mode bits */
|
||||
#define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */
|
||||
#define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */
|
||||
#define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */
|
||||
#define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */
|
||||
|
||||
#define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */
|
||||
#define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */
|
||||
#define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */
|
||||
|
||||
#define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */
|
||||
#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */
|
||||
#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */
|
||||
|
||||
/* Wrapper for extended mode pgprot twiddling */
|
||||
#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
|
||||
|
||||
/* software: moves to PTEA.TC (Timing Control) */
|
||||
#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
|
||||
#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */
|
||||
|
||||
/* software: moves to PTEA.SA[2:0] (Space Attributes) */
|
||||
#define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */
|
||||
#define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */
|
||||
#define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */
|
||||
#define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */
|
||||
#define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */
|
||||
#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
|
||||
#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
|
||||
|
||||
/* Mask which drops unused bits from the PTEL value */
|
||||
#if defined(CONFIG_CPU_SH3)
|
||||
#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \
|
||||
_PAGE_FILE | _PAGE_SZ1 | \
|
||||
_PAGE_HW_SHARED)
|
||||
#elif defined(CONFIG_X2TLB)
|
||||
/* Get rid of the legacy PR/SZ bits when using extended mode */
|
||||
#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \
|
||||
_PAGE_FILE | _PAGE_PR_MASK | _PAGE_SZ_MASK)
|
||||
#else
|
||||
#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE)
|
||||
#endif
|
||||
|
||||
#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS))
|
||||
|
||||
/* Hardware flags, page size encoding */
|
||||
#if defined(CONFIG_X2TLB)
|
||||
# if defined(CONFIG_PAGE_SIZE_4KB)
|
||||
# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0)
|
||||
# elif defined(CONFIG_PAGE_SIZE_8KB)
|
||||
# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1)
|
||||
# elif defined(CONFIG_PAGE_SIZE_64KB)
|
||||
# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2)
|
||||
# endif
|
||||
#else
|
||||
# if defined(CONFIG_PAGE_SIZE_4KB)
|
||||
# define _PAGE_FLAGS_HARD _PAGE_SZ0
|
||||
# elif defined(CONFIG_PAGE_SIZE_64KB)
|
||||
# define _PAGE_FLAGS_HARD _PAGE_SZ1
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_X2TLB)
|
||||
# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
|
||||
# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2)
|
||||
# elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
|
||||
# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2)
|
||||
# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
|
||||
# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2)
|
||||
# elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
|
||||
# define _PAGE_SZHUGE (_PAGE_EXT_ESZ3)
|
||||
# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
|
||||
# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3)
|
||||
# endif
|
||||
#else
|
||||
# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
|
||||
# define _PAGE_SZHUGE (_PAGE_SZ1)
|
||||
# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
|
||||
# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1)
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Stub out _PAGE_SZHUGE if we don't have a good definition for it,
|
||||
* to make pte_mkhuge() happy.
|
||||
*/
|
||||
#ifndef _PAGE_SZHUGE
|
||||
# define _PAGE_SZHUGE (_PAGE_FLAGS_HARD)
|
||||
#endif
|
||||
|
||||
#define _PAGE_CHG_MASK \
|
||||
(PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#if defined(CONFIG_X2TLB) /* SH-X2 TLB */
|
||||
#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
|
||||
_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
|
||||
|
||||
#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
|
||||
_PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
|
||||
_PAGE_EXT(_PAGE_EXT_KERN_READ | \
|
||||
_PAGE_EXT_KERN_WRITE | \
|
||||
_PAGE_EXT_USER_READ | \
|
||||
_PAGE_EXT_USER_WRITE))
|
||||
|
||||
#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
|
||||
_PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
|
||||
_PAGE_EXT(_PAGE_EXT_KERN_EXEC | \
|
||||
_PAGE_EXT_KERN_READ | \
|
||||
_PAGE_EXT_USER_EXEC | \
|
||||
_PAGE_EXT_USER_READ))
|
||||
|
||||
#define PAGE_COPY PAGE_EXECREAD
|
||||
|
||||
#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
|
||||
_PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
|
||||
_PAGE_EXT(_PAGE_EXT_KERN_READ | \
|
||||
_PAGE_EXT_USER_READ))
|
||||
|
||||
#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
|
||||
_PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
|
||||
_PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
|
||||
_PAGE_EXT_USER_WRITE))
|
||||
|
||||
#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
|
||||
_PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
|
||||
_PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
|
||||
_PAGE_EXT_KERN_READ | \
|
||||
_PAGE_EXT_KERN_EXEC | \
|
||||
_PAGE_EXT_USER_WRITE | \
|
||||
_PAGE_EXT_USER_READ | \
|
||||
_PAGE_EXT_USER_EXEC))
|
||||
|
||||
#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
|
||||
_PAGE_DIRTY | _PAGE_ACCESSED | \
|
||||
_PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
|
||||
_PAGE_EXT(_PAGE_EXT_KERN_READ | \
|
||||
_PAGE_EXT_KERN_WRITE | \
|
||||
_PAGE_EXT_KERN_EXEC))
|
||||
|
||||
#define PAGE_KERNEL_NOCACHE \
|
||||
__pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
|
||||
_PAGE_ACCESSED | _PAGE_HW_SHARED | \
|
||||
_PAGE_FLAGS_HARD | \
|
||||
_PAGE_EXT(_PAGE_EXT_KERN_READ | \
|
||||
_PAGE_EXT_KERN_WRITE | \
|
||||
_PAGE_EXT_KERN_EXEC))
|
||||
|
||||
#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
|
||||
_PAGE_DIRTY | _PAGE_ACCESSED | \
|
||||
_PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
|
||||
_PAGE_EXT(_PAGE_EXT_KERN_READ | \
|
||||
_PAGE_EXT_KERN_EXEC))
|
||||
|
||||
#define PAGE_KERNEL_PCC(slot, type) \
|
||||
__pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
|
||||
_PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
|
||||
_PAGE_EXT(_PAGE_EXT_KERN_READ | \
|
||||
_PAGE_EXT_KERN_WRITE | \
|
||||
_PAGE_EXT_KERN_EXEC) \
|
||||
(slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
|
||||
(type))
|
||||
|
||||
#elif defined(CONFIG_MMU) /* SH-X TLB */
|
||||
#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
|
||||
_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
|
||||
|
||||
#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
|
||||
_PAGE_CACHABLE | _PAGE_ACCESSED | \
|
||||
_PAGE_FLAGS_HARD)
|
||||
|
||||
#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
|
||||
_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
|
||||
|
||||
#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
|
||||
_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
|
||||
|
||||
#define PAGE_EXECREAD PAGE_READONLY
|
||||
#define PAGE_RWX PAGE_SHARED
|
||||
#define PAGE_WRITEONLY PAGE_SHARED
|
||||
|
||||
#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \
|
||||
_PAGE_DIRTY | _PAGE_ACCESSED | \
|
||||
_PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
|
||||
|
||||
#define PAGE_KERNEL_NOCACHE \
|
||||
__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
|
||||
_PAGE_ACCESSED | _PAGE_HW_SHARED | \
|
||||
_PAGE_FLAGS_HARD)
|
||||
|
||||
#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
|
||||
_PAGE_DIRTY | _PAGE_ACCESSED | \
|
||||
_PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
|
||||
|
||||
#define PAGE_KERNEL_PCC(slot, type) \
|
||||
__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
|
||||
_PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
|
||||
(slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
|
||||
(type))
|
||||
#else /* no mmu */
|
||||
#define PAGE_NONE __pgprot(0)
|
||||
#define PAGE_SHARED __pgprot(0)
|
||||
#define PAGE_COPY __pgprot(0)
|
||||
#define PAGE_EXECREAD __pgprot(0)
|
||||
#define PAGE_RWX __pgprot(0)
|
||||
#define PAGE_READONLY __pgprot(0)
|
||||
#define PAGE_WRITEONLY __pgprot(0)
|
||||
#define PAGE_KERNEL __pgprot(0)
|
||||
#define PAGE_KERNEL_NOCACHE __pgprot(0)
|
||||
#define PAGE_KERNEL_RO __pgprot(0)
|
||||
|
||||
#define PAGE_KERNEL_PCC(slot, type) \
|
||||
__pgprot(0)
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
* Certain architectures need to do special things when PTEs
|
||||
* within a page table are directly modified. Thus, the following
|
||||
* hook is made available.
|
||||
*/
|
||||
#ifdef CONFIG_X2TLB
|
||||
static inline void set_pte(pte_t *ptep, pte_t pte)
|
||||
{
|
||||
ptep->pte_high = pte.pte_high;
|
||||
smp_wmb();
|
||||
ptep->pte_low = pte.pte_low;
|
||||
}
|
||||
#else
|
||||
#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
|
||||
#endif
|
||||
|
||||
#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
|
||||
|
||||
/*
|
||||
* (pmds are folded into pgds so this doesn't get actually called,
|
||||
* but the define is needed for a generic inline function.)
|
||||
*/
|
||||
#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
|
||||
|
||||
#define pfn_pte(pfn, prot) \
|
||||
__pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
|
||||
#define pfn_pmd(pfn, prot) \
|
||||
__pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
|
||||
|
||||
#define pte_none(x) (!pte_val(x))
|
||||
#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
|
||||
|
||||
#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
|
||||
|
||||
#define pmd_none(x) (!pmd_val(x))
|
||||
#define pmd_present(x) (pmd_val(x))
|
||||
#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
|
||||
#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
|
||||
|
||||
#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
|
||||
#define pte_page(x) pfn_to_page(pte_pfn(x))
|
||||
|
||||
/*
|
||||
* The following only work if pte_present() is true.
|
||||
* Undefined behaviour if not..
|
||||
*/
|
||||
#define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT))
|
||||
#define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY)
|
||||
#define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED)
|
||||
#define pte_file(pte) ((pte).pte_low & _PAGE_FILE)
|
||||
|
||||
#ifdef CONFIG_X2TLB
|
||||
#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE)
|
||||
#else
|
||||
#define pte_write(pte) ((pte).pte_low & _PAGE_RW)
|
||||
#endif
|
||||
|
||||
#define PTE_BIT_FUNC(h,fn,op) \
|
||||
static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; }
|
||||
|
||||
#ifdef CONFIG_X2TLB
|
||||
/*
|
||||
* We cheat a bit in the SH-X2 TLB case. As the permission bits are
|
||||
* individually toggled (and user permissions are entirely decoupled from
|
||||
* kernel permissions), we attempt to couple them a bit more sanely here.
|
||||
*/
|
||||
PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE);
|
||||
PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE);
|
||||
PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE);
|
||||
#else
|
||||
PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW);
|
||||
PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW);
|
||||
PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE);
|
||||
#endif
|
||||
|
||||
PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY);
|
||||
PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY);
|
||||
PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
|
||||
PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
|
||||
|
||||
/*
|
||||
* Macro and implementation to make a page protection as uncachable.
|
||||
*/
|
||||
#define pgprot_writecombine(prot) \
|
||||
__pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
|
||||
|
||||
#define pgprot_noncached pgprot_writecombine
|
||||
|
||||
/*
|
||||
* Conversion functions: convert a page and protection to a page entry,
|
||||
* and a page entry and page directory to the page they refer to.
|
||||
*
|
||||
* extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
|
||||
*/
|
||||
#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
|
||||
|
||||
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
||||
{
|
||||
pte.pte_low &= _PAGE_CHG_MASK;
|
||||
pte.pte_low |= pgprot_val(newprot);
|
||||
|
||||
#ifdef CONFIG_X2TLB
|
||||
pte.pte_high |= pgprot_val(newprot) >> 32;
|
||||
#endif
|
||||
|
||||
return pte;
|
||||
}
|
||||
|
||||
#define pmd_page_vaddr(pmd) ((unsigned long)pmd_val(pmd))
|
||||
#define pmd_page(pmd) (virt_to_page(pmd_val(pmd)))
|
||||
|
||||
/* to find an entry in a page-table-directory. */
|
||||
#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
|
||||
#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
|
||||
|
||||
/* to find an entry in a kernel page-table-directory */
|
||||
#define pgd_offset_k(address) pgd_offset(&init_mm, address)
|
||||
|
||||
/* Find an entry in the third-level page table.. */
|
||||
#define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
|
||||
#define pte_offset_kernel(dir, address) \
|
||||
((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
|
||||
#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
|
||||
#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
|
||||
|
||||
#define pte_unmap(pte) do { } while (0)
|
||||
#define pte_unmap_nested(pte) do { } while (0)
|
||||
|
||||
#ifdef CONFIG_X2TLB
|
||||
#define pte_ERROR(e) \
|
||||
printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \
|
||||
&(e), (e).pte_high, (e).pte_low)
|
||||
#define pgd_ERROR(e) \
|
||||
printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e))
|
||||
#else
|
||||
#define pte_ERROR(e) \
|
||||
printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
|
||||
#define pgd_ERROR(e) \
|
||||
printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Encode and de-code a swap entry
|
||||
*
|
||||
* Constraints:
|
||||
* _PAGE_FILE at bit 0
|
||||
* _PAGE_PRESENT at bit 8
|
||||
* _PAGE_PROTNONE at bit 9
|
||||
*
|
||||
* For the normal case, we encode the swap type into bits 0:7 and the
|
||||
* swap offset into bits 10:30. For the 64-bit PTE case, we keep the
|
||||
* preserved bits in the low 32-bits and use the upper 32 as the swap
|
||||
* offset (along with a 5-bit type), following the same approach as x86
|
||||
* PAE. This keeps the logic quite simple, and allows for a full 32
|
||||
* PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with
|
||||
* in the pte_low case.
|
||||
*
|
||||
* As is evident by the Alpha code, if we ever get a 64-bit unsigned
|
||||
* long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes
|
||||
* much cleaner..
|
||||
*
|
||||
* NOTE: We should set ZEROs at the position of _PAGE_PRESENT
|
||||
* and _PAGE_PROTNONE bits
|
||||
*/
|
||||
#ifdef CONFIG_X2TLB
|
||||
#define __swp_type(x) ((x).val & 0x1f)
|
||||
#define __swp_offset(x) ((x).val >> 5)
|
||||
#define __swp_entry(type, offset) ((swp_entry_t){ (type) | (offset) << 5})
|
||||
#define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high })
|
||||
#define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val })
|
||||
|
||||
/*
|
||||
* Encode and decode a nonlinear file mapping entry
|
||||
*/
|
||||
#define pte_to_pgoff(pte) ((pte).pte_high)
|
||||
#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) })
|
||||
|
||||
#define PTE_FILE_MAX_BITS 32
|
||||
#else
|
||||
#define __swp_type(x) ((x).val & 0xff)
|
||||
#define __swp_offset(x) ((x).val >> 10)
|
||||
#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) <<10})
|
||||
|
||||
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 })
|
||||
#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 })
|
||||
|
||||
/*
|
||||
* Encode and decode a nonlinear file mapping entry
|
||||
*/
|
||||
#define PTE_FILE_MAX_BITS 29
|
||||
#define pte_to_pgoff(pte) (pte_val(pte) >> 1)
|
||||
#define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE })
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ASM_SH_PGTABLE_32_H */
|
||||
|
|
@ -1,8 +1,6 @@
|
|||
#ifndef __ASM_SH64_PGTABLE_H
|
||||
#define __ASM_SH64_PGTABLE_H
|
||||
|
||||
#include <asm-generic/4level-fixup.h>
|
||||
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
|
|
@ -18,119 +16,26 @@
|
|||
* the SuperH page table tree.
|
||||
*/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <linux/threads.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/page.h>
|
||||
#include <linux/threads.h>
|
||||
|
||||
struct vm_area_struct;
|
||||
|
||||
extern void paging_init(void);
|
||||
|
||||
/* We provide our own get_unmapped_area to avoid cache synonym issue */
|
||||
#define HAVE_ARCH_UNMAPPED_AREA
|
||||
|
||||
/*
|
||||
* Basically we have the same two-level (which is the logical three level
|
||||
* Linux page table layout folded) page tables as the i386.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ZERO_PAGE is a global shared page that is always zero: used
|
||||
* for zero-mapped memory areas etc..
|
||||
*/
|
||||
extern unsigned char empty_zero_page[PAGE_SIZE];
|
||||
#define ZERO_PAGE(vaddr) (mem_map + MAP_NR(empty_zero_page))
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
* NEFF and NPHYS related defines.
|
||||
* FIXME : These need to be model-dependent. For now this is OK, SH5-101 and SH5-103
|
||||
* implement 32 bits effective and 32 bits physical. But future implementations may
|
||||
* extend beyond this.
|
||||
*/
|
||||
#define NEFF 32
|
||||
#define NEFF_SIGN (1LL << (NEFF - 1))
|
||||
#define NEFF_MASK (-1LL << NEFF)
|
||||
|
||||
#define NPHYS 32
|
||||
#define NPHYS_SIGN (1LL << (NPHYS - 1))
|
||||
#define NPHYS_MASK (-1LL << NPHYS)
|
||||
|
||||
/* Typically 2-level is sufficient up to 32 bits of virtual address space, beyond
|
||||
that 3-level would be appropriate. */
|
||||
#if defined(CONFIG_SH64_PGTABLE_2_LEVEL)
|
||||
/* For 4k pages, this contains 512 entries, i.e. 9 bits worth of address. */
|
||||
#define PTRS_PER_PTE ((1<<PAGE_SHIFT)/sizeof(unsigned long long))
|
||||
#define PTE_MAGNITUDE 3 /* sizeof(unsigned long long) magnit. */
|
||||
#define PTE_SHIFT PAGE_SHIFT
|
||||
#define PTE_BITS (PAGE_SHIFT - PTE_MAGNITUDE)
|
||||
|
||||
/* top level: PMD. */
|
||||
#define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS)
|
||||
#define PGD_BITS (NEFF - PGDIR_SHIFT)
|
||||
#define PTRS_PER_PGD (1<<PGD_BITS)
|
||||
|
||||
/* middle level: PMD. This doesn't do anything for the 2-level case. */
|
||||
#define PTRS_PER_PMD (1)
|
||||
|
||||
#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
|
||||
#define PGDIR_MASK (~(PGDIR_SIZE-1))
|
||||
#define PMD_SHIFT PGDIR_SHIFT
|
||||
#define PMD_SIZE PGDIR_SIZE
|
||||
#define PMD_MASK PGDIR_MASK
|
||||
|
||||
#elif defined(CONFIG_SH64_PGTABLE_3_LEVEL)
|
||||
/*
|
||||
* three-level asymmetric paging structure: PGD is top level.
|
||||
* The asymmetry comes from 32-bit pointers and 64-bit PTEs.
|
||||
*/
|
||||
/* bottom level: PTE. It's 9 bits = 512 pointers */
|
||||
#define PTRS_PER_PTE ((1<<PAGE_SHIFT)/sizeof(unsigned long long))
|
||||
#define PTE_MAGNITUDE 3 /* sizeof(unsigned long long) magnit. */
|
||||
#define PTE_SHIFT PAGE_SHIFT
|
||||
#define PTE_BITS (PAGE_SHIFT - PTE_MAGNITUDE)
|
||||
|
||||
/* middle level: PMD. It's 10 bits = 1024 pointers */
|
||||
#define PTRS_PER_PMD ((1<<PAGE_SHIFT)/sizeof(unsigned long long *))
|
||||
#define PMD_MAGNITUDE 2 /* sizeof(unsigned long long *) magnit. */
|
||||
#define PMD_SHIFT (PTE_SHIFT + PTE_BITS)
|
||||
#define PMD_BITS (PAGE_SHIFT - PMD_MAGNITUDE)
|
||||
|
||||
/* top level: PMD. It's 1 bit = 2 pointers */
|
||||
#define PGDIR_SHIFT (PMD_SHIFT + PMD_BITS)
|
||||
#define PGD_BITS (NEFF - PGDIR_SHIFT)
|
||||
#define PTRS_PER_PGD (1<<PGD_BITS)
|
||||
|
||||
#define PMD_SIZE (1UL << PMD_SHIFT)
|
||||
#define PMD_MASK (~(PMD_SIZE-1))
|
||||
#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
|
||||
#define PGDIR_MASK (~(PGDIR_SIZE-1))
|
||||
|
||||
#else
|
||||
#error "No defined number of page table levels"
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Error outputs.
|
||||
*/
|
||||
#define pte_ERROR(e) \
|
||||
printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e))
|
||||
#define pmd_ERROR(e) \
|
||||
printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
|
||||
#define pgd_ERROR(e) \
|
||||
printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
|
||||
|
||||
/*
|
||||
* Table setting routines. Used within arch/mm only.
|
||||
*/
|
||||
#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval)
|
||||
#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
|
||||
|
||||
static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
|
||||
{
|
||||
unsigned long long x = ((unsigned long long) pteval.pte);
|
||||
unsigned long long x = ((unsigned long long) pteval.pte_low);
|
||||
unsigned long long *xp = (unsigned long long *) pteptr;
|
||||
/*
|
||||
* Sign-extend based on NPHYS.
|
||||
|
|
@ -156,61 +61,6 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
|
|||
/* To find an entry in a kernel PGD. */
|
||||
#define pgd_offset_k(address) pgd_offset(&init_mm, address)
|
||||
|
||||
/*
|
||||
* PGD level access routines.
|
||||
*
|
||||
* Note1:
|
||||
* There's no need to use physical addresses since the tree walk is all
|
||||
* in performed in software, until the PTE translation.
|
||||
*
|
||||
* Note 2:
|
||||
* A PGD entry can be uninitialized (_PGD_UNUSED), generically bad,
|
||||
* clear (_PGD_EMPTY), present. When present, lower 3 nibbles contain
|
||||
* _KERNPG_TABLE. Being a kernel virtual pointer also bit 31 must
|
||||
* be 1. Assuming an arbitrary clear value of bit 31 set to 0 and
|
||||
* lower 3 nibbles set to 0xFFF (_PGD_EMPTY) any other value is a
|
||||
* bad pgd that must be notified via printk().
|
||||
*
|
||||
*/
|
||||
#define _PGD_EMPTY 0x0
|
||||
|
||||
#if defined(CONFIG_SH64_PGTABLE_2_LEVEL)
|
||||
static inline int pgd_none(pgd_t pgd) { return 0; }
|
||||
static inline int pgd_bad(pgd_t pgd) { return 0; }
|
||||
#define pgd_present(pgd) ((pgd_val(pgd) & _PAGE_PRESENT) ? 1 : 0)
|
||||
#define pgd_clear(xx) do { } while(0)
|
||||
|
||||
#elif defined(CONFIG_SH64_PGTABLE_3_LEVEL)
|
||||
#define pgd_present(pgd_entry) (1)
|
||||
#define pgd_none(pgd_entry) (pgd_val((pgd_entry)) == _PGD_EMPTY)
|
||||
/* TODO: Think later about what a useful definition of 'bad' would be now. */
|
||||
#define pgd_bad(pgd_entry) (0)
|
||||
#define pgd_clear(pgd_entry_p) (set_pgd((pgd_entry_p), __pgd(_PGD_EMPTY)))
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#define pgd_page_vaddr(pgd_entry) ((unsigned long) (pgd_val(pgd_entry) & PAGE_MASK))
|
||||
#define pgd_page(pgd) (virt_to_page(pgd_val(pgd)))
|
||||
|
||||
|
||||
/*
|
||||
* PMD defines. Middle level.
|
||||
*/
|
||||
|
||||
/* PGD to PMD dereferencing */
|
||||
#if defined(CONFIG_SH64_PGTABLE_2_LEVEL)
|
||||
static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
|
||||
{
|
||||
return (pmd_t *) dir;
|
||||
}
|
||||
#elif defined(CONFIG_SH64_PGTABLE_3_LEVEL)
|
||||
#define __pmd_offset(address) \
|
||||
(((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
|
||||
#define pmd_offset(dir, addr) \
|
||||
((pmd_t *) ((pgd_val(*(dir))) & PAGE_MASK) + __pmd_offset((addr)))
|
||||
#endif
|
||||
|
||||
/*
|
||||
* PMD level access routines. Same notes as above.
|
||||
*/
|
||||
|
|
@ -239,15 +89,7 @@ static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
|
|||
#define pte_unmap(pte) do { } while (0)
|
||||
#define pte_unmap_nested(pte) do { } while (0)
|
||||
|
||||
/* Round it up ! */
|
||||
#define USER_PTRS_PER_PGD ((TASK_SIZE+PGDIR_SIZE-1)/PGDIR_SIZE)
|
||||
#define FIRST_USER_ADDRESS 0
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#define VMALLOC_END 0xff000000
|
||||
#define VMALLOC_START 0xf0000000
|
||||
#define VMALLOC_VMADDR(x) ((unsigned long)(x))
|
||||
|
||||
#define IOBASE_VADDR 0xff000000
|
||||
#define IOBASE_END 0xffffffff
|
||||
|
||||
|
|
@ -315,43 +157,28 @@ static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
|
|||
|
||||
#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
|
||||
|
||||
#define PAGE_NONE __pgprot(_PAGE_CACHABLE | _PAGE_ACCESSED)
|
||||
#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
|
||||
_PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_USER | \
|
||||
_PAGE_SHARED)
|
||||
/* We need to include PAGE_EXECUTE in PAGE_COPY because it is the default
|
||||
* protection mode for the stack. */
|
||||
#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_CACHABLE | \
|
||||
_PAGE_ACCESSED | _PAGE_USER | _PAGE_EXECUTE)
|
||||
#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_CACHABLE | \
|
||||
_PAGE_ACCESSED | _PAGE_USER)
|
||||
#define PAGE_KERNEL __pgprot(_KERNPG_TABLE)
|
||||
/*
|
||||
* We have full permissions (Read/Write/Execute/Shared).
|
||||
*/
|
||||
#define _PAGE_COMMON (_PAGE_PRESENT | _PAGE_USER | \
|
||||
_PAGE_CACHABLE | _PAGE_ACCESSED)
|
||||
|
||||
#define PAGE_NONE __pgprot(_PAGE_CACHABLE | _PAGE_ACCESSED)
|
||||
#define PAGE_SHARED __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_WRITE | \
|
||||
_PAGE_SHARED)
|
||||
#define PAGE_EXECREAD __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_EXECUTE)
|
||||
|
||||
/*
|
||||
* In ST50 we have full permissions (Read/Write/Execute/Shared).
|
||||
* Just match'em all. These are for mmap(), therefore all at least
|
||||
* User/Cachable/Present/Accessed. No point in making Fault on Write.
|
||||
* We need to include PAGE_EXECUTE in PAGE_COPY because it is the default
|
||||
* protection mode for the stack.
|
||||
*/
|
||||
#define __MMAP_COMMON (_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED)
|
||||
/* sxwr */
|
||||
#define __P000 __pgprot(__MMAP_COMMON)
|
||||
#define __P001 __pgprot(__MMAP_COMMON | _PAGE_READ)
|
||||
#define __P010 __pgprot(__MMAP_COMMON)
|
||||
#define __P011 __pgprot(__MMAP_COMMON | _PAGE_READ)
|
||||
#define __P100 __pgprot(__MMAP_COMMON | _PAGE_EXECUTE)
|
||||
#define __P101 __pgprot(__MMAP_COMMON | _PAGE_EXECUTE | _PAGE_READ)
|
||||
#define __P110 __pgprot(__MMAP_COMMON | _PAGE_EXECUTE)
|
||||
#define __P111 __pgprot(__MMAP_COMMON | _PAGE_EXECUTE | _PAGE_READ)
|
||||
#define PAGE_COPY PAGE_EXECREAD
|
||||
|
||||
#define __S000 __pgprot(__MMAP_COMMON | _PAGE_SHARED)
|
||||
#define __S001 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_READ)
|
||||
#define __S010 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_WRITE)
|
||||
#define __S011 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_READ | _PAGE_WRITE)
|
||||
#define __S100 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_EXECUTE)
|
||||
#define __S101 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_EXECUTE | _PAGE_READ)
|
||||
#define __S110 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_EXECUTE | _PAGE_WRITE)
|
||||
#define __S111 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_EXECUTE | _PAGE_READ | _PAGE_WRITE)
|
||||
#define PAGE_READONLY __pgprot(_PAGE_COMMON | _PAGE_READ)
|
||||
#define PAGE_WRITEONLY __pgprot(_PAGE_COMMON | _PAGE_WRITE)
|
||||
#define PAGE_RWX __pgprot(_PAGE_COMMON | _PAGE_READ | \
|
||||
_PAGE_WRITE | _PAGE_EXECUTE)
|
||||
#define PAGE_KERNEL __pgprot(_KERNPG_TABLE)
|
||||
|
||||
/* Make it a device mapping for maximum safety (e.g. for mapping device
|
||||
registers into user-space via /dev/map). */
|
||||
|
|
@ -453,12 +280,6 @@ static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _
|
|||
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
||||
{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; }
|
||||
|
||||
typedef pte_t *pte_addr_t;
|
||||
#define pgtable_cache_init() do { } while (0)
|
||||
|
||||
extern void update_mmu_cache(struct vm_area_struct * vma,
|
||||
unsigned long address, pte_t pte);
|
||||
|
||||
/* Encode and decode a swap entry */
|
||||
#define __swp_type(x) (((x).val & 3) + (((x).val >> 1) & 0x3c))
|
||||
#define __swp_offset(x) ((x).val >> 8)
|
||||
|
|
@ -471,26 +292,9 @@ extern void update_mmu_cache(struct vm_area_struct * vma,
|
|||
#define pte_to_pgoff(pte) (pte_val(pte))
|
||||
#define pgoff_to_pte(off) ((pte_t) { (off) | _PAGE_FILE })
|
||||
|
||||
/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
|
||||
#define PageSkip(page) (0)
|
||||
#define kern_addr_valid(addr) (1)
|
||||
|
||||
#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
|
||||
remap_pfn_range(vma, vaddr, pfn, size, prot)
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
* No page table caches to initialise
|
||||
*/
|
||||
#define pgtable_cache_init() do { } while (0)
|
||||
|
||||
#define pte_pfn(x) (((unsigned long)((x).pte)) >> PAGE_SHIFT)
|
||||
#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
|
||||
#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
|
||||
|
||||
extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
|
||||
|
||||
#include <asm-generic/pgtable.h>
|
||||
|
||||
#endif /* __ASM_SH64_PGTABLE_H */
|
||||
Loading…
Reference in New Issue