mirror of https://gitee.com/openkylin/linux.git
watchdog: iTCO_wdt: Add support for v3 silicon
Some new Atom's, eg Avoton and Bay Trail, have slightly different iTCO functionality: - The watchdog timer ticks at 1 second instead of .6 seconds - Some 8 and 16-bit registers were combined into 32-bit registers - Some registers were removed (DAT_IN, DAT_OUT, MESSAGE) - The BOOT_STS field in TCO_STS was removed - The NO_REBOOT bit is in the PMC area instead of GCS Update the driver to support the above changes and bump the version to 1.11. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Rajat Jain <rajatjain@juniper.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Peter Tyser
Lee Jones
parent
eb71d4dec4
commit
24b3a1670b
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@ -48,7 +48,7 @@
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/* Module and version information */
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#define DRV_NAME "iTCO_wdt"
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#define DRV_VERSION "1.10"
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#define DRV_VERSION "1.11"
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/* Includes */
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#include <linux/module.h> /* For module specific items */
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@ -92,9 +92,12 @@ static struct { /* this is private data for the iTCO_wdt device */
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unsigned int iTCO_version;
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struct resource *tco_res;
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struct resource *smi_res;
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struct resource *gcs_res;
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/* NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2)*/
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unsigned long __iomem *gcs;
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/*
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* NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2),
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* or memory-mapped PMC register bit 4 (TCO version 3).
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*/
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struct resource *gcs_pmc_res;
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unsigned long __iomem *gcs_pmc;
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/* the lock for io operations */
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spinlock_t io_lock;
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struct platform_device *dev;
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@ -125,11 +128,19 @@ MODULE_PARM_DESC(turn_SMI_watchdog_clear_off,
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* Some TCO specific functions
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*/
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static inline unsigned int seconds_to_ticks(int seconds)
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/*
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* The iTCO v1 and v2's internal timer is stored as ticks which decrement
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* every 0.6 seconds. v3's internal timer is stored as seconds (some
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* datasheets incorrectly state 0.6 seconds).
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*/
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static inline unsigned int seconds_to_ticks(int secs)
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{
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/* the internal timer is stored as ticks which decrement
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* every 0.6 seconds */
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return (seconds * 10) / 6;
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return iTCO_wdt_private.iTCO_version == 3 ? secs : (secs * 10) / 6;
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}
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static inline unsigned int ticks_to_seconds(int ticks)
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{
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return iTCO_wdt_private.iTCO_version == 3 ? ticks : (ticks * 6) / 10;
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}
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static void iTCO_wdt_set_NO_REBOOT_bit(void)
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@ -137,10 +148,14 @@ static void iTCO_wdt_set_NO_REBOOT_bit(void)
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u32 val32;
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/* Set the NO_REBOOT bit: this disables reboots */
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if (iTCO_wdt_private.iTCO_version == 2) {
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val32 = readl(iTCO_wdt_private.gcs);
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if (iTCO_wdt_private.iTCO_version == 3) {
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val32 = readl(iTCO_wdt_private.gcs_pmc);
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val32 |= 0x00000010;
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writel(val32, iTCO_wdt_private.gcs_pmc);
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} else if (iTCO_wdt_private.iTCO_version == 2) {
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val32 = readl(iTCO_wdt_private.gcs_pmc);
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val32 |= 0x00000020;
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writel(val32, iTCO_wdt_private.gcs);
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writel(val32, iTCO_wdt_private.gcs_pmc);
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} else if (iTCO_wdt_private.iTCO_version == 1) {
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pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
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val32 |= 0x00000002;
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@ -154,12 +169,20 @@ static int iTCO_wdt_unset_NO_REBOOT_bit(void)
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u32 val32;
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/* Unset the NO_REBOOT bit: this enables reboots */
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if (iTCO_wdt_private.iTCO_version == 2) {
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val32 = readl(iTCO_wdt_private.gcs);
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val32 &= 0xffffffdf;
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writel(val32, iTCO_wdt_private.gcs);
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if (iTCO_wdt_private.iTCO_version == 3) {
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val32 = readl(iTCO_wdt_private.gcs_pmc);
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val32 &= 0xffffffef;
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writel(val32, iTCO_wdt_private.gcs_pmc);
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val32 = readl(iTCO_wdt_private.gcs);
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val32 = readl(iTCO_wdt_private.gcs_pmc);
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if (val32 & 0x00000010)
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ret = -EIO;
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} else if (iTCO_wdt_private.iTCO_version == 2) {
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val32 = readl(iTCO_wdt_private.gcs_pmc);
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val32 &= 0xffffffdf;
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writel(val32, iTCO_wdt_private.gcs_pmc);
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val32 = readl(iTCO_wdt_private.gcs_pmc);
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if (val32 & 0x00000020)
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ret = -EIO;
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} else if (iTCO_wdt_private.iTCO_version == 1) {
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@ -192,7 +215,7 @@ static int iTCO_wdt_start(struct watchdog_device *wd_dev)
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/* Force the timer to its reload value by writing to the TCO_RLD
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register */
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if (iTCO_wdt_private.iTCO_version == 2)
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if (iTCO_wdt_private.iTCO_version >= 2)
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outw(0x01, TCO_RLD);
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else if (iTCO_wdt_private.iTCO_version == 1)
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outb(0x01, TCO_RLD);
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@ -240,9 +263,9 @@ static int iTCO_wdt_ping(struct watchdog_device *wd_dev)
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iTCO_vendor_pre_keepalive(iTCO_wdt_private.smi_res, wd_dev->timeout);
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/* Reload the timer by writing to the TCO Timer Counter register */
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if (iTCO_wdt_private.iTCO_version == 2)
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if (iTCO_wdt_private.iTCO_version >= 2) {
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outw(0x01, TCO_RLD);
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else if (iTCO_wdt_private.iTCO_version == 1) {
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} else if (iTCO_wdt_private.iTCO_version == 1) {
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/* Reset the timeout status bit so that the timer
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* needs to count down twice again before rebooting */
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outw(0x0008, TCO1_STS); /* write 1 to clear bit */
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@ -270,14 +293,14 @@ static int iTCO_wdt_set_timeout(struct watchdog_device *wd_dev, unsigned int t)
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/* "Values of 0h-3h are ignored and should not be attempted" */
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if (tmrval < 0x04)
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return -EINVAL;
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if (((iTCO_wdt_private.iTCO_version == 2) && (tmrval > 0x3ff)) ||
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if (((iTCO_wdt_private.iTCO_version >= 2) && (tmrval > 0x3ff)) ||
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((iTCO_wdt_private.iTCO_version == 1) && (tmrval > 0x03f)))
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return -EINVAL;
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iTCO_vendor_pre_set_heartbeat(tmrval);
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/* Write new heartbeat to watchdog */
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if (iTCO_wdt_private.iTCO_version == 2) {
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if (iTCO_wdt_private.iTCO_version >= 2) {
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spin_lock(&iTCO_wdt_private.io_lock);
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val16 = inw(TCOv2_TMR);
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val16 &= 0xfc00;
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@ -312,13 +335,13 @@ static unsigned int iTCO_wdt_get_timeleft(struct watchdog_device *wd_dev)
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unsigned int time_left = 0;
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/* read the TCO Timer */
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if (iTCO_wdt_private.iTCO_version == 2) {
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if (iTCO_wdt_private.iTCO_version >= 2) {
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spin_lock(&iTCO_wdt_private.io_lock);
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val16 = inw(TCO_RLD);
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val16 &= 0x3ff;
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spin_unlock(&iTCO_wdt_private.io_lock);
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time_left = (val16 * 6) / 10;
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time_left = ticks_to_seconds(val16);
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} else if (iTCO_wdt_private.iTCO_version == 1) {
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spin_lock(&iTCO_wdt_private.io_lock);
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val8 = inb(TCO_RLD);
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@ -327,7 +350,7 @@ static unsigned int iTCO_wdt_get_timeleft(struct watchdog_device *wd_dev)
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val8 += (inb(TCOv1_TMR) & 0x3f);
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spin_unlock(&iTCO_wdt_private.io_lock);
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time_left = (val8 * 6) / 10;
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time_left = ticks_to_seconds(val8);
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}
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return time_left;
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}
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@ -376,16 +399,16 @@ static void iTCO_wdt_cleanup(void)
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resource_size(iTCO_wdt_private.tco_res));
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release_region(iTCO_wdt_private.smi_res->start,
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resource_size(iTCO_wdt_private.smi_res));
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if (iTCO_wdt_private.iTCO_version == 2) {
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iounmap(iTCO_wdt_private.gcs);
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release_mem_region(iTCO_wdt_private.gcs_res->start,
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resource_size(iTCO_wdt_private.gcs_res));
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if (iTCO_wdt_private.iTCO_version >= 2) {
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iounmap(iTCO_wdt_private.gcs_pmc);
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release_mem_region(iTCO_wdt_private.gcs_pmc_res->start,
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resource_size(iTCO_wdt_private.gcs_pmc_res));
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}
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iTCO_wdt_private.tco_res = NULL;
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iTCO_wdt_private.smi_res = NULL;
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iTCO_wdt_private.gcs_res = NULL;
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iTCO_wdt_private.gcs = NULL;
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iTCO_wdt_private.gcs_pmc_res = NULL;
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iTCO_wdt_private.gcs_pmc = NULL;
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}
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static int iTCO_wdt_probe(struct platform_device *dev)
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@ -414,27 +437,27 @@ static int iTCO_wdt_probe(struct platform_device *dev)
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iTCO_wdt_private.pdev = to_pci_dev(dev->dev.parent);
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/*
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* Get the Memory-Mapped GCS register, we need it for the
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* NO_REBOOT flag (TCO v2).
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* Get the Memory-Mapped GCS or PMC register, we need it for the
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* NO_REBOOT flag (TCO v2 and v3).
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*/
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if (iTCO_wdt_private.iTCO_version == 2) {
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iTCO_wdt_private.gcs_res = platform_get_resource(dev,
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if (iTCO_wdt_private.iTCO_version >= 2) {
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iTCO_wdt_private.gcs_pmc_res = platform_get_resource(dev,
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IORESOURCE_MEM,
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ICH_RES_MEM_GCS);
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ICH_RES_MEM_GCS_PMC);
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if (!iTCO_wdt_private.gcs_res)
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if (!iTCO_wdt_private.gcs_pmc_res)
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goto out;
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if (!request_mem_region(iTCO_wdt_private.gcs_res->start,
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resource_size(iTCO_wdt_private.gcs_res), dev->name)) {
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if (!request_mem_region(iTCO_wdt_private.gcs_pmc_res->start,
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resource_size(iTCO_wdt_private.gcs_pmc_res), dev->name)) {
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ret = -EBUSY;
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goto out;
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}
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iTCO_wdt_private.gcs = ioremap(iTCO_wdt_private.gcs_res->start,
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resource_size(iTCO_wdt_private.gcs_res));
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if (!iTCO_wdt_private.gcs) {
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iTCO_wdt_private.gcs_pmc = ioremap(iTCO_wdt_private.gcs_pmc_res->start,
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resource_size(iTCO_wdt_private.gcs_pmc_res));
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if (!iTCO_wdt_private.gcs_pmc) {
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ret = -EIO;
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goto unreg_gcs;
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goto unreg_gcs_pmc;
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}
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}
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@ -442,7 +465,7 @@ static int iTCO_wdt_probe(struct platform_device *dev)
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if (iTCO_wdt_unset_NO_REBOOT_bit() && iTCO_vendor_check_noreboot_on()) {
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pr_info("unable to reset NO_REBOOT flag, device disabled by hardware/BIOS\n");
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ret = -ENODEV; /* Cannot reset NO_REBOOT bit */
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goto unmap_gcs;
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goto unmap_gcs_pmc;
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}
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/* Set the NO_REBOOT bit to prevent later reboots, just for sure */
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@ -454,7 +477,7 @@ static int iTCO_wdt_probe(struct platform_device *dev)
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pr_err("I/O address 0x%04llx already in use, device disabled\n",
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(u64)SMI_EN);
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ret = -EBUSY;
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goto unmap_gcs;
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goto unmap_gcs_pmc;
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}
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if (turn_SMI_watchdog_clear_off >= iTCO_wdt_private.iTCO_version) {
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/*
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@ -478,9 +501,13 @@ static int iTCO_wdt_probe(struct platform_device *dev)
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ich_info->name, ich_info->iTCO_version, (u64)TCOBASE);
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/* Clear out the (probably old) status */
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outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */
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outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */
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outw(0x0004, TCO2_STS); /* Clear BOOT_STS bit */
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if (iTCO_wdt_private.iTCO_version == 3) {
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outl(0x20008, TCO1_STS);
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} else {
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outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */
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outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */
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outw(0x0004, TCO2_STS); /* Clear BOOT_STS bit */
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}
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iTCO_wdt_watchdog_dev.bootstatus = 0;
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iTCO_wdt_watchdog_dev.timeout = WATCHDOG_TIMEOUT;
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@ -515,18 +542,18 @@ static int iTCO_wdt_probe(struct platform_device *dev)
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unreg_smi:
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release_region(iTCO_wdt_private.smi_res->start,
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resource_size(iTCO_wdt_private.smi_res));
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unmap_gcs:
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if (iTCO_wdt_private.iTCO_version == 2)
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iounmap(iTCO_wdt_private.gcs);
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unreg_gcs:
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if (iTCO_wdt_private.iTCO_version == 2)
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release_mem_region(iTCO_wdt_private.gcs_res->start,
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resource_size(iTCO_wdt_private.gcs_res));
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unmap_gcs_pmc:
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if (iTCO_wdt_private.iTCO_version >= 2)
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iounmap(iTCO_wdt_private.gcs_pmc);
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unreg_gcs_pmc:
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if (iTCO_wdt_private.iTCO_version >= 2)
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release_mem_region(iTCO_wdt_private.gcs_pmc_res->start,
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resource_size(iTCO_wdt_private.gcs_pmc_res));
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out:
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iTCO_wdt_private.tco_res = NULL;
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iTCO_wdt_private.smi_res = NULL;
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iTCO_wdt_private.gcs_res = NULL;
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iTCO_wdt_private.gcs = NULL;
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iTCO_wdt_private.gcs_pmc_res = NULL;
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iTCO_wdt_private.gcs_pmc = NULL;
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return ret;
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}
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