staging: comedi: addi_apci_1032: Fix endian problem for COS sample

The Change-Of-State (COS) subdevice supports Comedi asynchronous
commands to read 16-bit change-of-state values.  However, the interrupt
handler is calling `comedi_buf_write_samples()` with the address of a
32-bit integer `&s->state`.  On bigendian architectures, it will copy 2
bytes from the wrong end of the 32-bit integer.  Fix it by transferring
the value via a 16-bit integer.

Fixes: 6bb45f2b0c ("staging: comedi: addi_apci_1032: use comedi_buf_write_samples()")
Cc: <stable@vger.kernel.org> # 3.19+
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Link: https://lore.kernel.org/r/20210223143055.257402-2-abbotti@mev.co.uk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Ian Abbott 2021-02-23 14:30:42 +00:00 committed by Greg Kroah-Hartman
parent e163b9823a
commit 25317f428a
1 changed files with 3 additions and 1 deletions

View File

@ -260,6 +260,7 @@ static irqreturn_t apci1032_interrupt(int irq, void *d)
struct apci1032_private *devpriv = dev->private; struct apci1032_private *devpriv = dev->private;
struct comedi_subdevice *s = dev->read_subdev; struct comedi_subdevice *s = dev->read_subdev;
unsigned int ctrl; unsigned int ctrl;
unsigned short val;
/* check interrupt is from this device */ /* check interrupt is from this device */
if ((inl(devpriv->amcc_iobase + AMCC_OP_REG_INTCSR) & if ((inl(devpriv->amcc_iobase + AMCC_OP_REG_INTCSR) &
@ -275,7 +276,8 @@ static irqreturn_t apci1032_interrupt(int irq, void *d)
outl(ctrl & ~APCI1032_CTRL_INT_ENA, dev->iobase + APCI1032_CTRL_REG); outl(ctrl & ~APCI1032_CTRL_INT_ENA, dev->iobase + APCI1032_CTRL_REG);
s->state = inl(dev->iobase + APCI1032_STATUS_REG) & 0xffff; s->state = inl(dev->iobase + APCI1032_STATUS_REG) & 0xffff;
comedi_buf_write_samples(s, &s->state, 1); val = s->state;
comedi_buf_write_samples(s, &val, 1);
comedi_handle_events(dev, s); comedi_handle_events(dev, s);
/* enable the interrupt */ /* enable the interrupt */