Second Round of Renesas ARM Based SoC DT Updates for v3.16

* Add r8a7791 (R-Car M2) based Henninger board
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Merge tag 'renesas-dt2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Second Round of Renesas ARM Based SoC DT Updates for v3.16" from Simon
Horman:

* Add r8a7791 (R-Car M2) based Henninger board

* tag 'renesas-dt2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: henninger: enable SATA0
  ARM: shmobile: henninger: add Ether DT support
  ARM: shmobile: henninger: initial device tree

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-05-05 18:44:12 -07:00
commit 2542f928b2
2 changed files with 81 additions and 0 deletions

View File

@ -315,6 +315,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
sh7372-mackerel.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
r7s72100-genmai-reference.dtb \
r8a7791-henninger.dtb \
r8a7791-koelsch.dtb \
r8a7790-lager.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \

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@ -0,0 +1,80 @@
/*
* Device Tree Source for the Henninger board
*
* Copyright (C) 2014 Renesas Solutions Corp.
* Copyright (C) 2014 Cogent Embedded, Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
#include "r8a7791.dtsi"
/ {
model = "Henninger";
compatible = "renesas,henninger", "renesas,r8a7791";
aliases {
serial0 = &scif0;
};
chosen {
bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x40000000>;
};
memory@200000000 {
device_type = "memory";
reg = <2 0x00000000 0 0x40000000>;
};
};
&pfc {
scif0_pins: serial0 {
renesas,groups = "scif0_data_d";
renesas,function = "scif0";
};
ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth";
};
phy1_pins: phy1 {
renesas,groups = "intc_irq0";
renesas,function = "intc";
};
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
status = "okay";
};
&ether {
pinctrl-0 = <&ether_pins &phy1_pins>;
pinctrl-names = "default";
phy-handle = <&phy1>;
renesas,ether-link-active-low;
status = "ok";
phy1: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
micrel,led-mode = <1>;
};
};
&sata0 {
status = "okay";
};