mirror of https://gitee.com/openkylin/linux.git
drm/i915: Verify the engine workarounds stick on application
Read the engine workarounds back using the GPU after loading the initial context state to verify that we are setting them correctly, and bail if it fails. v2: Break out the verification into its own loop Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190417075657.19456-3-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson
parent
4f1cb5875c
commit
254e11864a
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@ -4842,6 +4842,23 @@ static void i915_gem_fini_scratch(struct drm_i915_private *i915)
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i915_vma_unpin_and_release(&i915->gt.scratch, 0);
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}
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static int intel_engines_verify_workarounds(struct drm_i915_private *i915)
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{
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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int err = 0;
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if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
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return 0;
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for_each_engine(engine, i915, id) {
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if (intel_engine_verify_workarounds(engine, "load"))
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err = -EIO;
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}
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return err;
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}
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int i915_gem_init(struct drm_i915_private *dev_priv)
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{
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int ret;
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@ -4927,6 +4944,10 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
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*/
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intel_init_clock_gating(dev_priv);
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ret = intel_engines_verify_workarounds(dev_priv);
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if (ret)
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goto err_init_hw;
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ret = __intel_engines_record_defaults(dev_priv);
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if (ret)
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goto err_init_hw;
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@ -1259,6 +1259,126 @@ void intel_engine_apply_workarounds(struct intel_engine_cs *engine)
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wa_list_apply(engine->uncore, &engine->wa_list);
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}
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static struct i915_vma *
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create_scratch(struct i915_address_space *vm, int count)
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{
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struct drm_i915_gem_object *obj;
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struct i915_vma *vma;
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unsigned int size;
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int err;
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size = round_up(count * sizeof(u32), PAGE_SIZE);
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obj = i915_gem_object_create_internal(vm->i915, size);
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if (IS_ERR(obj))
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return ERR_CAST(obj);
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i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC);
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vma = i915_vma_instance(obj, vm, NULL);
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if (IS_ERR(vma)) {
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err = PTR_ERR(vma);
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goto err_obj;
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}
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err = i915_vma_pin(vma, 0, 0,
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i915_vma_is_ggtt(vma) ? PIN_GLOBAL : PIN_USER);
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if (err)
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goto err_obj;
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return vma;
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err_obj:
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i915_gem_object_put(obj);
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return ERR_PTR(err);
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}
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static int
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wa_list_srm(struct i915_request *rq,
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const struct i915_wa_list *wal,
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struct i915_vma *vma)
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{
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const struct i915_wa *wa;
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unsigned int i;
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u32 srm, *cs;
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srm = MI_STORE_REGISTER_MEM | MI_SRM_LRM_GLOBAL_GTT;
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if (INTEL_GEN(rq->i915) >= 8)
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srm++;
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cs = intel_ring_begin(rq, 4 * wal->count);
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if (IS_ERR(cs))
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return PTR_ERR(cs);
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for (i = 0, wa = wal->list; i < wal->count; i++, wa++) {
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*cs++ = srm;
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*cs++ = i915_mmio_reg_offset(wa->reg);
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*cs++ = i915_ggtt_offset(vma) + sizeof(u32) * i;
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*cs++ = 0;
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}
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intel_ring_advance(rq, cs);
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return 0;
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}
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static int engine_wa_list_verify(struct intel_engine_cs *engine,
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const struct i915_wa_list * const wal,
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const char *from)
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{
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const struct i915_wa *wa;
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struct i915_request *rq;
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struct i915_vma *vma;
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unsigned int i;
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u32 *results;
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int err;
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if (!wal->count)
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return 0;
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vma = create_scratch(&engine->i915->ggtt.vm, wal->count);
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if (IS_ERR(vma))
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return PTR_ERR(vma);
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rq = i915_request_alloc(engine, engine->kernel_context->gem_context);
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if (IS_ERR(rq)) {
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err = PTR_ERR(rq);
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goto err_vma;
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}
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err = wa_list_srm(rq, wal, vma);
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if (err)
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goto err_vma;
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i915_request_add(rq);
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if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 5) < 0) {
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err = -ETIME;
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goto err_vma;
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}
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results = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
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if (IS_ERR(results)) {
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err = PTR_ERR(results);
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goto err_vma;
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}
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err = 0;
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for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
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if (!wa_verify(wa, results[i], wal->name, from))
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err = -ENXIO;
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i915_gem_object_unpin_map(vma->obj);
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err_vma:
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i915_vma_unpin(vma);
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i915_vma_put(vma);
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return err;
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}
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int intel_engine_verify_workarounds(struct intel_engine_cs *engine,
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const char *from)
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{
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return engine_wa_list_verify(engine, &engine->wa_list, from);
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}
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#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
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#include "selftests/intel_workarounds.c"
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#endif
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@ -30,5 +30,7 @@ void intel_engine_apply_whitelist(struct intel_engine_cs *engine);
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void intel_engine_init_workarounds(struct intel_engine_cs *engine);
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void intel_engine_apply_workarounds(struct intel_engine_cs *engine);
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int intel_engine_verify_workarounds(struct intel_engine_cs *engine,
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const char *from);
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#endif
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@ -340,49 +340,6 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
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return err;
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}
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static struct i915_vma *create_scratch(struct i915_gem_context *ctx)
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{
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struct drm_i915_gem_object *obj;
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struct i915_vma *vma;
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void *ptr;
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int err;
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obj = i915_gem_object_create_internal(ctx->i915, PAGE_SIZE);
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if (IS_ERR(obj))
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return ERR_CAST(obj);
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i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC);
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ptr = i915_gem_object_pin_map(obj, I915_MAP_WB);
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if (IS_ERR(ptr)) {
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err = PTR_ERR(ptr);
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goto err_obj;
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}
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memset(ptr, 0xc5, PAGE_SIZE);
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i915_gem_object_flush_map(obj);
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i915_gem_object_unpin_map(obj);
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vma = i915_vma_instance(obj, &ctx->ppgtt->vm, NULL);
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if (IS_ERR(vma)) {
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err = PTR_ERR(vma);
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goto err_obj;
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}
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err = i915_vma_pin(vma, 0, 0, PIN_USER);
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if (err)
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goto err_obj;
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err = i915_gem_object_set_to_cpu_domain(obj, false);
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if (err)
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goto err_obj;
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return vma;
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err_obj:
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i915_gem_object_put(obj);
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return ERR_PTR(err);
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}
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static struct i915_vma *create_batch(struct i915_gem_context *ctx)
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{
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struct drm_i915_gem_object *obj;
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@ -475,7 +432,7 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
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int err = 0, i, v;
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u32 *cs, *results;
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scratch = create_scratch(ctx);
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scratch = create_scratch(&ctx->ppgtt->vm, 2 * ARRAY_SIZE(values) + 1);
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if (IS_ERR(scratch))
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return PTR_ERR(scratch);
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@ -752,9 +709,11 @@ static bool verify_gt_engine_wa(struct drm_i915_private *i915,
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ok &= wa_list_verify(&i915->uncore, &lists->gt_wa_list, str);
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for_each_engine(engine, i915, id)
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ok &= wa_list_verify(engine->uncore,
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&lists->engine[id].wa_list, str);
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for_each_engine(engine, i915, id) {
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ok &= engine_wa_list_verify(engine,
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&lists->engine[id].wa_list,
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str) == 0;
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}
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return ok;
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}
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