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MIPS: head: Reorder instructions missing a delay slot 

In this sequence the 'move' is assumed in the delay slot of the 'beq',
but head.S is in reorder mode and the former gets pushed one 'nop'
farther by the assembler.

The corrected behavior made booting with an UHI supplied dtb erratic.

Fixes: 15f37e1588 ("MIPS: store the appended dtb address in a variable")
Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/16614/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Karl Beldan 2017-06-27 19:22:16 +00:00 committed by Ralf Baechle
parent c0bc126f97
commit 25d8b92e0a
1 changed files with 1 additions and 1 deletions
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2
arch/mips/kernel/head.S
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@ -106,8 +106,8 @@ NESTED(kernel_entry, 16, sp) # kernel entry point
beq t0, t1, dtb_found
#endif
li t1, -2
beq a0, t1, dtb_found
move t2, a1
beq a0, t1, dtb_found
li t2, 0
dtb_found: