mvebu dt for 5.1 (part 1)

- Cleanup marvell,dsa properties
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Merge tag 'mvebu-dt-5.1-1' of git://git.infradead.org/linux-mvebu into arm/dt

mvebu dt for 5.1 (part 1)

 - Cleanup marvell,dsa properties

* tag 'mvebu-dt-5.1-1' of git://git.infradead.org/linux-mvebu:
  arch: arm: dts: Remove disabled marvell,dsa properties

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2019-02-15 16:01:27 +01:00
commit 260bcbb319
7 changed files with 0 additions and 329 deletions

View File

@ -114,48 +114,6 @@ sw_led {
}; };
}; };
}; };
dsa {
status = "disabled";
compatible = "marvell,dsa";
#address-cells = <2>;
#size-cells = <0>;
dsa,ethernet = <&eth1>;
dsa,mii-bus = <&mdio>;
switch@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x10 0>; /* MDIO address 16, switch 0 in tree */
port@0 {
reg = <0>;
label = "lan0";
};
port@1 {
reg = <1>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan3";
};
port@5 {
reg = <5>;
label = "cpu";
};
};
};
}; };
&pciec { &pciec {

View File

@ -30,64 +30,6 @@ pcie@3,0 {
}; };
}; };
dsa@0 {
status = "disabled";
compatible = "marvell,dsa";
dsa,ethernet = <&eth1>;
dsa,mii-bus = <&mdio>;
pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
pinctrl-names = "default";
#address-cells = <2>;
#size-cells = <0>;
switch@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4 0>;
port@0 {
reg = <0>;
label = "lan5";
};
port@1 {
reg = <1>;
label = "lan4";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan2";
};
port@4 {
reg = <4>;
label = "lan1";
};
port@5 {
reg = <5>;
label = "cpu";
};
port@6 {
/* 88E1512 external phy */
reg = <6>;
label = "lan6";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
gpio-keys { gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";
pinctrl-0 = <&rear_button_pins>; pinctrl-0 = <&rear_button_pins>;

View File

@ -210,53 +210,6 @@ pwm_fan {
compatible = "pwm-fan"; compatible = "pwm-fan";
pwms = <&gpio0 24 4000>; pwms = <&gpio0 24 4000>;
}; };
dsa {
status = "disabled";
compatible = "marvell,dsa";
#address-cells = <2>;
#size-cells = <0>;
dsa,ethernet = <&eth0>;
dsa,mii-bus = <&mdio>;
switch@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "internet";
};
port@5 {
reg = <5>;
label = "cpu";
};
};
};
}; };
&pciec { &pciec {

View File

@ -190,53 +190,6 @@ wps {
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
}; };
}; };
dsa {
status = "disabled";
compatible = "marvell,dsa";
#address-cells = <2>;
#size-cells = <0>;
dsa,ethernet = <&eth0port>;
dsa,mii-bus = <&mdio>;
switch@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0>; /* MDIO address 0, switch 0 in tree */
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@4 {
reg = <4>;
label = "wan";
};
port@6 {
reg = <6>;
label = "cpu";
};
};
};
}; };
&mdio { &mdio {

View File

@ -66,53 +66,6 @@ white-pulse {
gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
}; };
}; };
dsa {
status = "disabled";
compatible = "marvell,dsa";
#address-cells = <2>;
#size-cells = <0>;
dsa,ethernet = <&eth0port>;
dsa,mii-bus = <&mdio>;
switch@16,0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <16 0>; /* MDIO address 16, switch 0 in tree */
port@0 {
reg = <0>;
label = "ethernet1";
};
port@1 {
reg = <1>;
label = "ethernet2";
};
port@2 {
reg = <2>;
label = "ethernet3";
};
port@3 {
reg = <3>;
label = "ethernet4";
};
port@4 {
reg = <4>;
label = "internet";
};
port@5 {
reg = <5>;
label = "cpu";
};
};
};
}; };
&pinctrl { &pinctrl {

View File

@ -107,53 +107,6 @@ wps {
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
}; };
}; };
dsa {
status = "disabled";
compatible = "marvell,dsa";
#address-cells = <1>;
#size-cells = <0>;
dsa,ethernet = <&eth0port>;
dsa,mii-bus = <&mdio>;
switch@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0>; /* MDIO address 0, switch 0 in tree */
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "wan";
};
port@5 {
reg = <5>;
label = "cpu";
};
};
};
}; };
&mdio { &mdio {

View File

@ -49,47 +49,6 @@ mvsdio@90000 {
/* No WP GPIO */ /* No WP GPIO */
}; };
}; };
dsa {
status = "disabled";
compatible = "marvell,dsa";
#address-cells = <2>;
#size-cells = <0>;
dsa,ethernet = <&eth0port>;
dsa,mii-bus = <&mdio>;
switch@0 {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@5 {
reg = <5>;
label = "cpu";
};
};
};
}; };
&nand { &nand {