mirror of https://gitee.com/openkylin/linux.git
drm/i915: bikeshed the pipe CRC irq functions a bit
- Give them an _irq_handler postfix, like all the other irq stuff. - Shuffle the DEBUG_FS=n dummy functions around a bit. This is prep work to extract all the crc debug stuff into intel_display_testing.c Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1190,7 +1190,7 @@ static void dp_aux_irq_handler(struct drm_device *dev)
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}
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}
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#if defined(CONFIG_DEBUG_FS)
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#if defined(CONFIG_DEBUG_FS)
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static void display_pipe_crc_update(struct drm_device *dev, enum pipe pipe,
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static void display_pipe_crc_irq_handler(struct drm_device *dev, enum pipe pipe,
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uint32_t crc0, uint32_t crc1,
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uint32_t crc0, uint32_t crc1,
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uint32_t crc2, uint32_t crc3,
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uint32_t crc2, uint32_t crc3,
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uint32_t crc4)
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uint32_t crc4)
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@ -1227,21 +1227,29 @@ static void display_pipe_crc_update(struct drm_device *dev, enum pipe pipe,
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wake_up_interruptible(&pipe_crc->wq);
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wake_up_interruptible(&pipe_crc->wq);
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}
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}
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#else
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static inline void
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display_pipe_crc_irq_handler(struct drm_device *dev, enum pipe pipe,
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uint32_t crc0, uint32_t crc1,
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uint32_t crc2, uint32_t crc3,
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uint32_t crc4) {}
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#endif
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static void hsw_pipe_crc_update(struct drm_device *dev, enum pipe pipe)
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static void hsw_pipe_crc_irq_handler(struct drm_device *dev, enum pipe pipe)
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{
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_i915_private *dev_priv = dev->dev_private;
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display_pipe_crc_update(dev, pipe,
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display_pipe_crc_irq_handler(dev, pipe,
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I915_READ(PIPE_CRC_RES_1_IVB(pipe)),
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I915_READ(PIPE_CRC_RES_1_IVB(pipe)),
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0, 0, 0, 0);
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0, 0, 0, 0);
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}
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}
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static void ivb_pipe_crc_update(struct drm_device *dev, enum pipe pipe)
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static void ivb_pipe_crc_irq_handler(struct drm_device *dev, enum pipe pipe)
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{
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_i915_private *dev_priv = dev->dev_private;
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display_pipe_crc_update(dev, pipe,
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display_pipe_crc_irq_handler(dev, pipe,
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I915_READ(PIPE_CRC_RES_1_IVB(pipe)),
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I915_READ(PIPE_CRC_RES_1_IVB(pipe)),
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I915_READ(PIPE_CRC_RES_2_IVB(pipe)),
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I915_READ(PIPE_CRC_RES_2_IVB(pipe)),
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I915_READ(PIPE_CRC_RES_3_IVB(pipe)),
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I915_READ(PIPE_CRC_RES_3_IVB(pipe)),
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@ -1249,7 +1257,7 @@ static void ivb_pipe_crc_update(struct drm_device *dev, enum pipe pipe)
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I915_READ(PIPE_CRC_RES_5_IVB(pipe)));
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I915_READ(PIPE_CRC_RES_5_IVB(pipe)));
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}
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}
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static void i9xx_pipe_crc_update(struct drm_device *dev, enum pipe pipe)
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static void i9xx_pipe_crc_irq_handler(struct drm_device *dev, enum pipe pipe)
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{
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_i915_private *dev_priv = dev->dev_private;
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uint32_t res1, res2;
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uint32_t res1, res2;
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@ -1264,17 +1272,12 @@ static void i9xx_pipe_crc_update(struct drm_device *dev, enum pipe pipe)
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else
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else
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res2 = 0;
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res2 = 0;
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display_pipe_crc_update(dev, pipe,
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display_pipe_crc_irq_handler(dev, pipe,
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I915_READ(PIPE_CRC_RES_RED(pipe)),
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I915_READ(PIPE_CRC_RES_RED(pipe)),
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I915_READ(PIPE_CRC_RES_GREEN(pipe)),
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I915_READ(PIPE_CRC_RES_GREEN(pipe)),
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I915_READ(PIPE_CRC_RES_BLUE(pipe)),
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I915_READ(PIPE_CRC_RES_BLUE(pipe)),
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res1, res2);
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res1, res2);
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}
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}
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#else
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static inline void hsw_pipe_crc_update(struct drm_device *dev, int pipe) {}
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static inline void ivb_pipe_crc_update(struct drm_device *dev, int pipe) {}
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static inline void i9xx_pipe_crc_update(struct drm_device *dev, int pipe) {}
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#endif
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/* The RPS events need forcewake, so we add them to a work queue and mask their
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/* The RPS events need forcewake, so we add them to a work queue and mask their
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* IMR bits until the work is done. Other interrupts can be processed without
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* IMR bits until the work is done. Other interrupts can be processed without
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@ -1352,7 +1355,7 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
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}
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}
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if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
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if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
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i9xx_pipe_crc_update(dev, pipe);
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i9xx_pipe_crc_irq_handler(dev, pipe);
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}
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}
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/* Consume port. Then clear IIR or we'll miss events */
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/* Consume port. Then clear IIR or we'll miss events */
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@ -1456,9 +1459,9 @@ static void ivb_err_int_handler(struct drm_device *dev)
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if (err_int & ERR_INT_PIPE_CRC_DONE(pipe)) {
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if (err_int & ERR_INT_PIPE_CRC_DONE(pipe)) {
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if (IS_IVYBRIDGE(dev))
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if (IS_IVYBRIDGE(dev))
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ivb_pipe_crc_update(dev, pipe);
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ivb_pipe_crc_irq_handler(dev, pipe);
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else
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else
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hsw_pipe_crc_update(dev, pipe);
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hsw_pipe_crc_irq_handler(dev, pipe);
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}
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}
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}
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}
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@ -1556,10 +1559,10 @@ static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
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DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
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DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
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if (de_iir & DE_PIPEA_CRC_DONE)
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if (de_iir & DE_PIPEA_CRC_DONE)
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i9xx_pipe_crc_update(dev, PIPE_A);
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i9xx_pipe_crc_irq_handler(dev, PIPE_A);
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if (de_iir & DE_PIPEB_CRC_DONE)
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if (de_iir & DE_PIPEB_CRC_DONE)
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i9xx_pipe_crc_update(dev, PIPE_B);
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i9xx_pipe_crc_irq_handler(dev, PIPE_B);
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if (de_iir & DE_PLANEA_FLIP_DONE) {
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if (de_iir & DE_PLANEA_FLIP_DONE) {
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intel_prepare_page_flip(dev, 0);
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intel_prepare_page_flip(dev, 0);
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@ -2818,7 +2821,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
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flip_mask &= ~DISPLAY_PLANE_FLIP_PENDING(pipe);
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flip_mask &= ~DISPLAY_PLANE_FLIP_PENDING(pipe);
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if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
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if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
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i9xx_pipe_crc_update(dev, pipe);
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i9xx_pipe_crc_irq_handler(dev, pipe);
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}
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}
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iir = new_iir;
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iir = new_iir;
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@ -3022,7 +3025,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
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blc_event = true;
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blc_event = true;
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if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
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if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
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i9xx_pipe_crc_update(dev, pipe);
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i9xx_pipe_crc_irq_handler(dev, pipe);
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}
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}
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if (blc_event || (iir & I915_ASLE_INTERRUPT))
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if (blc_event || (iir & I915_ASLE_INTERRUPT))
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@ -3271,7 +3274,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
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blc_event = true;
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blc_event = true;
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if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
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if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
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i9xx_pipe_crc_update(dev, pipe);
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i9xx_pipe_crc_irq_handler(dev, pipe);
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}
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}
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