mirror of https://gitee.com/openkylin/linux.git
ARM: imx: move mx3 support to mach-imx
Fixing a few "please, no space before tabs" and "empty line at end of file" warnings on the way. LAKML-Reference: 1299271882-2130-6-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Uwe Kleine-König
Sascha Hauer
parent
7fc92c6092
commit
27ad4bf72a
|
|
@ -158,7 +158,7 @@ machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0
|
|||
machine-$(CONFIG_ARCH_MX1) := imx
|
||||
machine-$(CONFIG_ARCH_MX2) := imx
|
||||
machine-$(CONFIG_ARCH_MX25) := imx
|
||||
machine-$(CONFIG_ARCH_MX3) := mx3
|
||||
machine-$(CONFIG_ARCH_MX3) := imx
|
||||
machine-$(CONFIG_ARCH_MX5) := mx5
|
||||
machine-$(CONFIG_ARCH_MXS) := mxs
|
||||
machine-$(CONFIG_ARCH_NETX) := netx
|
||||
|
|
|
|||
|
|
@ -1,5 +1,15 @@
|
|||
config IMX_HAVE_DMA_V1
|
||||
bool
|
||||
#
|
||||
# ARCH_MX31 and ARCH_MX35 are left for compatibility
|
||||
# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
|
||||
# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
|
||||
# more sensible) names are used: SOC_IMX31 and SOC_IMX35
|
||||
config ARCH_MX31
|
||||
bool
|
||||
|
||||
config ARCH_MX35
|
||||
bool
|
||||
|
||||
config SOC_IMX1
|
||||
bool
|
||||
|
|
@ -31,6 +41,24 @@ config SOC_IMX27
|
|||
select IMX_HAVE_IOMUX_V1
|
||||
select MXC_AVIC
|
||||
|
||||
config SOC_IMX31
|
||||
bool
|
||||
select CPU_V6
|
||||
select IMX_HAVE_PLATFORM_MXC_RNGA
|
||||
select ARCH_MXC_AUDMUX_V2
|
||||
select ARCH_MX31
|
||||
select MXC_AVIC
|
||||
|
||||
config SOC_IMX35
|
||||
bool
|
||||
select CPU_V6
|
||||
select ARCH_MXC_IOMUX_V3
|
||||
select ARCH_MXC_AUDMUX_V2
|
||||
select HAVE_EPIT
|
||||
select ARCH_MX35
|
||||
select MXC_AVIC
|
||||
|
||||
|
||||
if ARCH_MX1
|
||||
|
||||
comment "MX1 platforms:"
|
||||
|
|
@ -324,3 +352,251 @@ config MACH_IMX27IPCAM
|
|||
configurations for the board and its peripherals.
|
||||
|
||||
endif
|
||||
|
||||
if ARCH_MX3
|
||||
|
||||
comment "MX31 platforms:"
|
||||
|
||||
config MACH_MX31ADS
|
||||
bool "Support MX31ADS platforms"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_SSI
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
default y
|
||||
help
|
||||
Include support for MX31ADS platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX31ADS_WM1133_EV1
|
||||
bool "Support Wolfson Microelectronics 1133-EV1 module"
|
||||
depends on MACH_MX31ADS
|
||||
depends on MFD_WM8350_I2C
|
||||
depends on REGULATOR_WM8350
|
||||
select MFD_WM8350_CONFIG_MODE_0
|
||||
select MFD_WM8352_CONFIG_MODE_0
|
||||
help
|
||||
Include support for the Wolfson Microelectronics 1133-EV1 PMU
|
||||
and audio module for the MX31ADS platform.
|
||||
|
||||
config MACH_MX31LILLY
|
||||
bool "Support MX31 LILLY-1131 platforms (INCO startec)"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for mx31 based LILLY1131 modules. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX31LITE
|
||||
bool "Support MX31 LITEKIT (LogicPD)"
|
||||
select SOC_IMX31
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_MXC_RTC
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
help
|
||||
Include support for MX31 LITEKIT platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_PCM037
|
||||
bool "Support Phytec pcm037 (i.MX31) platforms"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_MXC_W1
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for Phytec pcm037 platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_PCM037_EET
|
||||
bool "Support pcm037 EET board extensions"
|
||||
depends on MACH_PCM037
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
help
|
||||
Add support for PCM037 EET baseboard extensions. If you are using the
|
||||
OLED display with EET, use "video=mx3fb:CMEL-OLED" kernel
|
||||
command-line parameter.
|
||||
|
||||
config MACH_MX31_3DS
|
||||
bool "Support MX31PDK (3DS)"
|
||||
select SOC_IMX31
|
||||
select MXC_DEBUG_BOARD
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_KEYPAD
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for MX31PDK (3DS) platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX31_3DS_MXC_NAND_USE_BBT
|
||||
bool "Make the MXC NAND driver use the in flash Bad Block Table"
|
||||
depends on MACH_MX31_3DS
|
||||
depends on MTD_NAND_MXC
|
||||
help
|
||||
Enable this if you want that the MXC NAND driver uses the in flash
|
||||
Bad Block Table to know what blocks are bad instead of scanning the
|
||||
entire flash looking for bad block markers.
|
||||
|
||||
config MACH_MX31MOBOARD
|
||||
bool "Support mx31moboard platforms (EPFL Mobots group)"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for mx31moboard platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_QONG
|
||||
bool "Support Dave/DENX QongEVB-LITE platform"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
help
|
||||
Include support for Dave/DENX QongEVB-LITE platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_ARMADILLO5X0
|
||||
bool "Support Atmark Armadillo-500 Development Base Board"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for Atmark Armadillo-500 platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_KZM_ARM11_01
|
||||
bool "Support KZM-ARM11-01(Kyoto Microcomputer)"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
help
|
||||
Include support for KZM-ARM11-01. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_BUG
|
||||
bool "Support Buglabs BUGBase platform"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
default y
|
||||
help
|
||||
Include support for BUGBase 1.3 platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
comment "MX35 platforms:"
|
||||
|
||||
config MACH_PCM043
|
||||
bool "Support Phytec pcm043 (i.MX35) platforms"
|
||||
select SOC_IMX35
|
||||
select IMX_HAVE_PLATFORM_FLEXCAN
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_SSI
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for Phytec pcm043 platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX35_3DS
|
||||
bool "Support MX35PDK platform"
|
||||
select SOC_IMX35
|
||||
select MXC_DEBUG_BOARD
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
help
|
||||
Include support for MX35PDK platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_EUKREA_CPUIMX35
|
||||
bool "Support Eukrea CPUIMX35 Platform"
|
||||
select SOC_IMX35
|
||||
select IMX_HAVE_PLATFORM_FLEXCAN
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for Eukrea CPUIMX35 platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
choice
|
||||
prompt "Baseboard"
|
||||
depends on MACH_EUKREA_CPUIMX35
|
||||
default MACH_EUKREA_MBIMXSD35_BASEBOARD
|
||||
|
||||
config MACH_EUKREA_MBIMXSD35_BASEBOARD
|
||||
bool "Eukrea MBIMXSD development board"
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_IMX_SSI
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
help
|
||||
This adds board specific devices that can be found on Eukrea's
|
||||
MBIMXSD evaluation board.
|
||||
|
||||
endchoice
|
||||
|
||||
config MACH_VPR200
|
||||
bool "Support VPR200 platform"
|
||||
select SOC_IMX35
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
help
|
||||
Include support for VPR200 platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -1,9 +1,3 @@
|
|||
#
|
||||
# Makefile for the linux kernel.
|
||||
#
|
||||
|
||||
# Object file lists.
|
||||
|
||||
obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o
|
||||
|
||||
obj-$(CONFIG_ARCH_MX1) += clock-imx1.o mm-imx1.o
|
||||
|
|
@ -14,19 +8,27 @@ obj-$(CONFIG_ARCH_MX25) += clock-imx25.o mm-imx25.o ehci-imx25.o
|
|||
obj-$(CONFIG_MACH_MX27) += cpu-imx27.o pm-imx27.o
|
||||
obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o ehci-imx27.o
|
||||
|
||||
# Support for CMOS sensor interface
|
||||
obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
|
||||
obj-$(CONFIG_SOC_IMX31) += mm-imx31.o cpu-imx31.o clock-imx31.o iomux-imx31.o ehci-imx31.o
|
||||
obj-$(CONFIG_SOC_IMX35) += mm-imx35.o cpu-imx35.o clock-imx35.o ehci-imx35.o
|
||||
obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
|
||||
|
||||
# Support for CMOS sensor interface
|
||||
obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
|
||||
|
||||
# i.MX1 based machines
|
||||
obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o
|
||||
obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
|
||||
obj-$(CONFIG_MACH_APF9328) += mach-apf9328.o
|
||||
|
||||
# i.MX21 based machines
|
||||
obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
|
||||
|
||||
# i.MX25 based machines
|
||||
obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
|
||||
obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-eukrea_cpuimx25.o
|
||||
obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
|
||||
|
||||
# i.MX27 based machines
|
||||
obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
|
||||
obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o
|
||||
obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
|
||||
|
|
@ -38,3 +40,24 @@ obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o
|
|||
obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
|
||||
obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o
|
||||
obj-$(CONFIG_MACH_IMX27IPCAM) += mach-imx27ipcam.o
|
||||
|
||||
# i.MX31 based machines
|
||||
obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
|
||||
obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o
|
||||
obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o
|
||||
obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o
|
||||
obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o
|
||||
obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o
|
||||
obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \
|
||||
mx31moboard-marxbot.o mx31moboard-smartbot.o
|
||||
obj-$(CONFIG_MACH_QONG) += mach-qong.o
|
||||
obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
|
||||
obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
|
||||
obj-$(CONFIG_MACH_BUG) += mach-bug.o
|
||||
|
||||
# i.MX35 based machines
|
||||
obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
|
||||
obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
|
||||
obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o
|
||||
obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o
|
||||
obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
|
||||
|
|
|
|||
|
|
@ -13,3 +13,7 @@ initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000
|
|||
zreladdr-$(CONFIG_MACH_MX27) := 0xA0008000
|
||||
params_phys-$(CONFIG_MACH_MX27) := 0xA0000100
|
||||
initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000
|
||||
|
||||
zreladdr-$(CONFIG_ARCH_MX3) := 0x80008000
|
||||
params_phys-$(CONFIG_ARCH_MX3) := 0x80000100
|
||||
initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000
|
||||
|
|
|
|||
|
|
@ -0,0 +1,56 @@
|
|||
/*
|
||||
* Copyright (C) 2009-2010 Pengutronix
|
||||
* Sascha Hauer <s.hauer@pengutronix.de>
|
||||
* Juergen Beisert <j.beisert@pengutronix.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it under
|
||||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
static int mxc_init_l2x0(void)
|
||||
{
|
||||
void __iomem *l2x0_base;
|
||||
void __iomem *clkctl_base;
|
||||
|
||||
if (!cpu_is_mx31() && !cpu_is_mx35())
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* First of all, we must repair broken chip settings. There are some
|
||||
* i.MX35 CPUs in the wild, comming with bogus L2 cache settings. These
|
||||
* misconfigured CPUs will run amok immediately when the L2 cache gets enabled.
|
||||
* Workaraound is to setup the correct register setting prior enabling the
|
||||
* L2 cache. This should not hurt already working CPUs, as they are using the
|
||||
* same value.
|
||||
*/
|
||||
#define L2_MEM_VAL 0x10
|
||||
|
||||
clkctl_base = ioremap(MX35_CLKCTL_BASE_ADDR, 4096);
|
||||
if (clkctl_base != NULL) {
|
||||
writel(0x00000515, clkctl_base + L2_MEM_VAL);
|
||||
iounmap(clkctl_base);
|
||||
} else {
|
||||
pr_err("L2 cache: Cannot fix timing. Trying to continue without\n");
|
||||
}
|
||||
|
||||
l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
|
||||
if (IS_ERR(l2x0_base)) {
|
||||
printk(KERN_ERR "remapping L2 cache area failed with %ld\n",
|
||||
PTR_ERR(l2x0_base));
|
||||
return 0;
|
||||
}
|
||||
|
||||
l2x0_init(l2x0_base, 0x00030024, 0x00000000);
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(mxc_init_l2x0);
|
||||
|
|
@ -32,7 +32,7 @@
|
|||
#include <mach/mx31.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#include "crm_regs.h"
|
||||
#include "crmregs-imx31.h"
|
||||
|
||||
#define PRE_DIV_MIN_FREQ 10000000 /* Minimum Frequency after Predivider */
|
||||
|
||||
|
|
@ -627,4 +627,3 @@ int __init mx31_clocks_init(unsigned long fref)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -547,4 +547,3 @@ int __init mx35_clocks_init()
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* MX3 CPU type detection
|
||||
* MX31 CPU type detection
|
||||
*
|
||||
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
|
||||
*
|
||||
|
|
@ -17,14 +17,12 @@
|
|||
unsigned int mx31_cpu_rev;
|
||||
EXPORT_SYMBOL(mx31_cpu_rev);
|
||||
|
||||
struct mx3_cpu_type {
|
||||
static struct {
|
||||
u8 srev;
|
||||
const char *name;
|
||||
const char *v;
|
||||
unsigned int rev;
|
||||
};
|
||||
|
||||
static struct mx3_cpu_type mx31_cpu_type[] __initdata = {
|
||||
} mx31_cpu_type[] __initdata = {
|
||||
{ .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = IMX_CHIP_REVISION_1_0 },
|
||||
{ .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 },
|
||||
{ .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 },
|
||||
|
|
@ -57,33 +55,3 @@ void __init mx31_read_cpu_rev(void)
|
|||
|
||||
printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev);
|
||||
}
|
||||
|
||||
unsigned int mx35_cpu_rev;
|
||||
EXPORT_SYMBOL(mx35_cpu_rev);
|
||||
|
||||
void __init mx35_read_cpu_rev(void)
|
||||
{
|
||||
u32 rev;
|
||||
char *srev;
|
||||
|
||||
rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
|
||||
switch (rev) {
|
||||
case 0x00:
|
||||
mx35_cpu_rev = IMX_CHIP_REVISION_1_0;
|
||||
srev = "1.0";
|
||||
break;
|
||||
case 0x10:
|
||||
mx35_cpu_rev = IMX_CHIP_REVISION_2_0;
|
||||
srev = "2.0";
|
||||
break;
|
||||
case 0x11:
|
||||
mx35_cpu_rev = IMX_CHIP_REVISION_2_1;
|
||||
srev = "2.1";
|
||||
break;
|
||||
default:
|
||||
mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN;
|
||||
srev = "unknown";
|
||||
}
|
||||
|
||||
printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
|
||||
}
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
/*
|
||||
* MX35 CPU type detection
|
||||
*
|
||||
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/io.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/iim.h>
|
||||
|
||||
unsigned int mx35_cpu_rev;
|
||||
EXPORT_SYMBOL(mx35_cpu_rev);
|
||||
|
||||
void __init mx35_read_cpu_rev(void)
|
||||
{
|
||||
u32 rev;
|
||||
char *srev;
|
||||
|
||||
rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
|
||||
switch (rev) {
|
||||
case 0x00:
|
||||
mx35_cpu_rev = IMX_CHIP_REVISION_1_0;
|
||||
srev = "1.0";
|
||||
break;
|
||||
case 0x10:
|
||||
mx35_cpu_rev = IMX_CHIP_REVISION_2_0;
|
||||
srev = "2.0";
|
||||
break;
|
||||
case 0x11:
|
||||
mx35_cpu_rev = IMX_CHIP_REVISION_2_1;
|
||||
srev = "2.1";
|
||||
break;
|
||||
default:
|
||||
mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN;
|
||||
srev = "unknown";
|
||||
}
|
||||
|
||||
printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
|
||||
}
|
||||
|
|
@ -80,4 +80,3 @@ int mx31_initialize_usb_hw(int port, unsigned int flags)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -77,4 +77,3 @@ int mx35_initialize_usb_hw(int port, unsigned int flags)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -51,7 +51,7 @@
|
|||
#include <mach/ulpi.h>
|
||||
|
||||
#include "devices-imx31.h"
|
||||
#include "crm_regs.h"
|
||||
#include "crmregs-imx31.h"
|
||||
|
||||
static int armadillo5x0_pins[] = {
|
||||
/* UART1 */
|
||||
|
|
@ -99,7 +99,7 @@ static unsigned int moboard_pins[] = {
|
|||
};
|
||||
|
||||
static struct physmap_flash_data mx31moboard_flash_data = {
|
||||
.width = 2,
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource mx31moboard_flash_resource = {
|
||||
|
|
@ -427,9 +427,9 @@ static int __init moboard_usbh2_init(void)
|
|||
|
||||
static struct gpio_led mx31moboard_leds[] = {
|
||||
{
|
||||
.name = "coreboard-led-0:red:running",
|
||||
.name = "coreboard-led-0:red:running",
|
||||
.default_trigger = "heartbeat",
|
||||
.gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0),
|
||||
.gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0),
|
||||
}, {
|
||||
.name = "coreboard-led-1:red",
|
||||
.gpio = IOMUX_TO_GPIO(MX31_PIN_STX0),
|
||||
|
|
@ -443,7 +443,7 @@ static struct gpio_led mx31moboard_leds[] = {
|
|||
};
|
||||
|
||||
static struct gpio_led_platform_data mx31moboard_led_pdata = {
|
||||
.num_leds = ARRAY_SIZE(mx31moboard_leds),
|
||||
.num_leds = ARRAY_SIZE(mx31moboard_leds),
|
||||
.leds = mx31moboard_leds,
|
||||
};
|
||||
|
||||
|
|
@ -122,12 +122,12 @@ static struct at24_platform_data board_eeprom = {
|
|||
};
|
||||
|
||||
static struct i2c_board_info pcm043_i2c_devices[] = {
|
||||
{
|
||||
{
|
||||
I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
|
||||
.platform_data = &board_eeprom,
|
||||
}, {
|
||||
I2C_BOARD_INFO("pcf8563", 0x51),
|
||||
}
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device *devices[] __initdata = {
|
||||
|
|
@ -38,18 +38,18 @@
|
|||
#define QONG_FPGA_VERSION(major, minor, rev) \
|
||||
(((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF))
|
||||
|
||||
#define QONG_FPGA_BASEADDR MX31_CS1_BASE_ADDR
|
||||
#define QONG_FPGA_PERIPH_SIZE (1 << 24)
|
||||
#define QONG_FPGA_BASEADDR MX31_CS1_BASE_ADDR
|
||||
#define QONG_FPGA_PERIPH_SIZE (1 << 24)
|
||||
|
||||
#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR
|
||||
#define QONG_FPGA_CTRL_SIZE 0x10
|
||||
#define QONG_FPGA_CTRL_SIZE 0x10
|
||||
/* FPGA control registers */
|
||||
#define QONG_FPGA_CTRL_VERSION 0x00
|
||||
|
||||
#define QONG_DNET_ID 1
|
||||
#define QONG_DNET_BASEADDR \
|
||||
(QONG_FPGA_BASEADDR + QONG_DNET_ID * QONG_FPGA_PERIPH_SIZE)
|
||||
#define QONG_DNET_SIZE 0x00001000
|
||||
#define QONG_DNET_SIZE 0x00001000
|
||||
|
||||
#define QONG_FPGA_IRQ IOMUX_TO_IRQ(MX31_PIN_DTR_DCE1)
|
||||
|
||||
|
|
@ -165,15 +165,15 @@ static struct platform_nand_data qong_nand_data = {
|
|||
.options = 0,
|
||||
},
|
||||
.ctrl = {
|
||||
.cmd_ctrl = qong_nand_cmd_ctrl,
|
||||
.cmd_ctrl = qong_nand_cmd_ctrl,
|
||||
.dev_ready = qong_nand_device_ready,
|
||||
.select_chip = qong_nand_select_chip,
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource qong_nand_resource = {
|
||||
.start = MX31_CS3_BASE_ADDR,
|
||||
.end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
|
||||
.start = MX31_CS3_BASE_ADDR,
|
||||
.end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
/*
|
||||
* Copyright (C) 1999,2000 Arm Limited
|
||||
* Copyright (C) 2000 Deep Blue Solutions Ltd
|
||||
* Copyright (C) 2002 Shane Nay (shane@minirl.com)
|
||||
* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
* - add MX31 specific definitions
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include <mach/common.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/iomux-v3.h>
|
||||
#include <mach/gpio.h>
|
||||
#include <mach/irqs.h>
|
||||
|
||||
static struct map_desc mx31_io_desc[] __initdata = {
|
||||
imx_map_entry(MX31, X_MEMC, MT_DEVICE),
|
||||
imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
|
||||
imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED),
|
||||
imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED),
|
||||
imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED),
|
||||
};
|
||||
|
||||
/*
|
||||
* This function initializes the memory map. It is called during the
|
||||
* system startup to create static physical to virtual memory mappings
|
||||
* for the IO modules.
|
||||
*/
|
||||
void __init mx31_map_io(void)
|
||||
{
|
||||
iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
|
||||
}
|
||||
|
||||
void __init imx31_init_early(void)
|
||||
{
|
||||
mxc_set_cpu_type(MXC_CPU_MX31);
|
||||
mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
|
||||
}
|
||||
|
||||
static struct mxc_gpio_port imx31_gpio_ports[] = {
|
||||
DEFINE_IMX_GPIO_PORT_IRQ(MX31, 0, 1, MX31_INT_GPIO1),
|
||||
DEFINE_IMX_GPIO_PORT_IRQ(MX31, 1, 2, MX31_INT_GPIO2),
|
||||
DEFINE_IMX_GPIO_PORT_IRQ(MX31, 2, 3, MX31_INT_GPIO3),
|
||||
};
|
||||
|
||||
void __init mx31_init_irq(void)
|
||||
{
|
||||
mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
|
||||
mxc_gpio_init(imx31_gpio_ports, ARRAY_SIZE(imx31_gpio_ports));
|
||||
}
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* Copyright (C) 1999,2000 Arm Limited
|
||||
* Copyright (C) 2000 Deep Blue Solutions Ltd
|
||||
* Copyright (C) 2002 Shane Nay (shane@minirl.com)
|
||||
* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
* - add MX31 specific definitions
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
|
||||
#include <mach/common.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/iomux-v3.h>
|
||||
#include <mach/gpio.h>
|
||||
#include <mach/irqs.h>
|
||||
|
||||
static struct map_desc mx35_io_desc[] __initdata = {
|
||||
imx_map_entry(MX35, X_MEMC, MT_DEVICE),
|
||||
imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
|
||||
imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
|
||||
imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
|
||||
imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
|
||||
};
|
||||
|
||||
void __init mx35_map_io(void)
|
||||
{
|
||||
iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
|
||||
}
|
||||
|
||||
void __init imx35_init_early(void)
|
||||
{
|
||||
mxc_set_cpu_type(MXC_CPU_MX35);
|
||||
mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
|
||||
mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
|
||||
}
|
||||
|
||||
static struct mxc_gpio_port imx35_gpio_ports[] = {
|
||||
DEFINE_IMX_GPIO_PORT_IRQ(MX35, 0, 1, MX35_INT_GPIO1),
|
||||
DEFINE_IMX_GPIO_PORT_IRQ(MX35, 1, 2, MX35_INT_GPIO2),
|
||||
DEFINE_IMX_GPIO_PORT_IRQ(MX35, 2, 3, MX35_INT_GPIO3),
|
||||
};
|
||||
|
||||
void __init mx35_init_irq(void)
|
||||
{
|
||||
mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
|
||||
mxc_gpio_init(imx35_gpio_ports, ARRAY_SIZE(imx35_gpio_ports));
|
||||
}
|
||||
|
|
@ -167,7 +167,7 @@ static const struct ipu_platform_data ipu_data __initconst = {
|
|||
|
||||
static const struct fb_videomode fb_modedb = {
|
||||
/* 640x480 TFT panel (IPS-056T) */
|
||||
.name = "CRT-VGA",
|
||||
.name = "CRT-VGA",
|
||||
.refresh = 64,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
|
|
@ -214,4 +214,3 @@ void __init mx31lilly_db_init(void)
|
|||
imx31_add_mxc_mmc(0, &mmc_pdata);
|
||||
mx31lilly_init_fb();
|
||||
}
|
||||
|
||||
|
|
@ -1,272 +0,0 @@
|
|||
if ARCH_MX3
|
||||
|
||||
# ARCH_MX31 and ARCH_MX35 are left for compatibility
|
||||
# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
|
||||
# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
|
||||
# more sensible) names are used: SOC_IMX31 and SOC_IMX35
|
||||
config ARCH_MX31
|
||||
bool
|
||||
|
||||
config ARCH_MX35
|
||||
bool
|
||||
|
||||
config SOC_IMX31
|
||||
bool
|
||||
select CPU_V6
|
||||
select IMX_HAVE_PLATFORM_MXC_RNGA
|
||||
select ARCH_MXC_AUDMUX_V2
|
||||
select ARCH_MX31
|
||||
select MXC_AVIC
|
||||
|
||||
config SOC_IMX35
|
||||
bool
|
||||
select CPU_V6
|
||||
select ARCH_MXC_IOMUX_V3
|
||||
select ARCH_MXC_AUDMUX_V2
|
||||
select HAVE_EPIT
|
||||
select ARCH_MX35
|
||||
select MXC_AVIC
|
||||
|
||||
comment "MX3 platforms:"
|
||||
|
||||
config MACH_MX31ADS
|
||||
bool "Support MX31ADS platforms"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_SSI
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
default y
|
||||
help
|
||||
Include support for MX31ADS platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX31ADS_WM1133_EV1
|
||||
bool "Support Wolfson Microelectronics 1133-EV1 module"
|
||||
depends on MACH_MX31ADS
|
||||
depends on MFD_WM8350_I2C
|
||||
depends on REGULATOR_WM8350
|
||||
select MFD_WM8350_CONFIG_MODE_0
|
||||
select MFD_WM8352_CONFIG_MODE_0
|
||||
help
|
||||
Include support for the Wolfson Microelectronics 1133-EV1 PMU
|
||||
and audio module for the MX31ADS platform.
|
||||
|
||||
config MACH_PCM037
|
||||
bool "Support Phytec pcm037 (i.MX31) platforms"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_MXC_W1
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for Phytec pcm037 platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_PCM037_EET
|
||||
bool "Support pcm037 EET board extensions"
|
||||
depends on MACH_PCM037
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
help
|
||||
Add support for PCM037 EET baseboard extensions. If you are using the
|
||||
OLED display with EET, use "video=mx3fb:CMEL-OLED" kernel
|
||||
command-line parameter.
|
||||
|
||||
config MACH_MX31LITE
|
||||
bool "Support MX31 LITEKIT (LogicPD)"
|
||||
select SOC_IMX31
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_MXC_RTC
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
help
|
||||
Include support for MX31 LITEKIT platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX31_3DS
|
||||
bool "Support MX31PDK (3DS)"
|
||||
select SOC_IMX31
|
||||
select MXC_DEBUG_BOARD
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_KEYPAD
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for MX31PDK (3DS) platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX31_3DS_MXC_NAND_USE_BBT
|
||||
bool "Make the MXC NAND driver use the in flash Bad Block Table"
|
||||
depends on MACH_MX31_3DS
|
||||
depends on MTD_NAND_MXC
|
||||
help
|
||||
Enable this if you want that the MXC NAND driver uses the in flash
|
||||
Bad Block Table to know what blocks are bad instead of scanning the
|
||||
entire flash looking for bad block markers.
|
||||
|
||||
config MACH_MX31MOBOARD
|
||||
bool "Support mx31moboard platforms (EPFL Mobots group)"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for mx31moboard platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX31LILLY
|
||||
bool "Support MX31 LILLY-1131 platforms (INCO startec)"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for mx31 based LILLY1131 modules. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_QONG
|
||||
bool "Support Dave/DENX QongEVB-LITE platform"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
help
|
||||
Include support for Dave/DENX QongEVB-LITE platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_PCM043
|
||||
bool "Support Phytec pcm043 (i.MX35) platforms"
|
||||
select SOC_IMX35
|
||||
select IMX_HAVE_PLATFORM_FLEXCAN
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_SSI
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for Phytec pcm043 platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_ARMADILLO5X0
|
||||
bool "Support Atmark Armadillo-500 Development Base Board"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for Atmark Armadillo-500 platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX35_3DS
|
||||
bool "Support MX35PDK platform"
|
||||
select SOC_IMX35
|
||||
select MXC_DEBUG_BOARD
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
help
|
||||
Include support for MX35PDK platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_KZM_ARM11_01
|
||||
bool "Support KZM-ARM11-01(Kyoto Microcomputer)"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
help
|
||||
Include support for KZM-ARM11-01. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_BUG
|
||||
bool "Support Buglabs BUGBase platform"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
default y
|
||||
help
|
||||
Include support for BUGBase 1.3 platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_EUKREA_CPUIMX35
|
||||
bool "Support Eukrea CPUIMX35 Platform"
|
||||
select SOC_IMX35
|
||||
select IMX_HAVE_PLATFORM_FLEXCAN
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for Eukrea CPUIMX35 platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
choice
|
||||
prompt "Baseboard"
|
||||
depends on MACH_EUKREA_CPUIMX35
|
||||
default MACH_EUKREA_MBIMXSD35_BASEBOARD
|
||||
|
||||
config MACH_EUKREA_MBIMXSD35_BASEBOARD
|
||||
bool "Eukrea MBIMXSD development board"
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_IMX_SSI
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
help
|
||||
This adds board specific devices that can be found on Eukrea's
|
||||
MBIMXSD evaluation board.
|
||||
|
||||
endchoice
|
||||
|
||||
config MACH_VPR200
|
||||
bool "Support VPR200 platform"
|
||||
select SOC_IMX35
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
help
|
||||
Include support for VPR200 platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
endif
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
#
|
||||
# Makefile for the linux kernel.
|
||||
#
|
||||
|
||||
# Object file lists.
|
||||
|
||||
obj-y := mm.o cpu.o
|
||||
obj-$(CONFIG_SOC_IMX31) += clock-imx31.o iomux-imx31.o ehci-imx31.o
|
||||
obj-$(CONFIG_SOC_IMX35) += clock-imx35.o ehci-imx35.o
|
||||
obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
|
||||
obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o
|
||||
obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o
|
||||
obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o
|
||||
obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o
|
||||
obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o
|
||||
obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \
|
||||
mx31moboard-marxbot.o mx31moboard-smartbot.o
|
||||
obj-$(CONFIG_MACH_QONG) += mach-qong.o
|
||||
obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
|
||||
obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
|
||||
obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
|
||||
obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
|
||||
obj-$(CONFIG_MACH_BUG) += mach-bug.o
|
||||
obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o
|
||||
obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd-baseboard.o
|
||||
obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
|
||||
|
|
@ -1,3 +0,0 @@
|
|||
zreladdr-y := 0x80008000
|
||||
params_phys-y := 0x80000100
|
||||
initrd_phys-y := 0x80800000
|
||||
|
|
@ -1,141 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 1999,2000 Arm Limited
|
||||
* Copyright (C) 2000 Deep Blue Solutions Ltd
|
||||
* Copyright (C) 2002 Shane Nay (shane@minirl.com)
|
||||
* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
* - add MX31 specific definitions
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
|
||||
#include <mach/common.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/iomux-v3.h>
|
||||
#include <mach/gpio.h>
|
||||
#include <mach/irqs.h>
|
||||
|
||||
#ifdef CONFIG_SOC_IMX31
|
||||
static struct map_desc mx31_io_desc[] __initdata = {
|
||||
imx_map_entry(MX31, X_MEMC, MT_DEVICE),
|
||||
imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
|
||||
imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED),
|
||||
imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED),
|
||||
imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED),
|
||||
};
|
||||
|
||||
/*
|
||||
* This function initializes the memory map. It is called during the
|
||||
* system startup to create static physical to virtual memory mappings
|
||||
* for the IO modules.
|
||||
*/
|
||||
void __init mx31_map_io(void)
|
||||
{
|
||||
iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
|
||||
}
|
||||
|
||||
void __init imx31_init_early(void)
|
||||
{
|
||||
mxc_set_cpu_type(MXC_CPU_MX31);
|
||||
mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
|
||||
}
|
||||
|
||||
static struct mxc_gpio_port imx31_gpio_ports[] = {
|
||||
DEFINE_IMX_GPIO_PORT_IRQ(MX31, 0, 1, MX31_INT_GPIO1),
|
||||
DEFINE_IMX_GPIO_PORT_IRQ(MX31, 1, 2, MX31_INT_GPIO2),
|
||||
DEFINE_IMX_GPIO_PORT_IRQ(MX31, 2, 3, MX31_INT_GPIO3),
|
||||
};
|
||||
|
||||
void __init mx31_init_irq(void)
|
||||
{
|
||||
mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
|
||||
mxc_gpio_init(imx31_gpio_ports, ARRAY_SIZE(imx31_gpio_ports));
|
||||
}
|
||||
#endif /* ifdef CONFIG_SOC_IMX31 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX35
|
||||
static struct map_desc mx35_io_desc[] __initdata = {
|
||||
imx_map_entry(MX35, X_MEMC, MT_DEVICE),
|
||||
imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
|
||||
imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
|
||||
imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
|
||||
imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
|
||||
};
|
||||
|
||||
void __init mx35_map_io(void)
|
||||
{
|
||||
iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
|
||||
}
|
||||
|
||||
void __init imx35_init_early(void)
|
||||
{
|
||||
mxc_set_cpu_type(MXC_CPU_MX35);
|
||||
mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
|
||||
mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
|
||||
}
|
||||
|
||||
static struct mxc_gpio_port imx35_gpio_ports[] = {
|
||||
DEFINE_IMX_GPIO_PORT_IRQ(MX35, 0, 1, MX35_INT_GPIO1),
|
||||
DEFINE_IMX_GPIO_PORT_IRQ(MX35, 1, 2, MX35_INT_GPIO2),
|
||||
DEFINE_IMX_GPIO_PORT_IRQ(MX35, 2, 3, MX35_INT_GPIO3),
|
||||
};
|
||||
|
||||
void __init mx35_init_irq(void)
|
||||
{
|
||||
mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
|
||||
mxc_gpio_init(imx35_gpio_ports, ARRAY_SIZE(imx35_gpio_ports));
|
||||
}
|
||||
#endif /* ifdef CONFIG_SOC_IMX35 */
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
static int mxc_init_l2x0(void)
|
||||
{
|
||||
void __iomem *l2x0_base;
|
||||
void __iomem *clkctl_base;
|
||||
/*
|
||||
* First of all, we must repair broken chip settings. There are some
|
||||
* i.MX35 CPUs in the wild, comming with bogus L2 cache settings. These
|
||||
* misconfigured CPUs will run amok immediately when the L2 cache gets enabled.
|
||||
* Workaraound is to setup the correct register setting prior enabling the
|
||||
* L2 cache. This should not hurt already working CPUs, as they are using the
|
||||
* same value
|
||||
*/
|
||||
#define L2_MEM_VAL 0x10
|
||||
|
||||
clkctl_base = ioremap(MX35_CLKCTL_BASE_ADDR, 4096);
|
||||
if (clkctl_base != NULL) {
|
||||
writel(0x00000515, clkctl_base + L2_MEM_VAL);
|
||||
iounmap(clkctl_base);
|
||||
} else {
|
||||
pr_err("L2 cache: Cannot fix timing. Trying to continue without\n");
|
||||
}
|
||||
|
||||
l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
|
||||
if (IS_ERR(l2x0_base)) {
|
||||
printk(KERN_ERR "remapping L2 cache area failed with %ld\n",
|
||||
PTR_ERR(l2x0_base));
|
||||
return 0;
|
||||
}
|
||||
|
||||
l2x0_init(l2x0_base, 0x00030024, 0x00000000);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_initcall(mxc_init_l2x0);
|
||||
#endif
|
||||
|
|
@ -51,7 +51,6 @@ config ARCH_MX51
|
|||
endchoice
|
||||
|
||||
source "arch/arm/mach-imx/Kconfig"
|
||||
source "arch/arm/mach-mx3/Kconfig"
|
||||
source "arch/arm/mach-mx5/Kconfig"
|
||||
|
||||
endmenu
|
||||
|
|
|
|||
Loading…
Reference in New Issue