mirror of https://gitee.com/openkylin/linux.git
MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board
Also enable the board in the default configuration. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4953/ Signed-off-by: John Crispin <blogic@openwrt.org>
This commit is contained in:
Gabor Juhos
John Crispin
parent
82c46840ae
commit
27ea052acb
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@ -14,6 +14,18 @@ config ATH79_MACH_AP121
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Say 'Y' here if you want your kernel to support the
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Atheros AP121 reference board.
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config ATH79_MACH_AP136
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bool "Atheros AP136 reference board"
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select SOC_QCA955X
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select ATH79_DEV_GPIO_BUTTONS
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select ATH79_DEV_LEDS_GPIO
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select ATH79_DEV_SPI
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select ATH79_DEV_USB
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select ATH79_DEV_WMAC
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help
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Say 'Y' here if you want your kernel to support the
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Atheros AP136 reference board.
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config ATH79_MACH_AP81
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bool "Atheros AP81 reference board"
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select SOC_AR913X
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@ -27,6 +27,7 @@ obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o
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# Machines
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#
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obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o
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obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o
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obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
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obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
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obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
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@ -0,0 +1,156 @@
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/*
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* Qualcomm Atheros AP136 reference board support
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*
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* Copyright (c) 2012 Qualcomm Atheros
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* Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <linux/pci.h>
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#include <linux/ath9k_platform.h>
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#include "machtypes.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-spi.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "pci.h"
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#define AP136_GPIO_LED_STATUS_RED 14
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#define AP136_GPIO_LED_STATUS_GREEN 19
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#define AP136_GPIO_LED_USB 4
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#define AP136_GPIO_LED_WLAN_2G 13
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#define AP136_GPIO_LED_WLAN_5G 12
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#define AP136_GPIO_LED_WPS_RED 15
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#define AP136_GPIO_LED_WPS_GREEN 20
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#define AP136_GPIO_BTN_WPS 16
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#define AP136_GPIO_BTN_RFKILL 21
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#define AP136_KEYS_POLL_INTERVAL 20 /* msecs */
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#define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL)
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#define AP136_WMAC_CALDATA_OFFSET 0x1000
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#define AP136_PCIE_CALDATA_OFFSET 0x5000
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static struct gpio_led ap136_leds_gpio[] __initdata = {
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{
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.name = "qca:green:status",
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.gpio = AP136_GPIO_LED_STATUS_GREEN,
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.active_low = 1,
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},
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{
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.name = "qca:red:status",
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.gpio = AP136_GPIO_LED_STATUS_RED,
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.active_low = 1,
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},
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{
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.name = "qca:green:wps",
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.gpio = AP136_GPIO_LED_WPS_GREEN,
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.active_low = 1,
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},
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{
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.name = "qca:red:wps",
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.gpio = AP136_GPIO_LED_WPS_RED,
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.active_low = 1,
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},
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{
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.name = "qca:red:wlan-2g",
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.gpio = AP136_GPIO_LED_WLAN_2G,
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.active_low = 1,
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},
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{
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.name = "qca:red:usb",
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.gpio = AP136_GPIO_LED_USB,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button ap136_gpio_keys[] __initdata = {
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{
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.desc = "WPS button",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
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.gpio = AP136_GPIO_BTN_WPS,
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.active_low = 1,
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},
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{
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.desc = "RFKILL button",
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.type = EV_KEY,
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.code = KEY_RFKILL,
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.debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
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.gpio = AP136_GPIO_BTN_RFKILL,
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.active_low = 1,
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},
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};
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static struct spi_board_info ap136_spi_info[] = {
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{
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.bus_num = 0,
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.chip_select = 0,
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.max_speed_hz = 25000000,
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.modalias = "mx25l6405d",
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}
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};
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static struct ath79_spi_platform_data ap136_spi_data = {
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.bus_num = 0,
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.num_chipselect = 1,
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};
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#ifdef CONFIG_PCI
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static struct ath9k_platform_data ap136_ath9k_data;
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static int ap136_pci_plat_dev_init(struct pci_dev *dev)
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{
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if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0)
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dev->dev.platform_data = &ap136_ath9k_data;
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return 0;
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}
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static void __init ap136_pci_init(u8 *eeprom)
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{
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memcpy(ap136_ath9k_data.eeprom_data, eeprom,
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sizeof(ap136_ath9k_data.eeprom_data));
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ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init);
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ath79_register_pci();
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}
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#else
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static inline void ap136_pci_init(void) {}
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#endif /* CONFIG_PCI */
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static void __init ap136_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio),
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ap136_leds_gpio);
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ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(ap136_gpio_keys),
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ap136_gpio_keys);
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ath79_register_spi(&ap136_spi_data, ap136_spi_info,
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ARRAY_SIZE(ap136_spi_info));
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ath79_register_usb();
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ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET);
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ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET);
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}
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MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010",
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"Atheros AP136-010 reference board",
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ap136_setup);
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@ -17,6 +17,7 @@
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enum ath79_mach_type {
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ATH79_MACH_GENERIC = 0,
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ATH79_MACH_AP121, /* Atheros AP121 reference board */
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ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */
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ATH79_MACH_AP81, /* Atheros AP81 reference board */
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ATH79_MACH_DB120, /* Atheros DB120 reference board */
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ATH79_MACH_PB44, /* Atheros PB44 reference board */
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@ -1,5 +1,6 @@
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CONFIG_ATH79=y
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CONFIG_ATH79_MACH_AP121=y
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CONFIG_ATH79_MACH_AP136=y
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CONFIG_ATH79_MACH_AP81=y
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CONFIG_ATH79_MACH_DB120=y
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CONFIG_ATH79_MACH_PB44=y
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