mirror of https://gitee.com/openkylin/linux.git
drm/i915/selftests: Add tests for GT and engine workaround verification
Two simple selftests which test that both GT and engine workarounds are not lost after either a full GPU reset, or after the per-engine ones. (Including checks that one engine reset is not affecting workarounds not belonging to itself.) v2: * Rebase for series refactoring. * Add spinner for actual engine reset! * Add idle reset test as well. (Chris Wilson) * Share existing global_reset_lock. (Chris Wilson) v3: * intel_engine_verify_workarounds can be static. * API rename. (Chris Wilson) * Move global reset lock out of the loop. (Chris Wilson) v4: * Add missing rpm puts. (Chris Wilson) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20181203125014.3219-5-tvrtko.ursulin@linux.intel.com
This commit is contained in:
parent
094304beb4
commit
28d6ccce73
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@ -166,6 +166,7 @@ i915-$(CONFIG_DRM_I915_SELFTEST) += \
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selftests/i915_random.o \
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selftests/i915_selftest.o \
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selftests/igt_flush_test.o \
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selftests/igt_reset.o \
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selftests/igt_spinner.o
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# virtual gpu code
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@ -1303,5 +1303,11 @@ void intel_engine_apply_workarounds(struct intel_engine_cs *engine)
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}
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#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
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static bool intel_engine_verify_workarounds(struct intel_engine_cs *engine,
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const char *from)
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{
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return wa_list_verify(engine->i915, &engine->wa_list, from);
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}
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#include "selftests/intel_workarounds.c"
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#endif
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@ -0,0 +1,44 @@
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/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2018 Intel Corporation
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*/
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#include "igt_reset.h"
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#include "../i915_drv.h"
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#include "../intel_ringbuffer.h"
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void igt_global_reset_lock(struct drm_i915_private *i915)
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{
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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pr_debug("%s: current gpu_error=%08lx\n",
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__func__, i915->gpu_error.flags);
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while (test_and_set_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags))
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wait_event(i915->gpu_error.reset_queue,
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!test_bit(I915_RESET_BACKOFF,
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&i915->gpu_error.flags));
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for_each_engine(engine, i915, id) {
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while (test_and_set_bit(I915_RESET_ENGINE + id,
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&i915->gpu_error.flags))
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wait_on_bit(&i915->gpu_error.flags,
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I915_RESET_ENGINE + id,
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TASK_UNINTERRUPTIBLE);
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}
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}
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void igt_global_reset_unlock(struct drm_i915_private *i915)
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{
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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for_each_engine(engine, i915, id)
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clear_bit(I915_RESET_ENGINE + id, &i915->gpu_error.flags);
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clear_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
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wake_up_all(&i915->gpu_error.reset_queue);
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}
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@ -0,0 +1,15 @@
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/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2018 Intel Corporation
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*/
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#ifndef __I915_SELFTESTS_IGT_RESET_H__
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#define __I915_SELFTESTS_IGT_RESET_H__
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#include "../i915_drv.h"
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void igt_global_reset_lock(struct drm_i915_private *i915);
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void igt_global_reset_unlock(struct drm_i915_private *i915);
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#endif
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@ -27,6 +27,7 @@
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#include "../i915_selftest.h"
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#include "i915_random.h"
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#include "igt_flush_test.h"
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#include "igt_reset.h"
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#include "igt_wedge_me.h"
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#include "mock_context.h"
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@ -354,40 +355,6 @@ static int igt_hang_sanitycheck(void *arg)
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return err;
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}
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static void global_reset_lock(struct drm_i915_private *i915)
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{
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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pr_debug("%s: current gpu_error=%08lx\n",
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__func__, i915->gpu_error.flags);
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while (test_and_set_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags))
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wait_event(i915->gpu_error.reset_queue,
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!test_bit(I915_RESET_BACKOFF,
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&i915->gpu_error.flags));
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for_each_engine(engine, i915, id) {
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while (test_and_set_bit(I915_RESET_ENGINE + id,
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&i915->gpu_error.flags))
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wait_on_bit(&i915->gpu_error.flags,
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I915_RESET_ENGINE + id,
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TASK_UNINTERRUPTIBLE);
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}
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}
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static void global_reset_unlock(struct drm_i915_private *i915)
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{
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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for_each_engine(engine, i915, id)
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clear_bit(I915_RESET_ENGINE + id, &i915->gpu_error.flags);
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clear_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
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wake_up_all(&i915->gpu_error.reset_queue);
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}
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static int igt_global_reset(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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@ -396,7 +363,7 @@ static int igt_global_reset(void *arg)
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/* Check that we can issue a global GPU reset */
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global_reset_lock(i915);
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igt_global_reset_lock(i915);
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set_bit(I915_RESET_HANDOFF, &i915->gpu_error.flags);
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mutex_lock(&i915->drm.struct_mutex);
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@ -411,7 +378,7 @@ static int igt_global_reset(void *arg)
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mutex_unlock(&i915->drm.struct_mutex);
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GEM_BUG_ON(test_bit(I915_RESET_HANDOFF, &i915->gpu_error.flags));
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global_reset_unlock(i915);
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igt_global_reset_unlock(i915);
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if (i915_terminally_wedged(&i915->gpu_error))
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err = -EIO;
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@ -942,7 +909,7 @@ static int igt_reset_wait(void *arg)
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/* Check that we detect a stuck waiter and issue a reset */
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global_reset_lock(i915);
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igt_global_reset_lock(i915);
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mutex_lock(&i915->drm.struct_mutex);
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err = hang_init(&h, i915);
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@ -994,7 +961,7 @@ static int igt_reset_wait(void *arg)
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hang_fini(&h);
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unlock:
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mutex_unlock(&i915->drm.struct_mutex);
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global_reset_unlock(i915);
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igt_global_reset_unlock(i915);
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if (i915_terminally_wedged(&i915->gpu_error))
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return -EIO;
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@ -1072,7 +1039,7 @@ static int __igt_reset_evict_vma(struct drm_i915_private *i915,
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/* Check that we can recover an unbind stuck on a hanging request */
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global_reset_lock(i915);
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igt_global_reset_lock(i915);
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mutex_lock(&i915->drm.struct_mutex);
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err = hang_init(&h, i915);
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hang_fini(&h);
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unlock:
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mutex_unlock(&i915->drm.struct_mutex);
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global_reset_unlock(i915);
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igt_global_reset_unlock(i915);
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if (i915_terminally_wedged(&i915->gpu_error))
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return -EIO;
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@ -1272,7 +1239,7 @@ static int igt_reset_queue(void *arg)
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/* Check that we replay pending requests following a hang */
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global_reset_lock(i915);
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igt_global_reset_lock(i915);
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mutex_lock(&i915->drm.struct_mutex);
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err = hang_init(&h, i915);
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hang_fini(&h);
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unlock:
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mutex_unlock(&i915->drm.struct_mutex);
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global_reset_unlock(i915);
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igt_global_reset_unlock(i915);
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if (i915_terminally_wedged(&i915->gpu_error))
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return -EIO;
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@ -6,6 +6,8 @@
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#include "../i915_selftest.h"
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#include "igt_flush_test.h"
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#include "igt_reset.h"
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#include "igt_spinner.h"
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#include "igt_wedge_me.h"
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#include "mock_context.h"
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@ -290,7 +292,6 @@ static int live_reset_whitelist(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct intel_engine_cs *engine = i915->engine[RCS];
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struct i915_gpu_error *error = &i915->gpu_error;
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struct whitelist w;
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int err = 0;
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if (!whitelist_build(engine, &w))
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return 0;
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set_bit(I915_RESET_BACKOFF, &error->flags);
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set_bit(I915_RESET_ENGINE + engine->id, &error->flags);
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igt_global_reset_lock(i915);
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if (intel_has_reset_engine(i915)) {
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err = check_whitelist_across_reset(engine,
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}
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out:
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clear_bit(I915_RESET_ENGINE + engine->id, &error->flags);
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clear_bit(I915_RESET_BACKOFF, &error->flags);
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igt_global_reset_unlock(i915);
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return err;
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}
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static bool verify_gt_engine_wa(struct drm_i915_private *i915, const char *str)
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{
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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bool ok = true;
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ok &= intel_gt_verify_workarounds(i915, str);
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for_each_engine(engine, i915, id)
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ok &= intel_engine_verify_workarounds(engine, str);
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return ok;
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}
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static int
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live_gpu_reset_gt_engine_workarounds(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct i915_gpu_error *error = &i915->gpu_error;
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bool ok;
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if (!intel_has_gpu_reset(i915))
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return 0;
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pr_info("Verifying after GPU reset...\n");
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igt_global_reset_lock(i915);
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ok = verify_gt_engine_wa(i915, "before reset");
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if (!ok)
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goto out;
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intel_runtime_pm_get(i915);
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set_bit(I915_RESET_HANDOFF, &error->flags);
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i915_reset(i915, ALL_ENGINES, "live_workarounds");
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intel_runtime_pm_put(i915);
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ok = verify_gt_engine_wa(i915, "after reset");
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out:
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igt_global_reset_unlock(i915);
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return ok ? 0 : -ESRCH;
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}
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static int
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live_engine_reset_gt_engine_workarounds(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct intel_engine_cs *engine;
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struct i915_gem_context *ctx;
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struct igt_spinner spin;
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enum intel_engine_id id;
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struct i915_request *rq;
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int ret = 0;
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if (!intel_has_reset_engine(i915))
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return 0;
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ctx = kernel_context(i915);
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if (IS_ERR(ctx))
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return PTR_ERR(ctx);
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igt_global_reset_lock(i915);
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for_each_engine(engine, i915, id) {
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bool ok;
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pr_info("Verifying after %s reset...\n", engine->name);
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ok = verify_gt_engine_wa(i915, "before reset");
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if (!ok) {
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ret = -ESRCH;
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goto err;
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}
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intel_runtime_pm_get(i915);
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i915_reset_engine(engine, "live_workarounds");
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intel_runtime_pm_put(i915);
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ok = verify_gt_engine_wa(i915, "after idle reset");
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if (!ok) {
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ret = -ESRCH;
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goto err;
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}
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ret = igt_spinner_init(&spin, i915);
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if (ret)
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goto err;
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intel_runtime_pm_get(i915);
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rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
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if (IS_ERR(rq)) {
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ret = PTR_ERR(rq);
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igt_spinner_fini(&spin);
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intel_runtime_pm_put(i915);
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goto err;
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}
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i915_request_add(rq);
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if (!igt_wait_for_spinner(&spin, rq)) {
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pr_err("Spinner failed to start\n");
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igt_spinner_fini(&spin);
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intel_runtime_pm_put(i915);
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ret = -ETIMEDOUT;
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goto err;
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}
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i915_reset_engine(engine, "live_workarounds");
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intel_runtime_pm_put(i915);
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igt_spinner_end(&spin);
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igt_spinner_fini(&spin);
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ok = verify_gt_engine_wa(i915, "after busy reset");
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if (!ok) {
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ret = -ESRCH;
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goto err;
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}
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}
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err:
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igt_global_reset_unlock(i915);
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kernel_context_close(ctx);
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igt_flush_test(i915, I915_WAIT_LOCKED);
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return ret;
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}
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int intel_workarounds_live_selftests(struct drm_i915_private *i915)
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{
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static const struct i915_subtest tests[] = {
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SUBTEST(live_reset_whitelist),
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SUBTEST(live_gpu_reset_gt_engine_workarounds),
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SUBTEST(live_engine_reset_gt_engine_workarounds),
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};
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int err;
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